drivers/gpu/drm/v3d/v3d_gem.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (C) 2014-2018 Broadcom */
   3
   4 #include <drm/drmP.h>
   5 #include <drm/drm_syncobj.h>
   6 #include <linux/module.h>
   7 #include <linux/platform_device.h>
   8 #include <linux/pm_runtime.h>
   9 #include <linux/device.h>
  10 #include <linux/io.h>
  11 #include <linux/sched/signal.h>
  12
  13 #include "uapi/drm/v3d_drm.h"
  14 #include "v3d_drv.h"
  15 #include "v3d_regs.h"
  16 #include "v3d_trace.h"
  17
  18 static void
  19 v3d_init_core(struct v3d_dev *v3d, int core)
  20 {
  21         /* Set OVRTMUOUT, which means that the texture sampler uniform
  22          * configuration's tmu output type field is used, instead of
  23          * using the hardware default behavior based on the texture
  24          * type.  If you want the default behavior, you can still put
  25          * "2" in the indirect texture state's output_type field.
  26          */
  27         V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
  28
  29         /* Whenever we flush the L2T cache, we always want to flush
  30          * the whole thing.
  31          */
  32         V3D_CORE_WRITE(core, V3D_CTL_L2TFLSTA, 0);
  33         V3D_CORE_WRITE(core, V3D_CTL_L2TFLEND, ~0);
  34 }
  35
  36 /* Sets invariant state for the HW. */
  37 static void
  38 v3d_init_hw_state(struct v3d_dev *v3d)
  39 {
  40         v3d_init_core(v3d, 0);
  41 }
  42
  43 static void
  44 v3d_idle_axi(struct v3d_dev *v3d, int core)
  45 {
  46         V3D_CORE_WRITE(core, V3D_GMP_CFG, V3D_GMP_CFG_STOP_REQ);
  47
  48         if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS) &
  49                       (V3D_GMP_STATUS_RD_COUNT_MASK |
  50                        V3D_GMP_STATUS_WR_COUNT_MASK |
  51                        V3D_GMP_STATUS_CFG_BUSY)) == 0, 100)) {
  52                 DRM_ERROR("Failed to wait for safe GMP shutdown\n");
  53         }
  54 }
  55
  56 static void
  57 v3d_idle_gca(struct v3d_dev *v3d)
  58 {
  59         if (v3d->ver >= 41)
  60                 return;
  61
  62         V3D_GCA_WRITE(V3D_GCA_SAFE_SHUTDOWN, V3D_GCA_SAFE_SHUTDOWN_EN);
  63
  64         if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) &
  65                       V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED) ==
  66                      V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED, 100)) {
  67                 DRM_ERROR("Failed to wait for safe GCA shutdown\n");
  68         }
  69 }
  70
  71 static void
  72 v3d_reset_v3d(struct v3d_dev *v3d)
  73 {
  74         int version = V3D_BRIDGE_READ(V3D_TOP_GR_BRIDGE_REVISION);
  75
  76         if (V3D_GET_FIELD(version, V3D_TOP_GR_BRIDGE_MAJOR) == 2) {
  77                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0,
  78                                  V3D_TOP_GR_BRIDGE_SW_INIT_0_V3D_CLK_108_SW_INIT);
  79                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0, 0);
  80
  81                 /* GFXH-1383: The SW_INIT may cause a stray write to address 0
  82                  * of the unit, so reset it to its power-on value here.
  83                  */
  84                 V3D_WRITE(V3D_HUB_AXICFG, V3D_HUB_AXICFG_MAX_LEN_MASK);
  85         } else {
  86                 WARN_ON_ONCE(V3D_GET_FIELD(version,
  87                                            V3D_TOP_GR_BRIDGE_MAJOR) != 7);
  88                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1,
  89                                  V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT);
  90                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 0);
  91         }
  92
  93         v3d_init_hw_state(v3d);
  94 }
  95
  96 void
  97 v3d_reset(struct v3d_dev *v3d)
  98 {
  99         struct drm_device *dev = &v3d->drm;
 100
 101         DRM_ERROR("Resetting GPU.\n");
 102         trace_v3d_reset_begin(dev);
 103
 104         /* XXX: only needed for safe powerdown, not reset. */
 105         if (false)
 106                 v3d_idle_axi(v3d, 0);
 107
 108         v3d_idle_gca(v3d);
 109         v3d_reset_v3d(v3d);
 110
 111         v3d_mmu_set_page_table(v3d);
 112         v3d_irq_reset(v3d);
 113
 114         trace_v3d_reset_end(dev);
 115 }
 116
 117 static void
 118 v3d_flush_l3(struct v3d_dev *v3d)
 119 {
 120         if (v3d->ver < 41) {
 121                 u32 gca_ctrl = V3D_GCA_READ(V3D_GCA_CACHE_CTRL);
 122
 123                 V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
 124                               gca_ctrl | V3D_GCA_CACHE_CTRL_FLUSH);
 125
 126                 if (v3d->ver < 33) {
 127                         V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
 128                                       gca_ctrl & ~V3D_GCA_CACHE_CTRL_FLUSH);
 129                 }
 130         }
 131 }
 132
 133 /* Invalidates the (read-only) L2C cache.  This was the L2 cache for
 134  * uniforms and instructions on V3D 3.2.
 135  */
 136 static void
 137 v3d_invalidate_l2c(struct v3d_dev *v3d, int core)
 138 {
 139         if (v3d->ver > 32)
 140                 return;
 141
 142         V3D_CORE_WRITE(core, V3D_CTL_L2CACTL,
 143                        V3D_L2CACTL_L2CCLR |
 144                        V3D_L2CACTL_L2CENA);
 145 }
 146
 147 /* Invalidates texture L2 cachelines */
 148 static void
 149 v3d_flush_l2t(struct v3d_dev *v3d, int core)
 150 {
 151         /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't
 152          * need to wait for completion before dispatching the job --
 153          * L2T accesses will be stalled until the flush has completed.
 154          */
 155         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
 156                        V3D_L2TCACTL_L2TFLS |
 157                        V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM));
 158 }
 159
 160 /* Invalidates the slice caches.  These are read-only caches. */
 161 static void
 162 v3d_invalidate_slices(struct v3d_dev *v3d, int core)
 163 {
 164         V3D_CORE_WRITE(core, V3D_CTL_SLCACTL,
 165                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TVCCS) |
 166                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TDCCS) |
 167                        V3D_SET_FIELD(0xf, V3D_SLCACTL_UCC) |
 168                        V3D_SET_FIELD(0xf, V3D_SLCACTL_ICC));
 169 }
 170
 171 void
 172 v3d_invalidate_caches(struct v3d_dev *v3d)
 173 {
 174         /* Invalidate the caches from the outside in.  That way if
 175          * another CL's concurrent use of nearby memory were to pull
 176          * an invalidated cacheline back in, we wouldn't leave stale
 177          * data in the inner cache.
 178          */
 179         v3d_flush_l3(v3d);
 180         v3d_invalidate_l2c(v3d, 0);
 181         v3d_flush_l2t(v3d, 0);
 182         v3d_invalidate_slices(v3d, 0);
 183 }
 184
 185 static void
 186 v3d_attach_object_fences(struct v3d_bo **bos, int bo_count,
 187                          struct dma_fence *fence)
 188 {
 189         int i;
 190
 191         for (i = 0; i < bo_count; i++) {
 192                 /* XXX: Use shared fences for read-only objects. */
 193                 reservation_object_add_excl_fence(bos[i]->resv, fence);
 194         }
 195 }
 196
 197 static void
 198 v3d_unlock_bo_reservations(struct v3d_bo **bos,
 199                            int bo_count,
 200                            struct ww_acquire_ctx *acquire_ctx)
 201 {
 202         int i;
 203
 204         for (i = 0; i < bo_count; i++)
 205                 ww_mutex_unlock(&bos[i]->resv->lock);
 206
 207         ww_acquire_fini(acquire_ctx);
 208 }
 209
 210 /* Takes the reservation lock on all the BOs being referenced, so that
 211  * at queue submit time we can update the reservations.
 212  *
 213  * We don't lock the RCL the tile alloc/state BOs, or overflow memory
 214  * (all of which are on exec->unref_list).  They're entirely private
 215  * to v3d, so we don't attach dma-buf fences to them.
 216  */
 217 static int
 218 v3d_lock_bo_reservations(struct v3d_bo **bos,
 219                          int bo_count,
 220                          struct ww_acquire_ctx *acquire_ctx)
 221 {
 222         int contended_lock = -1;
 223         int i, ret;
 224
 225         ww_acquire_init(acquire_ctx, &reservation_ww_class);
 226
 227 retry:
 228         if (contended_lock != -1) {
 229                 struct v3d_bo *bo = bos[contended_lock];
 230
 231                 ret = ww_mutex_lock_slow_interruptible(&bo->resv->lock,
 232                                                        acquire_ctx);
 233                 if (ret) {
 234                         ww_acquire_done(acquire_ctx);
 235                         return ret;
 236                 }
 237         }
 238
 239         for (i = 0; i < bo_count; i++) {
 240                 if (i == contended_lock)
 241                         continue;
 242
 243                 ret = ww_mutex_lock_interruptible(&bos[i]->resv->lock,
 244                                                   acquire_ctx);
 245                 if (ret) {
 246                         int j;
 247
 248                         for (j = 0; j < i; j++)
 249                                 ww_mutex_unlock(&bos[j]->resv->lock);
 250
 251                         if (contended_lock != -1 && contended_lock >= i) {
 252                                 struct v3d_bo *bo = bos[contended_lock];
 253
 254                                 ww_mutex_unlock(&bo->resv->lock);
 255                         }
 256
 257                         if (ret == -EDEADLK) {
 258                                 contended_lock = i;
 259                                 goto retry;
 260                         }
 261
 262                         ww_acquire_done(acquire_ctx);
 263                         return ret;
 264                 }
 265         }
 266
 267         ww_acquire_done(acquire_ctx);
 268
 269         /* Reserve space for our shared (read-only) fence references,
 270          * before we commit the CL to the hardware.
 271          */
 272         for (i = 0; i < bo_count; i++) {
 273                 ret = reservation_object_reserve_shared(bos[i]->resv, 1);
 274                 if (ret) {
 275                         v3d_unlock_bo_reservations(bos, bo_count,
 276                                                    acquire_ctx);
 277                         return ret;
 278                 }
 279         }
 280
 281         return 0;
 282 }
 283
 284 /**
 285  * v3d_cl_lookup_bos() - Sets up exec->bo[] with the GEM objects
 286  * referenced by the job.
 287  * @dev: DRM device
 288  * @file_priv: DRM file for this fd
 289  * @exec: V3D job being set up
 290  *
 291  * The command validator needs to reference BOs by their index within
 292  * the submitted job's BO list.  This does the validation of the job's
 293  * BO list and reference counting for the lifetime of the job.
 294  *
 295  * Note that this function doesn't need to unreference the BOs on
 296  * failure, because that will happen at v3d_exec_cleanup() time.
 297  */
 298 static int
 299 v3d_cl_lookup_bos(struct drm_device *dev,
 300                   struct drm_file *file_priv,
 301                   struct drm_v3d_submit_cl *args,
 302                   struct v3d_exec_info *exec)
 303 {
 304         u32 *handles;
 305         int ret = 0;
 306         int i;
 307
 308         exec->bo_count = args->bo_handle_count;
 309
 310         if (!exec->bo_count) {
 311                 /* See comment on bo_index for why we have to check
 312                  * this.
 313                  */
 314                 DRM_DEBUG("Rendering requires BOs\n");
 315                 return -EINVAL;
 316         }
 317
 318         exec->bo = kvmalloc_array(exec->bo_count,
 319                                   sizeof(struct drm_gem_cma_object *),
 320                                   GFP_KERNEL | __GFP_ZERO);
 321         if (!exec->bo) {
 322                 DRM_DEBUG("Failed to allocate validated BO pointers\n");
 323                 return -ENOMEM;
 324         }
 325
 326         handles = kvmalloc_array(exec->bo_count, sizeof(u32), GFP_KERNEL);
 327         if (!handles) {
 328                 ret = -ENOMEM;
 329                 DRM_DEBUG("Failed to allocate incoming GEM handles\n");
 330                 goto fail;
 331         }
 332
 333         if (copy_from_user(handles,
 334                            (void __user *)(uintptr_t)args->bo_handles,
 335                            exec->bo_count * sizeof(u32))) {
 336                 ret = -EFAULT;
 337                 DRM_DEBUG("Failed to copy in GEM handles\n");
 338                 goto fail;
 339         }
 340
 341         spin_lock(&file_priv->table_lock);
 342         for (i = 0; i < exec->bo_count; i++) {
 343                 struct drm_gem_object *bo = idr_find(&file_priv->object_idr,
 344                                                      handles[i]);
 345                 if (!bo) {
 346                         DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
 347                                   i, handles[i]);
 348                         ret = -ENOENT;
 349                         spin_unlock(&file_priv->table_lock);
 350                         goto fail;
 351                 }
 352                 drm_gem_object_get(bo);
 353                 exec->bo[i] = to_v3d_bo(bo);
 354         }
 355         spin_unlock(&file_priv->table_lock);
 356
 357 fail:
 358         kvfree(handles);
 359         return ret;
 360 }
 361
 362 static void
 363 v3d_exec_cleanup(struct kref *ref)
 364 {
 365         struct v3d_exec_info *exec = container_of(ref, struct v3d_exec_info,
 366                                                   refcount);
 367         struct v3d_dev *v3d = exec->v3d;
 368         unsigned int i;
 369         struct v3d_bo *bo, *save;
 370
 371         dma_fence_put(exec->bin.in_fence);
 372         dma_fence_put(exec->render.in_fence);
 373
 374         dma_fence_put(exec->bin.done_fence);
 375         dma_fence_put(exec->render.done_fence);
 376
 377         dma_fence_put(exec->bin_done_fence);
 378         dma_fence_put(exec->render_done_fence);
 379
 380         for (i = 0; i < exec->bo_count; i++)
 381                 drm_gem_object_put_unlocked(&exec->bo[i]->base);
 382         kvfree(exec->bo);
 383
 384         list_for_each_entry_safe(bo, save, &exec->unref_list, unref_head) {
 385                 drm_gem_object_put_unlocked(&bo->base);
 386         }
 387
 388         pm_runtime_mark_last_busy(v3d->dev);
 389         pm_runtime_put_autosuspend(v3d->dev);
 390
 391         kfree(exec);
 392 }
 393
 394 void v3d_exec_put(struct v3d_exec_info *exec)
 395 {
 396         kref_put(&exec->refcount, v3d_exec_cleanup);
 397 }
 398
 399 static void
 400 v3d_tfu_job_cleanup(struct kref *ref)
 401 {
 402         struct v3d_tfu_job *job = container_of(ref, struct v3d_tfu_job,
 403                                                refcount);
 404         struct v3d_dev *v3d = job->v3d;
 405         unsigned int i;
 406
 407         dma_fence_put(job->in_fence);
 408         dma_fence_put(job->done_fence);
 409
 410         for (i = 0; i < ARRAY_SIZE(job->bo); i++) {
 411                 if (job->bo[i])
 412                         drm_gem_object_put_unlocked(&job->bo[i]->base);
 413         }
 414
 415         pm_runtime_mark_last_busy(v3d->dev);
 416         pm_runtime_put_autosuspend(v3d->dev);
 417
 418         kfree(job);
 419 }
 420
 421 void v3d_tfu_job_put(struct v3d_tfu_job *job)
 422 {
 423         kref_put(&job->refcount, v3d_tfu_job_cleanup);
 424 }
 425
 426 int
 427 v3d_wait_bo_ioctl(struct drm_device *dev, void *data,
 428                   struct drm_file *file_priv)
 429 {
 430         int ret;
 431         struct drm_v3d_wait_bo *args = data;
 432         struct drm_gem_object *gem_obj;
 433         struct v3d_bo *bo;
 434         ktime_t start = ktime_get();
 435         u64 delta_ns;
 436         unsigned long timeout_jiffies =
 437                 nsecs_to_jiffies_timeout(args->timeout_ns);
 438
 439         if (args->pad != 0)
 440                 return -EINVAL;
 441
 442         gem_obj = drm_gem_object_lookup(file_priv, args->handle);
 443         if (!gem_obj) {
 444                 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle);
 445                 return -EINVAL;
 446         }
 447         bo = to_v3d_bo(gem_obj);
 448
 449         ret = reservation_object_wait_timeout_rcu(bo->resv,
 450                                                   true, true,
 451                                                   timeout_jiffies);
 452
 453         if (ret == 0)
 454                 ret = -ETIME;
 455         else if (ret > 0)
 456                 ret = 0;
 457
 458         /* Decrement the user's timeout, in case we got interrupted
 459          * such that the ioctl will be restarted.
 460          */
 461         delta_ns = ktime_to_ns(ktime_sub(ktime_get(), start));
 462         if (delta_ns < args->timeout_ns)
 463                 args->timeout_ns -= delta_ns;
 464         else
 465                 args->timeout_ns = 0;
 466
 467         /* Asked to wait beyond the jiffie/scheduler precision? */
 468         if (ret == -ETIME && args->timeout_ns)
 469                 ret = -EAGAIN;
 470
 471         drm_gem_object_put_unlocked(gem_obj);
 472
 473         return ret;
 474 }
 475
 476 /**
 477  * v3d_submit_cl_ioctl() - Submits a job (frame) to the V3D.
 478  * @dev: DRM device
 479  * @data: ioctl argument
 480  * @file_priv: DRM file for this fd
 481  *
 482  * This is the main entrypoint for userspace to submit a 3D frame to
 483  * the GPU.  Userspace provides the binner command list (if
 484  * applicable), and the kernel sets up the render command list to draw
 485  * to the framebuffer described in the ioctl, using the command lists
 486  * that the 3D engine's binner will produce.
 487  */
 488 int
 489 v3d_submit_cl_ioctl(struct drm_device *dev, void *data,
 490                     struct drm_file *file_priv)
 491 {
 492         struct v3d_dev *v3d = to_v3d_dev(dev);
 493         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 494         struct drm_v3d_submit_cl *args = data;
 495         struct v3d_exec_info *exec;
 496         struct ww_acquire_ctx acquire_ctx;
 497         struct drm_syncobj *sync_out;
 498         int ret = 0;
 499
 500         trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end);
 501
 502         if (args->pad != 0) {
 503                 DRM_INFO("pad must be zero: %d\n", args->pad);
 504                 return -EINVAL;
 505         }
 506
 507         exec = kcalloc(1, sizeof(*exec), GFP_KERNEL);
 508         if (!exec)
 509                 return -ENOMEM;
 510
 511         ret = pm_runtime_get_sync(v3d->dev);
 512         if (ret < 0) {
 513                 kfree(exec);
 514                 return ret;
 515         }
 516
 517         kref_init(&exec->refcount);
 518
 519         ret = drm_syncobj_find_fence(file_priv, args->in_sync_bcl,
 520                                      0, 0, &exec->bin.in_fence);
 521         if (ret == -EINVAL)
 522                 goto fail;
 523
 524         ret = drm_syncobj_find_fence(file_priv, args->in_sync_rcl,
 525                                      0, 0, &exec->render.in_fence);
 526         if (ret == -EINVAL)
 527                 goto fail;
 528
 529         exec->qma = args->qma;
 530         exec->qms = args->qms;
 531         exec->qts = args->qts;
 532         exec->bin.exec = exec;
 533         exec->bin.start = args->bcl_start;
 534         exec->bin.end = args->bcl_end;
 535         exec->render.exec = exec;
 536         exec->render.start = args->rcl_start;
 537         exec->render.end = args->rcl_end;
 538         exec->v3d = v3d;
 539         INIT_LIST_HEAD(&exec->unref_list);
 540
 541         ret = v3d_cl_lookup_bos(dev, file_priv, args, exec);
 542         if (ret)
 543                 goto fail;
 544
 545         ret = v3d_lock_bo_reservations(exec->bo, exec->bo_count,
 546                                        &acquire_ctx);
 547         if (ret)
 548                 goto fail;
 549
 550         mutex_lock(&v3d->sched_lock);
 551         if (exec->bin.start != exec->bin.end) {
 552                 ret = drm_sched_job_init(&exec->bin.base,
 553                                          &v3d_priv->sched_entity[V3D_BIN],
 554                                          v3d_priv);
 555                 if (ret)
 556                         goto fail_unreserve;
 557
 558                 exec->bin_done_fence =
 559                         dma_fence_get(&exec->bin.base.s_fence->finished);
 560
 561                 kref_get(&exec->refcount); /* put by scheduler job completion */
 562                 drm_sched_entity_push_job(&exec->bin.base,
 563                                           &v3d_priv->sched_entity[V3D_BIN]);
 564         }
 565
 566         ret = drm_sched_job_init(&exec->render.base,
 567                                  &v3d_priv->sched_entity[V3D_RENDER],
 568                                  v3d_priv);
 569         if (ret)
 570                 goto fail_unreserve;
 571
 572         exec->render_done_fence =
 573                 dma_fence_get(&exec->render.base.s_fence->finished);
 574
 575         kref_get(&exec->refcount); /* put by scheduler job completion */
 576         drm_sched_entity_push_job(&exec->render.base,
 577                                   &v3d_priv->sched_entity[V3D_RENDER]);
 578         mutex_unlock(&v3d->sched_lock);
 579
 580         v3d_attach_object_fences(exec->bo, exec->bo_count,
 581                                  exec->render_done_fence);
 582
 583         v3d_unlock_bo_reservations(exec->bo, exec->bo_count, &acquire_ctx);
 584
 585         /* Update the return sync object for the */
 586         sync_out = drm_syncobj_find(file_priv, args->out_sync);
 587         if (sync_out) {
 588                 drm_syncobj_replace_fence(sync_out, exec->render_done_fence);
 589                 drm_syncobj_put(sync_out);
 590         }
 591
 592         v3d_exec_put(exec);
 593
 594         return 0;
 595
 596 fail_unreserve:
 597         mutex_unlock(&v3d->sched_lock);
 598         v3d_unlock_bo_reservations(exec->bo, exec->bo_count, &acquire_ctx);
 599 fail:
 600         v3d_exec_put(exec);
 601
 602         return ret;
 603 }
 604
 605 /**
 606  * v3d_submit_tfu_ioctl() - Submits a TFU (texture formatting) job to the V3D.
 607  * @dev: DRM device
 608  * @data: ioctl argument
 609  * @file_priv: DRM file for this fd
 610  *
 611  * Userspace provides the register setup for the TFU, which we don't
 612  * need to validate since the TFU is behind the MMU.
 613  */
 614 int
 615 v3d_submit_tfu_ioctl(struct drm_device *dev, void *data,
 616                      struct drm_file *file_priv)
 617 {
 618         struct v3d_dev *v3d = to_v3d_dev(dev);
 619         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 620         struct drm_v3d_submit_tfu *args = data;
 621         struct v3d_tfu_job *job;
 622         struct ww_acquire_ctx acquire_ctx;
 623         struct drm_syncobj *sync_out;
 624         struct dma_fence *sched_done_fence;
 625         int ret = 0;
 626         int bo_count;
 627
 628         trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia);
 629
 630         job = kcalloc(1, sizeof(*job), GFP_KERNEL);
 631         if (!job)
 632                 return -ENOMEM;
 633
 634         ret = pm_runtime_get_sync(v3d->dev);
 635         if (ret < 0) {
 636                 kfree(job);
 637                 return ret;
 638         }
 639
 640         kref_init(&job->refcount);
 641
 642         ret = drm_syncobj_find_fence(file_priv, args->in_sync,
 643                                      0, 0, &job->in_fence);
 644         if (ret == -EINVAL)
 645                 goto fail;
 646
 647         job->args = *args;
 648         job->v3d = v3d;
 649
 650         spin_lock(&file_priv->table_lock);
 651         for (bo_count = 0; bo_count < ARRAY_SIZE(job->bo); bo_count++) {
 652                 struct drm_gem_object *bo;
 653
 654                 if (!args->bo_handles[bo_count])
 655                         break;
 656
 657                 bo = idr_find(&file_priv->object_idr,
 658                               args->bo_handles[bo_count]);
 659                 if (!bo) {
 660                         DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
 661                                   bo_count, args->bo_handles[bo_count]);
 662                         ret = -ENOENT;
 663                         spin_unlock(&file_priv->table_lock);
 664                         goto fail;
 665                 }
 666                 drm_gem_object_get(bo);
 667                 job->bo[bo_count] = to_v3d_bo(bo);
 668         }
 669         spin_unlock(&file_priv->table_lock);
 670
 671         ret = v3d_lock_bo_reservations(job->bo, bo_count, &acquire_ctx);
 672         if (ret)
 673                 goto fail;
 674
 675         mutex_lock(&v3d->sched_lock);
 676         ret = drm_sched_job_init(&job->base,
 677                                  &v3d_priv->sched_entity[V3D_TFU],
 678                                  v3d_priv);
 679         if (ret)
 680                 goto fail_unreserve;
 681
 682         sched_done_fence = dma_fence_get(&job->base.s_fence->finished);
 683
 684         kref_get(&job->refcount); /* put by scheduler job completion */
 685         drm_sched_entity_push_job(&job->base, &v3d_priv->sched_entity[V3D_TFU]);
 686         mutex_unlock(&v3d->sched_lock);
 687
 688         v3d_attach_object_fences(job->bo, bo_count, sched_done_fence);
 689
 690         v3d_unlock_bo_reservations(job->bo, bo_count, &acquire_ctx);
 691
 692         /* Update the return sync object */
 693         sync_out = drm_syncobj_find(file_priv, args->out_sync);
 694         if (sync_out) {
 695                 drm_syncobj_replace_fence(sync_out, sched_done_fence);
 696                 drm_syncobj_put(sync_out);
 697         }
 698         dma_fence_put(sched_done_fence);
 699
 700         v3d_tfu_job_put(job);
 701
 702         return 0;
 703
 704 fail_unreserve:
 705         mutex_unlock(&v3d->sched_lock);
 706         v3d_unlock_bo_reservations(job->bo, bo_count, &acquire_ctx);
 707 fail:
 708         v3d_tfu_job_put(job);
 709
 710         return ret;
 711 }
 712
 713 int
 714 v3d_gem_init(struct drm_device *dev)
 715 {
 716         struct v3d_dev *v3d = to_v3d_dev(dev);
 717         u32 pt_size = 4096 * 1024;
 718         int ret, i;
 719
 720         for (i = 0; i < V3D_MAX_QUEUES; i++)
 721                 v3d->queue[i].fence_context = dma_fence_context_alloc(1);
 722
 723         spin_lock_init(&v3d->mm_lock);
 724         spin_lock_init(&v3d->job_lock);
 725         mutex_init(&v3d->bo_lock);
 726         mutex_init(&v3d->reset_lock);
 727         mutex_init(&v3d->sched_lock);
 728
 729         /* Note: We don't allocate address 0.  Various bits of HW
 730          * treat 0 as special, such as the occlusion query counters
 731          * where 0 means "disabled".
 732          */
 733         drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1);
 734
 735         v3d->pt = dma_alloc_wc(v3d->dev, pt_size,
 736                                &v3d->pt_paddr,
 737                                GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
 738         if (!v3d->pt) {
 739                 drm_mm_takedown(&v3d->mm);
 740                 dev_err(v3d->dev,
 741                         "Failed to allocate page tables. "
 742                         "Please ensure you have CMA enabled.\n");
 743                 return -ENOMEM;
 744         }
 745
 746         v3d_init_hw_state(v3d);
 747         v3d_mmu_set_page_table(v3d);
 748
 749         ret = v3d_sched_init(v3d);
 750         if (ret) {
 751                 drm_mm_takedown(&v3d->mm);
 752                 dma_free_coherent(v3d->dev, 4096 * 1024, (void *)v3d->pt,
 753                                   v3d->pt_paddr);
 754         }
 755
 756         return 0;
 757 }
 758
 759 void
 760 v3d_gem_destroy(struct drm_device *dev)
 761 {
 762         struct v3d_dev *v3d = to_v3d_dev(dev);
 763
 764         v3d_sched_fini(v3d);
 765
 766         /* Waiting for exec to finish would need to be done before
 767          * unregistering V3D.
 768          */
 769         WARN_ON(v3d->bin_job);
 770         WARN_ON(v3d->render_job);
 771
 772         drm_mm_takedown(&v3d->mm);
 773
 774         dma_free_coherent(v3d->dev, 4096 * 1024, (void *)v3d->pt, v3d->pt_paddr);
 775 }