drivers/gpu/drm/i915/display/intel_dp_mst.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *             2014 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  *
  24  */
  25
  26 #include <drm/drm_atomic_helper.h>
  27 #include <drm/drm_edid.h>
  28 #include <drm/drm_probe_helper.h>
  29
  30 #include "i915_drv.h"
  31 #include "intel_atomic.h"
  32 #include "intel_audio.h"
  33 #include "intel_connector.h"
  34 #include "intel_ddi.h"
  35 #include "intel_display_types.h"
  36 #include "intel_dp.h"
  37 #include "intel_dp_mst.h"
  38 #include "intel_dpio_phy.h"
  39
  40 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
  41                                             struct intel_crtc_state *crtc_state,
  42                                             struct drm_connector_state *conn_state,
  43                                             struct link_config_limits *limits)
  44 {
  45         struct drm_atomic_state *state = crtc_state->uapi.state;
  46         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  47         struct intel_dp *intel_dp = &intel_mst->primary->dp;
  48         struct intel_connector *connector =
  49                 to_intel_connector(conn_state->connector);
  50         struct drm_i915_private *i915 = to_i915(connector->base.dev);
  51         const struct drm_display_mode *adjusted_mode =
  52                 &crtc_state->hw.adjusted_mode;
  53         bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
  54                                            DP_DPCD_QUIRK_CONSTANT_N);
  55         int bpp, slots = -EINVAL;
  56
  57         crtc_state->lane_count = limits->max_lane_count;
  58         crtc_state->port_clock = limits->max_clock;
  59
  60         for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
  61                 crtc_state->pipe_bpp = bpp;
  62
  63                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
  64                                                        crtc_state->pipe_bpp,
  65                                                        false);
  66
  67                 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  68                                                       connector->port,
  69                                                       crtc_state->pbn, 0);
  70                 if (slots == -EDEADLK)
  71                         return slots;
  72                 if (slots >= 0)
  73                         break;
  74         }
  75
  76         if (slots < 0) {
  77                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
  78                             slots);
  79                 return slots;
  80         }
  81
  82         intel_link_compute_m_n(crtc_state->pipe_bpp,
  83                                crtc_state->lane_count,
  84                                adjusted_mode->crtc_clock,
  85                                crtc_state->port_clock,
  86                                &crtc_state->dp_m_n,
  87                                constant_n, crtc_state->fec_enable);
  88         crtc_state->dp_m_n.tu = slots;
  89
  90         return 0;
  91 }
  92
  93 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
  94                                        struct intel_crtc_state *pipe_config,
  95                                        struct drm_connector_state *conn_state)
  96 {
  97         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  98         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  99         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 100         struct intel_connector *connector =
 101                 to_intel_connector(conn_state->connector);
 102         struct intel_digital_connector_state *intel_conn_state =
 103                 to_intel_digital_connector_state(conn_state);
 104         const struct drm_display_mode *adjusted_mode =
 105                 &pipe_config->hw.adjusted_mode;
 106         struct link_config_limits limits;
 107         int ret;
 108
 109         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 110                 return -EINVAL;
 111
 112         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 113         pipe_config->has_pch_encoder = false;
 114
 115         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 116                 pipe_config->has_audio = connector->port->has_audio;
 117         else
 118                 pipe_config->has_audio =
 119                         intel_conn_state->force_audio == HDMI_AUDIO_ON;
 120
 121         /*
 122          * for MST we always configure max link bw - the spec doesn't
 123          * seem to suggest we should do otherwise.
 124          */
 125         limits.min_clock =
 126         limits.max_clock = intel_dp_max_link_rate(intel_dp);
 127
 128         limits.min_lane_count =
 129         limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 130
 131         limits.min_bpp = intel_dp_min_bpp(pipe_config);
 132         /*
 133          * FIXME: If all the streams can't fit into the link with
 134          * their current pipe_bpp we should reduce pipe_bpp across
 135          * the board until things start to fit. Until then we
 136          * limit to <= 8bpc since that's what was hardcoded for all
 137          * MST streams previously. This hack should be removed once
 138          * we have the proper retry logic in place.
 139          */
 140         limits.max_bpp = min(pipe_config->pipe_bpp, 24);
 141
 142         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
 143
 144         ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
 145                                                conn_state, &limits);
 146         if (ret)
 147                 return ret;
 148
 149         pipe_config->limited_color_range =
 150                 intel_dp_limited_color_range(pipe_config, conn_state);
 151
 152         if (IS_GEN9_LP(dev_priv))
 153                 pipe_config->lane_lat_optim_mask =
 154                         bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 155
 156         intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 157
 158         return 0;
 159 }
 160
 161 /*
 162  * Iterate over all connectors and return a mask of
 163  * all CPU transcoders streaming over the same DP link.
 164  */
 165 static unsigned int
 166 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
 167                              struct intel_dp *mst_port)
 168 {
 169         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 170         const struct intel_digital_connector_state *conn_state;
 171         struct intel_connector *connector;
 172         u8 transcoders = 0;
 173         int i;
 174
 175         if (INTEL_GEN(dev_priv) < 12)
 176                 return 0;
 177
 178         for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
 179                 const struct intel_crtc_state *crtc_state;
 180                 struct intel_crtc *crtc;
 181
 182                 if (connector->mst_port != mst_port || !conn_state->base.crtc)
 183                         continue;
 184
 185                 crtc = to_intel_crtc(conn_state->base.crtc);
 186                 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 187
 188                 if (!crtc_state->hw.active)
 189                         continue;
 190
 191                 transcoders |= BIT(crtc_state->cpu_transcoder);
 192         }
 193
 194         return transcoders;
 195 }
 196
 197 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
 198                                             struct intel_crtc_state *crtc_state,
 199                                             struct drm_connector_state *conn_state)
 200 {
 201         struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 202         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 203         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 204
 205         /* lowest numbered transcoder will be designated master */
 206         crtc_state->mst_master_transcoder =
 207                 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
 208
 209         return 0;
 210 }
 211
 212 /*
 213  * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
 214  * that shares the same MST stream as mode changed,
 215  * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
 216  * a fastset when possible.
 217  */
 218 static int
 219 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
 220                                        struct intel_atomic_state *state)
 221 {
 222         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 223         struct drm_connector_list_iter connector_list_iter;
 224         struct intel_connector *connector_iter;
 225
 226         if (INTEL_GEN(dev_priv) < 12)
 227                 return  0;
 228
 229         if (!intel_connector_needs_modeset(state, &connector->base))
 230                 return 0;
 231
 232         drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
 233         for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
 234                 struct intel_digital_connector_state *conn_iter_state;
 235                 struct intel_crtc_state *crtc_state;
 236                 struct intel_crtc *crtc;
 237                 int ret;
 238
 239                 if (connector_iter->mst_port != connector->mst_port ||
 240                     connector_iter == connector)
 241                         continue;
 242
 243                 conn_iter_state = intel_atomic_get_digital_connector_state(state,
 244                                                                            connector_iter);
 245                 if (IS_ERR(conn_iter_state)) {
 246                         drm_connector_list_iter_end(&connector_list_iter);
 247                         return PTR_ERR(conn_iter_state);
 248                 }
 249
 250                 if (!conn_iter_state->base.crtc)
 251                         continue;
 252
 253                 crtc = to_intel_crtc(conn_iter_state->base.crtc);
 254                 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
 255                 if (IS_ERR(crtc_state)) {
 256                         drm_connector_list_iter_end(&connector_list_iter);
 257                         return PTR_ERR(crtc_state);
 258                 }
 259
 260                 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
 261                 if (ret) {
 262                         drm_connector_list_iter_end(&connector_list_iter);
 263                         return ret;
 264                 }
 265                 crtc_state->uapi.mode_changed = true;
 266         }
 267         drm_connector_list_iter_end(&connector_list_iter);
 268
 269         return 0;
 270 }
 271
 272 static int
 273 intel_dp_mst_atomic_check(struct drm_connector *connector,
 274                           struct drm_atomic_state *_state)
 275 {
 276         struct intel_atomic_state *state = to_intel_atomic_state(_state);
 277         struct drm_connector_state *new_conn_state =
 278                 drm_atomic_get_new_connector_state(&state->base, connector);
 279         struct drm_connector_state *old_conn_state =
 280                 drm_atomic_get_old_connector_state(&state->base, connector);
 281         struct intel_connector *intel_connector =
 282                 to_intel_connector(connector);
 283         struct drm_crtc *new_crtc = new_conn_state->crtc;
 284         struct drm_dp_mst_topology_mgr *mgr;
 285         int ret;
 286
 287         ret = intel_digital_connector_atomic_check(connector, &state->base);
 288         if (ret)
 289                 return ret;
 290
 291         ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
 292         if (ret)
 293                 return ret;
 294
 295         if (!old_conn_state->crtc)
 296                 return 0;
 297
 298         /* We only want to free VCPI if this state disables the CRTC on this
 299          * connector
 300          */
 301         if (new_crtc) {
 302                 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
 303                 struct intel_crtc_state *crtc_state =
 304                         intel_atomic_get_new_crtc_state(state, intel_crtc);
 305
 306                 if (!crtc_state ||
 307                     !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
 308                     crtc_state->uapi.enable)
 309                         return 0;
 310         }
 311
 312         mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
 313         ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
 314                                                intel_connector->port);
 315
 316         return ret;
 317 }
 318
 319 static void intel_mst_disable_dp(struct intel_atomic_state *state,
 320                                  struct intel_encoder *encoder,
 321                                  const struct intel_crtc_state *old_crtc_state,
 322                                  const struct drm_connector_state *old_conn_state)
 323 {
 324         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 325         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 326         struct intel_dp *intel_dp = &intel_dig_port->dp;
 327         struct intel_connector *connector =
 328                 to_intel_connector(old_conn_state->connector);
 329         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 330         int ret;
 331
 332         drm_dbg_kms(&i915->drm, "active links %d\n",
 333                     intel_dp->active_mst_links);
 334
 335         drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
 336
 337         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
 338         if (ret) {
 339                 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
 340         }
 341         if (old_crtc_state->has_audio)
 342                 intel_audio_codec_disable(encoder,
 343                                           old_crtc_state, old_conn_state);
 344 }
 345
 346 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 347                                       struct intel_encoder *encoder,
 348                                       const struct intel_crtc_state *old_crtc_state,
 349                                       const struct drm_connector_state *old_conn_state)
 350 {
 351         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 352         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 353         struct intel_dp *intel_dp = &intel_dig_port->dp;
 354         struct intel_connector *connector =
 355                 to_intel_connector(old_conn_state->connector);
 356         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 357         bool last_mst_stream;
 358         u32 val;
 359
 360         intel_dp->active_mst_links--;
 361         last_mst_stream = intel_dp->active_mst_links == 0;
 362         drm_WARN_ON(&dev_priv->drm,
 363                     INTEL_GEN(dev_priv) >= 12 && last_mst_stream &&
 364                     !intel_dp_mst_is_master_trans(old_crtc_state));
 365
 366         intel_crtc_vblank_off(old_crtc_state);
 367
 368         intel_disable_pipe(old_crtc_state);
 369
 370         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 371
 372         val = intel_de_read(dev_priv,
 373                             TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
 374         val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
 375         intel_de_write(dev_priv,
 376                        TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
 377                        val);
 378
 379         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
 380                                   DP_TP_STATUS_ACT_SENT, 1))
 381                 drm_err(&dev_priv->drm,
 382                         "Timed out waiting for ACT sent when disabling\n");
 383         drm_dp_check_act_status(&intel_dp->mst_mgr);
 384
 385         drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
 386
 387         intel_ddi_disable_transcoder_func(old_crtc_state);
 388
 389         if (INTEL_GEN(dev_priv) >= 9)
 390                 skl_scaler_disable(old_crtc_state);
 391         else
 392                 ilk_pfit_disable(old_crtc_state);
 393
 394         /*
 395          * Power down mst path before disabling the port, otherwise we end
 396          * up getting interrupts from the sink upon detecting link loss.
 397          */
 398         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
 399                                      false);
 400         /*
 401          * From TGL spec: "If multi-stream slave transcoder: Configure
 402          * Transcoder Clock Select to direct no clock to the transcoder"
 403          *
 404          * From older GENs spec: "Configure Transcoder Clock Select to direct
 405          * no clock to the transcoder"
 406          */
 407         if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream)
 408                 intel_ddi_disable_pipe_clock(old_crtc_state);
 409
 410
 411         intel_mst->connector = NULL;
 412         if (last_mst_stream)
 413                 intel_dig_port->base.post_disable(state, &intel_dig_port->base,
 414                                                   old_crtc_state, NULL);
 415
 416         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 417                     intel_dp->active_mst_links);
 418 }
 419
 420 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
 421                                         struct intel_encoder *encoder,
 422                                         const struct intel_crtc_state *pipe_config,
 423                                         const struct drm_connector_state *conn_state)
 424 {
 425         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 426         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 427         struct intel_dp *intel_dp = &intel_dig_port->dp;
 428
 429         if (intel_dp->active_mst_links == 0)
 430                 intel_dig_port->base.pre_pll_enable(state, &intel_dig_port->base,
 431                                                     pipe_config, NULL);
 432 }
 433
 434 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
 435                                     struct intel_encoder *encoder,
 436                                     const struct intel_crtc_state *pipe_config,
 437                                     const struct drm_connector_state *conn_state)
 438 {
 439         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 440         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 441         struct intel_dp *intel_dp = &intel_dig_port->dp;
 442         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 443         struct intel_connector *connector =
 444                 to_intel_connector(conn_state->connector);
 445         int ret;
 446         u32 temp;
 447         bool first_mst_stream;
 448
 449         /* MST encoders are bound to a crtc, not to a connector,
 450          * force the mapping here for get_hw_state.
 451          */
 452         connector->encoder = encoder;
 453         intel_mst->connector = connector;
 454         first_mst_stream = intel_dp->active_mst_links == 0;
 455         drm_WARN_ON(&dev_priv->drm,
 456                     INTEL_GEN(dev_priv) >= 12 && first_mst_stream &&
 457                     !intel_dp_mst_is_master_trans(pipe_config));
 458
 459         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 460                     intel_dp->active_mst_links);
 461
 462         if (first_mst_stream)
 463                 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
 464
 465         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
 466
 467         if (first_mst_stream)
 468                 intel_dig_port->base.pre_enable(state, &intel_dig_port->base,
 469                                                 pipe_config, NULL);
 470
 471         ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
 472                                        connector->port,
 473                                        pipe_config->pbn,
 474                                        pipe_config->dp_m_n.tu);
 475         if (!ret)
 476                 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
 477
 478         intel_dp->active_mst_links++;
 479         temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_status);
 480         intel_de_write(dev_priv, intel_dp->regs.dp_tp_status, temp);
 481
 482         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
 483
 484         /*
 485          * Before Gen 12 this is not done as part of
 486          * intel_dig_port->base.pre_enable() and should be done here. For
 487          * Gen 12+ the step in which this should be done is different for the
 488          * first MST stream, so it's done on the DDI for the first stream and
 489          * here for the following ones.
 490          */
 491         if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
 492                 intel_ddi_enable_pipe_clock(pipe_config);
 493
 494         intel_ddi_set_dp_msa(pipe_config, conn_state);
 495
 496         intel_dp_set_m_n(pipe_config, M1_N1);
 497 }
 498
 499 static void intel_mst_enable_dp(struct intel_atomic_state *state,
 500                                 struct intel_encoder *encoder,
 501                                 const struct intel_crtc_state *pipe_config,
 502                                 const struct drm_connector_state *conn_state)
 503 {
 504         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 505         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 506         struct intel_dp *intel_dp = &intel_dig_port->dp;
 507         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 508
 509         drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
 510
 511         intel_enable_pipe(pipe_config);
 512
 513         intel_crtc_vblank_on(pipe_config);
 514
 515         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 516                     intel_dp->active_mst_links);
 517
 518         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
 519                                   DP_TP_STATUS_ACT_SENT, 1))
 520                 drm_err(&dev_priv->drm, "Timed out waiting for ACT sent\n");
 521
 522         drm_dp_check_act_status(&intel_dp->mst_mgr);
 523
 524         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 525         if (pipe_config->has_audio)
 526                 intel_audio_codec_enable(encoder, pipe_config, conn_state);
 527 }
 528
 529 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
 530                                       enum pipe *pipe)
 531 {
 532         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 533         *pipe = intel_mst->pipe;
 534         if (intel_mst->connector)
 535                 return true;
 536         return false;
 537 }
 538
 539 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
 540                                         struct intel_crtc_state *pipe_config)
 541 {
 542         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 543         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 544
 545         intel_ddi_get_config(&intel_dig_port->base, pipe_config);
 546 }
 547
 548 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
 549 {
 550         struct intel_connector *intel_connector = to_intel_connector(connector);
 551         struct intel_dp *intel_dp = intel_connector->mst_port;
 552         struct edid *edid;
 553         int ret;
 554
 555         if (drm_connector_is_unregistered(connector))
 556                 return intel_connector_update_modes(connector, NULL);
 557
 558         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
 559         ret = intel_connector_update_modes(connector, edid);
 560         kfree(edid);
 561
 562         return ret;
 563 }
 564
 565 static int
 566 intel_dp_mst_connector_late_register(struct drm_connector *connector)
 567 {
 568         struct intel_connector *intel_connector = to_intel_connector(connector);
 569         int ret;
 570
 571         ret = drm_dp_mst_connector_late_register(connector,
 572                                                  intel_connector->port);
 573         if (ret < 0)
 574                 return ret;
 575
 576         ret = intel_connector_register(connector);
 577         if (ret < 0)
 578                 drm_dp_mst_connector_early_unregister(connector,
 579                                                       intel_connector->port);
 580
 581         return ret;
 582 }
 583
 584 static void
 585 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
 586 {
 587         struct intel_connector *intel_connector = to_intel_connector(connector);
 588
 589         intel_connector_unregister(connector);
 590         drm_dp_mst_connector_early_unregister(connector,
 591                                               intel_connector->port);
 592 }
 593
 594 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 595         .fill_modes = drm_helper_probe_single_connector_modes,
 596         .atomic_get_property = intel_digital_connector_atomic_get_property,
 597         .atomic_set_property = intel_digital_connector_atomic_set_property,
 598         .late_register = intel_dp_mst_connector_late_register,
 599         .early_unregister = intel_dp_mst_connector_early_unregister,
 600         .destroy = intel_connector_destroy,
 601         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 602         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
 603 };
 604
 605 static int intel_dp_mst_get_modes(struct drm_connector *connector)
 606 {
 607         return intel_dp_mst_get_ddc_modes(connector);
 608 }
 609
 610 static enum drm_mode_status
 611 intel_dp_mst_mode_valid(struct drm_connector *connector,
 612                         struct drm_display_mode *mode)
 613 {
 614         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 615         struct intel_connector *intel_connector = to_intel_connector(connector);
 616         struct intel_dp *intel_dp = intel_connector->mst_port;
 617         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 618         int max_rate, mode_rate, max_lanes, max_link_clock;
 619
 620         if (drm_connector_is_unregistered(connector))
 621                 return MODE_ERROR;
 622
 623         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 624                 return MODE_NO_DBLESCAN;
 625
 626         max_link_clock = intel_dp_max_link_rate(intel_dp);
 627         max_lanes = intel_dp_max_lane_count(intel_dp);
 628
 629         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
 630         mode_rate = intel_dp_link_required(mode->clock, 18);
 631
 632         /* TODO - validate mode against available PBN for link */
 633         if (mode->clock < 10000)
 634                 return MODE_CLOCK_LOW;
 635
 636         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 637                 return MODE_H_ILLEGAL;
 638
 639         if (mode_rate > max_rate || mode->clock > max_dotclk)
 640                 return MODE_CLOCK_HIGH;
 641
 642         return intel_mode_valid_max_plane_size(dev_priv, mode);
 643 }
 644
 645 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
 646                                                          struct drm_connector_state *state)
 647 {
 648         struct intel_connector *intel_connector = to_intel_connector(connector);
 649         struct intel_dp *intel_dp = intel_connector->mst_port;
 650         struct intel_crtc *crtc = to_intel_crtc(state->crtc);
 651
 652         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
 653 }
 654
 655 static int
 656 intel_dp_mst_detect(struct drm_connector *connector,
 657                     struct drm_modeset_acquire_ctx *ctx, bool force)
 658 {
 659         struct intel_connector *intel_connector = to_intel_connector(connector);
 660         struct intel_dp *intel_dp = intel_connector->mst_port;
 661
 662         if (drm_connector_is_unregistered(connector))
 663                 return connector_status_disconnected;
 664
 665         return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
 666                                       intel_connector->port);
 667 }
 668
 669 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 670         .get_modes = intel_dp_mst_get_modes,
 671         .mode_valid = intel_dp_mst_mode_valid,
 672         .atomic_best_encoder = intel_mst_atomic_best_encoder,
 673         .atomic_check = intel_dp_mst_atomic_check,
 674         .detect_ctx = intel_dp_mst_detect,
 675 };
 676
 677 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 678 {
 679         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
 680
 681         drm_encoder_cleanup(encoder);
 682         kfree(intel_mst);
 683 }
 684
 685 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
 686         .destroy = intel_dp_mst_encoder_destroy,
 687 };
 688
 689 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
 690 {
 691         if (intel_attached_encoder(connector) && connector->base.state->crtc) {
 692                 enum pipe pipe;
 693                 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
 694                         return false;
 695                 return true;
 696         }
 697         return false;
 698 }
 699
 700 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
 701 {
 702         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 703         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 704         struct drm_device *dev = intel_dig_port->base.base.dev;
 705         struct drm_i915_private *dev_priv = to_i915(dev);
 706         struct intel_connector *intel_connector;
 707         struct drm_connector *connector;
 708         enum pipe pipe;
 709         int ret;
 710
 711         intel_connector = intel_connector_alloc();
 712         if (!intel_connector)
 713                 return NULL;
 714
 715         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
 716         intel_connector->mst_port = intel_dp;
 717         intel_connector->port = port;
 718         drm_dp_mst_get_port_malloc(port);
 719
 720         connector = &intel_connector->base;
 721         ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
 722                                  DRM_MODE_CONNECTOR_DisplayPort);
 723         if (ret) {
 724                 intel_connector_free(intel_connector);
 725                 return NULL;
 726         }
 727
 728         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
 729
 730         for_each_pipe(dev_priv, pipe) {
 731                 struct drm_encoder *enc =
 732                         &intel_dp->mst_encoders[pipe]->base.base;
 733
 734                 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
 735                 if (ret)
 736                         goto err;
 737         }
 738
 739         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 740         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
 741
 742         ret = drm_connector_set_path_property(connector, pathprop);
 743         if (ret)
 744                 goto err;
 745
 746         intel_attach_force_audio_property(connector);
 747         intel_attach_broadcast_rgb_property(connector);
 748
 749         /*
 750          * Reuse the prop from the SST connector because we're
 751          * not allowed to create new props after device registration.
 752          */
 753         connector->max_bpc_property =
 754                 intel_dp->attached_connector->base.max_bpc_property;
 755         if (connector->max_bpc_property)
 756                 drm_connector_attach_max_bpc_property(connector, 6, 12);
 757
 758         return connector;
 759
 760 err:
 761         drm_connector_cleanup(connector);
 762         return NULL;
 763 }
 764
 765 static const struct drm_dp_mst_topology_cbs mst_cbs = {
 766         .add_connector = intel_dp_add_mst_connector,
 767 };
 768
 769 static struct intel_dp_mst_encoder *
 770 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
 771 {
 772         struct intel_dp_mst_encoder *intel_mst;
 773         struct intel_encoder *intel_encoder;
 774         struct drm_device *dev = intel_dig_port->base.base.dev;
 775
 776         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
 777
 778         if (!intel_mst)
 779                 return NULL;
 780
 781         intel_mst->pipe = pipe;
 782         intel_encoder = &intel_mst->base;
 783         intel_mst->primary = intel_dig_port;
 784
 785         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
 786                          DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
 787
 788         intel_encoder->type = INTEL_OUTPUT_DP_MST;
 789         intel_encoder->power_domain = intel_dig_port->base.power_domain;
 790         intel_encoder->port = intel_dig_port->base.port;
 791         intel_encoder->cloneable = 0;
 792         /*
 793          * This is wrong, but broken userspace uses the intersection
 794          * of possible_crtcs of all the encoders of a given connector
 795          * to figure out which crtcs can drive said connector. What
 796          * should be used instead is the union of possible_crtcs.
 797          * To keep such userspace functioning we must misconfigure
 798          * this to make sure the intersection is not empty :(
 799          */
 800         intel_encoder->pipe_mask = ~0;
 801
 802         intel_encoder->compute_config = intel_dp_mst_compute_config;
 803         intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
 804         intel_encoder->disable = intel_mst_disable_dp;
 805         intel_encoder->post_disable = intel_mst_post_disable_dp;
 806         intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
 807         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
 808         intel_encoder->enable = intel_mst_enable_dp;
 809         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
 810         intel_encoder->get_config = intel_dp_mst_enc_get_config;
 811
 812         return intel_mst;
 813
 814 }
 815
 816 static bool
 817 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
 818 {
 819         struct intel_dp *intel_dp = &intel_dig_port->dp;
 820         struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
 821         enum pipe pipe;
 822
 823         for_each_pipe(dev_priv, pipe)
 824                 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
 825         return true;
 826 }
 827
 828 int
 829 intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port)
 830 {
 831         return intel_dig_port->dp.active_mst_links;
 832 }
 833
 834 int
 835 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
 836 {
 837         struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
 838         struct intel_dp *intel_dp = &intel_dig_port->dp;
 839         enum port port = intel_dig_port->base.port;
 840         int ret;
 841
 842         if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
 843                 return 0;
 844
 845         if (INTEL_GEN(i915) < 12 && port == PORT_A)
 846                 return 0;
 847
 848         if (INTEL_GEN(i915) < 11 && port == PORT_E)
 849                 return 0;
 850
 851         intel_dp->mst_mgr.cbs = &mst_cbs;
 852
 853         /* create encoders */
 854         intel_dp_create_fake_mst_encoders(intel_dig_port);
 855         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
 856                                            &intel_dp->aux, 16, 3, conn_base_id);
 857         if (ret)
 858                 return ret;
 859
 860         intel_dp->can_mst = true;
 861
 862         return 0;
 863 }
 864
 865 void
 866 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
 867 {
 868         struct intel_dp *intel_dp = &intel_dig_port->dp;
 869
 870         if (!intel_dp->can_mst)
 871                 return;
 872
 873         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
 874         /* encoders will get killed by normal cleanup */
 875 }
 876
 877 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
 878 {
 879         return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
 880 }
 881
 882 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
 883 {
 884         return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
 885                crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
 886 }