1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Rockchip ISP1 Driver - V4l resizer device
5 * Copyright (C) 2019 Collabora, Ltd.
7 * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd.
8 * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
11 #include "rkisp1-common.h"
13 #define RKISP1_RSZ_SP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_selfpath"
14 #define RKISP1_RSZ_MP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_mainpath"
16 #define RKISP1_DEF_FMT MEDIA_BUS_FMT_YUYV8_2X8
17 #define RKISP1_DEF_PIXEL_ENC V4L2_PIXEL_ENC_YUV
19 struct rkisp1_rsz_yuv_mbus_info {
25 static const struct rkisp1_rsz_yuv_mbus_info rkisp1_rsz_yuv_src_formats[] = {
27 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, /* YUV422 */
32 .mbus_code = MEDIA_BUS_FMT_YUYV8_1_5X8, /* YUV420 */
38 static const struct rkisp1_rsz_yuv_mbus_info *rkisp1_rsz_get_yuv_mbus_info(u32 mbus_code)
42 for (i = 0; i < ARRAY_SIZE(rkisp1_rsz_yuv_src_formats); i++) {
43 if (rkisp1_rsz_yuv_src_formats[i].mbus_code == mbus_code)
44 return &rkisp1_rsz_yuv_src_formats[i];
50 enum rkisp1_shadow_regs_when {
51 RKISP1_SHADOW_REGS_SYNC,
52 RKISP1_SHADOW_REGS_ASYNC,
55 struct rkisp1_rsz_config {
57 const int max_rsz_width;
58 const int max_rsz_height;
59 const int min_rsz_width;
60 const int min_rsz_height;
72 static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = {
74 .max_rsz_width = RKISP1_RSZ_MP_SRC_MAX_WIDTH,
75 .max_rsz_height = RKISP1_RSZ_MP_SRC_MAX_HEIGHT,
76 .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
77 .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
80 .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV,
81 .rawmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_RAW,
82 .h_offset = RKISP1_CIF_DUAL_CROP_M_H_OFFS,
83 .v_offset = RKISP1_CIF_DUAL_CROP_M_V_OFFS,
84 .h_size = RKISP1_CIF_DUAL_CROP_M_H_SIZE,
85 .v_size = RKISP1_CIF_DUAL_CROP_M_V_SIZE,
89 static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = {
91 .max_rsz_width = RKISP1_RSZ_SP_SRC_MAX_WIDTH,
92 .max_rsz_height = RKISP1_RSZ_SP_SRC_MAX_HEIGHT,
93 .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH,
94 .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT,
97 .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV,
98 .rawmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_RAW,
99 .h_offset = RKISP1_CIF_DUAL_CROP_S_H_OFFS,
100 .v_offset = RKISP1_CIF_DUAL_CROP_S_V_OFFS,
101 .h_size = RKISP1_CIF_DUAL_CROP_S_H_SIZE,
102 .v_size = RKISP1_CIF_DUAL_CROP_S_V_SIZE,
106 static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset)
108 return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset);
111 static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset,
114 rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value);
117 /* ----------------------------------------------------------------------------
118 * Dual crop hw configs
121 static void rkisp1_dcrop_disable(struct rkisp1_resizer *rsz,
122 enum rkisp1_shadow_regs_when when)
124 u32 dc_ctrl = rkisp1_read(rsz->rkisp1, RKISP1_CIF_DUAL_CROP_CTRL);
125 u32 mask = ~(rsz->config->dual_crop.yuvmode_mask |
126 rsz->config->dual_crop.rawmode_mask);
129 if (when == RKISP1_SHADOW_REGS_ASYNC)
130 dc_ctrl |= RKISP1_CIF_DUAL_CROP_GEN_CFG_UPD;
132 dc_ctrl |= RKISP1_CIF_DUAL_CROP_CFG_UPD;
133 rkisp1_write(rsz->rkisp1, RKISP1_CIF_DUAL_CROP_CTRL, dc_ctrl);
136 /* configure dual-crop unit */
137 static void rkisp1_dcrop_config(struct rkisp1_resizer *rsz,
138 struct v4l2_subdev_state *sd_state)
140 struct rkisp1_device *rkisp1 = rsz->rkisp1;
141 struct v4l2_mbus_framefmt *sink_fmt;
142 struct v4l2_rect *sink_crop;
145 sink_crop = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state,
146 RKISP1_RSZ_PAD_SINK);
147 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
148 RKISP1_RSZ_PAD_SINK);
150 if (sink_crop->width == sink_fmt->width &&
151 sink_crop->height == sink_fmt->height &&
152 sink_crop->left == 0 && sink_crop->top == 0) {
153 rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_SYNC);
154 dev_dbg(rkisp1->dev, "capture %d crop disabled\n", rsz->id);
158 dc_ctrl = rkisp1_read(rkisp1, RKISP1_CIF_DUAL_CROP_CTRL);
159 rkisp1_write(rkisp1, rsz->config->dual_crop.h_offset, sink_crop->left);
160 rkisp1_write(rkisp1, rsz->config->dual_crop.v_offset, sink_crop->top);
161 rkisp1_write(rkisp1, rsz->config->dual_crop.h_size, sink_crop->width);
162 rkisp1_write(rkisp1, rsz->config->dual_crop.v_size, sink_crop->height);
163 dc_ctrl |= rsz->config->dual_crop.yuvmode_mask;
164 dc_ctrl |= RKISP1_CIF_DUAL_CROP_CFG_UPD;
165 rkisp1_write(rkisp1, RKISP1_CIF_DUAL_CROP_CTRL, dc_ctrl);
167 dev_dbg(rkisp1->dev, "stream %d crop: %dx%d -> %dx%d\n", rsz->id,
168 sink_fmt->width, sink_fmt->height,
169 sink_crop->width, sink_crop->height);
172 /* ----------------------------------------------------------------------------
176 static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
177 enum rkisp1_shadow_regs_when when)
179 u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL);
181 if (when == RKISP1_SHADOW_REGS_ASYNC)
182 ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO;
184 ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD;
186 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg);
189 static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src)
191 if (len_sink < len_src)
192 return ((len_sink - 1) * RKISP1_CIF_RSZ_SCALER_FACTOR) /
195 return ((len_src - 1) * RKISP1_CIF_RSZ_SCALER_FACTOR) /
199 static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz,
200 enum rkisp1_shadow_regs_when when)
202 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0);
204 if (when == RKISP1_SHADOW_REGS_SYNC)
205 rkisp1_rsz_update_shadow(rsz, when);
208 static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
209 const struct v4l2_rect *sink_y,
210 const struct v4l2_rect *sink_c,
211 const struct v4l2_area *src_y,
212 const struct v4l2_area *src_c,
213 enum rkisp1_shadow_regs_when when)
215 u32 ratio, rsz_ctrl = 0;
218 /* No phase offset */
219 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
220 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0);
221 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0);
222 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0);
224 /* Linear interpolation */
225 for (i = 0; i < 64; i++) {
226 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i);
227 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i);
230 if (sink_y->width != src_y->width) {
231 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_ENABLE;
232 if (sink_y->width < src_y->width)
233 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP;
234 ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width);
235 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio);
238 if (sink_c->width != src_c->width) {
239 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_ENABLE;
240 if (sink_c->width < src_c->width)
241 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP;
242 ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width);
243 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio);
244 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio);
247 if (sink_y->height != src_y->height) {
248 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_ENABLE;
249 if (sink_y->height < src_y->height)
250 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP;
251 ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height);
252 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio);
255 if (sink_c->height != src_c->height) {
256 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_ENABLE;
257 if (sink_c->height < src_c->height)
258 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP;
259 ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height);
260 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio);
263 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
265 rkisp1_rsz_update_shadow(rsz, when);
268 static void rkisp1_rsz_config(struct rkisp1_resizer *rsz,
269 struct v4l2_subdev_state *sd_state,
270 enum rkisp1_shadow_regs_when when)
272 const struct rkisp1_rsz_yuv_mbus_info *sink_yuv_info, *src_yuv_info;
273 const struct v4l2_mbus_framefmt *src_fmt, *sink_fmt;
274 const struct v4l2_rect *sink_y;
275 struct v4l2_area src_y, src_c;
276 struct v4l2_rect sink_c;
278 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
279 RKISP1_RSZ_PAD_SINK);
280 src_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
283 sink_yuv_info = rkisp1_rsz_get_yuv_mbus_info(sink_fmt->code);
284 src_yuv_info = rkisp1_rsz_get_yuv_mbus_info(src_fmt->code);
287 * The resizer only works on yuv formats, so return if it is bayer
290 if (!sink_yuv_info) {
291 rkisp1_rsz_disable(rsz, when);
295 sink_y = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state,
296 RKISP1_RSZ_PAD_SINK);
297 sink_c.width = sink_y->width / sink_yuv_info->hdiv;
298 sink_c.height = sink_y->height / sink_yuv_info->vdiv;
300 src_y.width = src_fmt->width;
301 src_y.height = src_fmt->height;
302 src_c.width = src_y.width / src_yuv_info->hdiv;
303 src_c.height = src_y.height / src_yuv_info->vdiv;
306 * The resizer is used not only to change the dimensions of the frame
307 * but also to change the subsampling for YUV formats (for instance
308 * converting from 4:2:2 to 4:2:0). Check both the luma and chroma
309 * dimensions to decide whether or not to enable the resizer.
312 dev_dbg(rsz->rkisp1->dev,
313 "stream %u rsz/scale: Y %ux%u -> %ux%u, CbCr %ux%u -> %ux%u\n",
314 rsz->id, sink_y->width, sink_y->height,
315 src_fmt->width, src_fmt->height,
316 sink_c.width, sink_c.height, src_c.width, src_c.height);
318 if (sink_y->width == src_y.width && sink_y->height == src_y.height &&
319 sink_c.width == src_c.width && sink_c.height == src_c.height) {
320 rkisp1_rsz_disable(rsz, when);
324 /* Set values in the hardware. */
325 rkisp1_rsz_config_regs(rsz, sink_y, &sink_c, &src_y, &src_c, when);
328 /* ----------------------------------------------------------------------------
329 * Subdev pad operations
332 static int rkisp1_rsz_enum_mbus_code(struct v4l2_subdev *sd,
333 struct v4l2_subdev_state *sd_state,
334 struct v4l2_subdev_mbus_code_enum *code)
336 struct rkisp1_resizer *rsz =
337 container_of(sd, struct rkisp1_resizer, sd);
338 struct v4l2_subdev_pad_config dummy_cfg;
339 struct v4l2_subdev_state pad_state = {
345 if (code->pad == RKISP1_RSZ_PAD_SRC) {
346 /* supported mbus codes on the src are the same as in the capture */
347 struct rkisp1_capture *cap = &rsz->rkisp1->capture_devs[rsz->id];
349 return rkisp1_cap_enum_mbus_codes(cap, code);
353 * The selfpath capture doesn't support bayer formats. Therefore the selfpath resizer
354 * should support only YUV422 on the sink pad
356 if (rsz->id == RKISP1_SELFPATH) {
359 code->code = MEDIA_BUS_FMT_YUYV8_2X8;
363 /* supported mbus codes on the sink pad are the same as isp src pad */
364 code->pad = RKISP1_ISP_PAD_SOURCE_VIDEO;
365 ret = v4l2_subdev_call(&rsz->rkisp1->isp.sd, pad, enum_mbus_code,
374 static int rkisp1_rsz_init_config(struct v4l2_subdev *sd,
375 struct v4l2_subdev_state *sd_state)
377 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt;
378 struct v4l2_rect *sink_crop;
380 sink_fmt = v4l2_subdev_get_pad_format(sd, sd_state,
382 sink_fmt->width = RKISP1_DEFAULT_WIDTH;
383 sink_fmt->height = RKISP1_DEFAULT_HEIGHT;
384 sink_fmt->field = V4L2_FIELD_NONE;
385 sink_fmt->code = RKISP1_DEF_FMT;
386 sink_fmt->colorspace = V4L2_COLORSPACE_SRGB;
387 sink_fmt->xfer_func = V4L2_XFER_FUNC_SRGB;
388 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601;
389 sink_fmt->quantization = V4L2_QUANTIZATION_LIM_RANGE;
391 sink_crop = v4l2_subdev_get_try_crop(sd, sd_state,
392 RKISP1_RSZ_PAD_SINK);
393 sink_crop->width = RKISP1_DEFAULT_WIDTH;
394 sink_crop->height = RKISP1_DEFAULT_HEIGHT;
398 src_fmt = v4l2_subdev_get_pad_format(sd, sd_state,
399 RKISP1_RSZ_PAD_SINK);
400 *src_fmt = *sink_fmt;
402 /* NOTE: there is no crop in the source pad, only in the sink */
407 static void rkisp1_rsz_set_src_fmt(struct rkisp1_resizer *rsz,
408 struct v4l2_subdev_state *sd_state,
409 struct v4l2_mbus_framefmt *format)
411 const struct rkisp1_mbus_info *sink_mbus_info;
412 struct v4l2_mbus_framefmt *src_fmt, *sink_fmt;
414 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
415 RKISP1_RSZ_PAD_SINK);
416 src_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
419 sink_mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
421 /* for YUV formats, userspace can change the mbus code on the src pad if it is supported */
422 if (sink_mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV &&
423 rkisp1_rsz_get_yuv_mbus_info(format->code))
424 src_fmt->code = format->code;
426 src_fmt->width = clamp_t(u32, format->width,
427 rsz->config->min_rsz_width,
428 rsz->config->max_rsz_width);
429 src_fmt->height = clamp_t(u32, format->height,
430 rsz->config->min_rsz_height,
431 rsz->config->max_rsz_height);
436 static void rkisp1_rsz_set_sink_crop(struct rkisp1_resizer *rsz,
437 struct v4l2_subdev_state *sd_state,
440 const struct rkisp1_mbus_info *mbus_info;
441 struct v4l2_mbus_framefmt *sink_fmt;
442 struct v4l2_rect *sink_crop;
444 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
445 RKISP1_RSZ_PAD_SINK);
446 sink_crop = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state,
447 RKISP1_RSZ_PAD_SINK);
449 /* Not crop for MP bayer raw data */
450 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
452 if (rsz->id == RKISP1_MAINPATH &&
453 mbus_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) {
456 sink_crop->width = sink_fmt->width;
457 sink_crop->height = sink_fmt->height;
463 sink_crop->left = ALIGN(r->left, 2);
464 sink_crop->width = ALIGN(r->width, 2);
465 sink_crop->top = r->top;
466 sink_crop->height = r->height;
467 rkisp1_sd_adjust_crop(sink_crop, sink_fmt);
472 static void rkisp1_rsz_set_sink_fmt(struct rkisp1_resizer *rsz,
473 struct v4l2_subdev_state *sd_state,
474 struct v4l2_mbus_framefmt *format)
476 const struct rkisp1_mbus_info *mbus_info;
477 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt;
478 struct v4l2_rect *sink_crop;
481 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
482 RKISP1_RSZ_PAD_SINK);
483 src_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state,
485 sink_crop = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state,
486 RKISP1_RSZ_PAD_SINK);
488 if (rsz->id == RKISP1_SELFPATH)
489 sink_fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
491 sink_fmt->code = format->code;
493 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
494 if (!mbus_info || !(mbus_info->direction & RKISP1_ISP_SD_SRC)) {
495 sink_fmt->code = RKISP1_DEF_FMT;
496 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
499 sink_fmt->width = clamp_t(u32, format->width,
500 RKISP1_ISP_MIN_WIDTH,
501 RKISP1_ISP_MAX_WIDTH);
502 sink_fmt->height = clamp_t(u32, format->height,
503 RKISP1_ISP_MIN_HEIGHT,
504 RKISP1_ISP_MAX_HEIGHT);
507 * Adjust the color space fields. Accept any color primaries and
508 * transfer function for both YUV and Bayer. For YUV any YCbCr encoding
509 * and quantization range is also accepted. For Bayer formats, the YCbCr
510 * encoding isn't applicable, and the quantization range can only be
513 is_yuv = mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV;
515 sink_fmt->colorspace = format->colorspace ? :
516 (is_yuv ? V4L2_COLORSPACE_SRGB :
517 V4L2_COLORSPACE_RAW);
518 sink_fmt->xfer_func = format->xfer_func ? :
519 V4L2_MAP_XFER_FUNC_DEFAULT(sink_fmt->colorspace);
521 sink_fmt->ycbcr_enc = format->ycbcr_enc ? :
522 V4L2_MAP_YCBCR_ENC_DEFAULT(sink_fmt->colorspace);
523 sink_fmt->quantization = format->quantization ? :
524 V4L2_MAP_QUANTIZATION_DEFAULT(false, sink_fmt->colorspace,
525 sink_fmt->ycbcr_enc);
528 * The YCbCr encoding isn't applicable for non-YUV formats, but
529 * V4L2 has no "no encoding" value. Hardcode it to Rec. 601, it
530 * should be ignored by userspace.
532 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601;
533 sink_fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
538 /* Propagate the media bus code and color space to the source pad. */
539 src_fmt->code = sink_fmt->code;
540 src_fmt->colorspace = sink_fmt->colorspace;
541 src_fmt->xfer_func = sink_fmt->xfer_func;
542 src_fmt->ycbcr_enc = sink_fmt->ycbcr_enc;
543 src_fmt->quantization = sink_fmt->quantization;
545 /* Update sink crop */
546 rkisp1_rsz_set_sink_crop(rsz, sd_state, sink_crop);
549 static int rkisp1_rsz_set_fmt(struct v4l2_subdev *sd,
550 struct v4l2_subdev_state *sd_state,
551 struct v4l2_subdev_format *fmt)
553 struct rkisp1_resizer *rsz =
554 container_of(sd, struct rkisp1_resizer, sd);
556 if (fmt->pad == RKISP1_RSZ_PAD_SINK)
557 rkisp1_rsz_set_sink_fmt(rsz, sd_state, &fmt->format);
559 rkisp1_rsz_set_src_fmt(rsz, sd_state, &fmt->format);
564 static int rkisp1_rsz_get_selection(struct v4l2_subdev *sd,
565 struct v4l2_subdev_state *sd_state,
566 struct v4l2_subdev_selection *sel)
568 struct v4l2_mbus_framefmt *mf_sink;
571 if (sel->pad == RKISP1_RSZ_PAD_SRC)
574 switch (sel->target) {
575 case V4L2_SEL_TGT_CROP_BOUNDS:
576 mf_sink = v4l2_subdev_get_pad_format(sd, sd_state,
577 RKISP1_RSZ_PAD_SINK);
578 sel->r.height = mf_sink->height;
579 sel->r.width = mf_sink->width;
584 case V4L2_SEL_TGT_CROP:
585 sel->r = *v4l2_subdev_get_pad_crop(sd, sd_state,
586 RKISP1_RSZ_PAD_SINK);
597 static int rkisp1_rsz_set_selection(struct v4l2_subdev *sd,
598 struct v4l2_subdev_state *sd_state,
599 struct v4l2_subdev_selection *sel)
601 struct rkisp1_resizer *rsz =
602 container_of(sd, struct rkisp1_resizer, sd);
604 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad == RKISP1_RSZ_PAD_SRC)
607 dev_dbg(rsz->rkisp1->dev, "%s: pad: %d sel(%d,%d)/%dx%d\n", __func__,
608 sel->pad, sel->r.left, sel->r.top, sel->r.width, sel->r.height);
610 rkisp1_rsz_set_sink_crop(rsz, sd_state, &sel->r);
615 static const struct media_entity_operations rkisp1_rsz_media_ops = {
616 .link_validate = v4l2_subdev_link_validate,
619 static const struct v4l2_subdev_pad_ops rkisp1_rsz_pad_ops = {
620 .enum_mbus_code = rkisp1_rsz_enum_mbus_code,
621 .get_selection = rkisp1_rsz_get_selection,
622 .set_selection = rkisp1_rsz_set_selection,
623 .init_cfg = rkisp1_rsz_init_config,
624 .get_fmt = v4l2_subdev_get_fmt,
625 .set_fmt = rkisp1_rsz_set_fmt,
626 .link_validate = v4l2_subdev_link_validate_default,
629 /* ----------------------------------------------------------------------------
633 static int rkisp1_rsz_s_stream(struct v4l2_subdev *sd, int enable)
635 struct rkisp1_resizer *rsz =
636 container_of(sd, struct rkisp1_resizer, sd);
637 struct rkisp1_device *rkisp1 = rsz->rkisp1;
638 struct rkisp1_capture *other = &rkisp1->capture_devs[rsz->id ^ 1];
639 enum rkisp1_shadow_regs_when when = RKISP1_SHADOW_REGS_SYNC;
640 struct v4l2_subdev_state *sd_state;
643 rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_ASYNC);
644 rkisp1_rsz_disable(rsz, RKISP1_SHADOW_REGS_ASYNC);
648 if (other->is_streaming)
649 when = RKISP1_SHADOW_REGS_ASYNC;
651 sd_state = v4l2_subdev_lock_and_get_active_state(sd);
653 rkisp1_rsz_config(rsz, sd_state, when);
654 rkisp1_dcrop_config(rsz, sd_state);
656 v4l2_subdev_unlock_state(sd_state);
661 static const struct v4l2_subdev_video_ops rkisp1_rsz_video_ops = {
662 .s_stream = rkisp1_rsz_s_stream,
665 static const struct v4l2_subdev_ops rkisp1_rsz_ops = {
666 .video = &rkisp1_rsz_video_ops,
667 .pad = &rkisp1_rsz_pad_ops,
670 static void rkisp1_rsz_unregister(struct rkisp1_resizer *rsz)
675 v4l2_device_unregister_subdev(&rsz->sd);
676 v4l2_subdev_cleanup(&rsz->sd);
677 media_entity_cleanup(&rsz->sd.entity);
680 static int rkisp1_rsz_register(struct rkisp1_resizer *rsz)
682 static const char * const dev_names[] = {
683 RKISP1_RSZ_MP_DEV_NAME,
684 RKISP1_RSZ_SP_DEV_NAME
686 struct media_pad *pads = rsz->pads;
687 struct v4l2_subdev *sd = &rsz->sd;
690 if (rsz->id == RKISP1_SELFPATH) {
691 rsz->regs_base = RKISP1_CIF_SRSZ_BASE;
692 rsz->config = &rkisp1_rsz_config_sp;
694 rsz->regs_base = RKISP1_CIF_MRSZ_BASE;
695 rsz->config = &rkisp1_rsz_config_mp;
698 v4l2_subdev_init(sd, &rkisp1_rsz_ops);
699 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
700 sd->entity.ops = &rkisp1_rsz_media_ops;
701 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
702 sd->owner = THIS_MODULE;
703 strscpy(sd->name, dev_names[rsz->id], sizeof(sd->name));
705 pads[RKISP1_RSZ_PAD_SINK].flags = MEDIA_PAD_FL_SINK |
706 MEDIA_PAD_FL_MUST_CONNECT;
707 pads[RKISP1_RSZ_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE |
708 MEDIA_PAD_FL_MUST_CONNECT;
710 ret = media_entity_pads_init(&sd->entity, RKISP1_RSZ_PAD_MAX, pads);
712 goto err_entity_cleanup;
714 ret = v4l2_subdev_init_finalize(sd);
716 goto err_entity_cleanup;
718 ret = v4l2_device_register_subdev(&rsz->rkisp1->v4l2_dev, sd);
720 dev_err(sd->dev, "Failed to register resizer subdev\n");
721 goto err_subdev_cleanup;
727 v4l2_subdev_cleanup(sd);
729 media_entity_cleanup(&sd->entity);
733 int rkisp1_resizer_devs_register(struct rkisp1_device *rkisp1)
738 for (i = 0; i < ARRAY_SIZE(rkisp1->resizer_devs); i++) {
739 struct rkisp1_resizer *rsz = &rkisp1->resizer_devs[i];
741 rsz->rkisp1 = rkisp1;
744 ret = rkisp1_rsz_register(rsz);
747 rkisp1_resizer_devs_unregister(rkisp1);
755 void rkisp1_resizer_devs_unregister(struct rkisp1_device *rkisp1)
757 struct rkisp1_resizer *mp = &rkisp1->resizer_devs[RKISP1_MAINPATH];
758 struct rkisp1_resizer *sp = &rkisp1->resizer_devs[RKISP1_SELFPATH];
760 rkisp1_rsz_unregister(mp);
761 rkisp1_rsz_unregister(sp);