drivers/media/i2c/ov4689.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * ov4689 driver
   4  *
   5  * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
   6  * Copyright (C) 2022 Mikhail Rudenko
   7  */
   8
   9 #include <linux/clk.h>
  10 #include <linux/delay.h>
  11 #include <linux/gpio/consumer.h>
  12 #include <linux/i2c.h>
  13 #include <linux/module.h>
  14 #include <linux/pm_runtime.h>
  15 #include <linux/regulator/consumer.h>
  16 #include <media/media-entity.h>
  17 #include <media/v4l2-async.h>
  18 #include <media/v4l2-ctrls.h>
  19 #include <media/v4l2-subdev.h>
  20 #include <media/v4l2-fwnode.h>
  21
  22 #define CHIP_ID                         0x004688
  23 #define OV4689_REG_CHIP_ID              0x300a
  24
  25 #define OV4689_XVCLK_FREQ               24000000
  26
  27 #define OV4689_REG_CTRL_MODE            0x0100
  28 #define OV4689_MODE_SW_STANDBY          0x0
  29 #define OV4689_MODE_STREAMING           BIT(0)
  30
  31 #define OV4689_REG_EXPOSURE             0x3500
  32 #define OV4689_EXPOSURE_MIN             4
  33 #define OV4689_EXPOSURE_STEP            1
  34 #define OV4689_VTS_MAX                  0x7fff
  35
  36 #define OV4689_REG_GAIN_H               0x3508
  37 #define OV4689_REG_GAIN_L               0x3509
  38 #define OV4689_GAIN_H_MASK              0x07
  39 #define OV4689_GAIN_H_SHIFT             8
  40 #define OV4689_GAIN_L_MASK              0xff
  41 #define OV4689_GAIN_STEP                1
  42 #define OV4689_GAIN_DEFAULT             0x80
  43
  44 #define OV4689_REG_TEST_PATTERN         0x5040
  45 #define OV4689_TEST_PATTERN_ENABLE      0x80
  46 #define OV4689_TEST_PATTERN_DISABLE     0x0
  47
  48 #define OV4689_REG_VTS                  0x380e
  49
  50 #define REG_NULL                        0xFFFF
  51
  52 #define OV4689_REG_VALUE_08BIT          1
  53 #define OV4689_REG_VALUE_16BIT          2
  54 #define OV4689_REG_VALUE_24BIT          3
  55
  56 #define OV4689_LANES                    4
  57
  58 static const char *const ov4689_supply_names[] = {
  59         "avdd", /* Analog power */
  60         "dovdd", /* Digital I/O power */
  61         "dvdd", /* Digital core power */
  62 };
  63
  64 struct regval {
  65         u16 addr;
  66         u8 val;
  67 };
  68
  69 enum ov4689_mode_id {
  70         OV4689_MODE_2688_1520 = 0,
  71         OV4689_NUM_MODES,
  72 };
  73
  74 struct ov4689_mode {
  75         enum ov4689_mode_id id;
  76         u32 width;
  77         u32 height;
  78         u32 max_fps;
  79         u32 hts_def;
  80         u32 vts_def;
  81         u32 exp_def;
  82         u32 pixel_rate;
  83         u32 sensor_width;
  84         u32 sensor_height;
  85         u32 crop_top;
  86         u32 crop_left;
  87         const struct regval *reg_list;
  88 };
  89
  90 struct ov4689 {
  91         struct i2c_client *client;
  92         struct clk *xvclk;
  93         struct gpio_desc *reset_gpio;
  94         struct gpio_desc *pwdn_gpio;
  95         struct regulator_bulk_data supplies[ARRAY_SIZE(ov4689_supply_names)];
  96
  97         struct v4l2_subdev subdev;
  98         struct media_pad pad;
  99
 100         u32 clock_rate;
 101
 102         struct mutex mutex; /* lock to protect ctrls and cur_mode */
 103         struct v4l2_ctrl_handler ctrl_handler;
 104         struct v4l2_ctrl *exposure;
 105
 106         const struct ov4689_mode *cur_mode;
 107 };
 108
 109 #define to_ov4689(sd) container_of(sd, struct ov4689, subdev)
 110
 111 struct ov4689_gain_range {
 112         u32 logical_min;
 113         u32 logical_max;
 114         u32 offset;
 115         u32 divider;
 116         u32 physical_min;
 117         u32 physical_max;
 118 };
 119
 120 /*
 121  * Xclk 24Mhz
 122  * max_framerate 30fps
 123  * mipi_datarate per lane 1008Mbps
 124  */
 125 static const struct regval ov4689_2688x1520_regs[] = {
 126         {0x0103, 0x01}, {0x3638, 0x00}, {0x0300, 0x00},
 127         {0x0302, 0x2a}, {0x0303, 0x00}, {0x0304, 0x03},
 128         {0x030b, 0x00}, {0x030d, 0x1e}, {0x030e, 0x04},
 129         {0x030f, 0x01}, {0x0312, 0x01}, {0x031e, 0x00},
 130         {0x3000, 0x20}, {0x3002, 0x00}, {0x3018, 0x72},
 131         {0x3020, 0x93}, {0x3021, 0x03}, {0x3022, 0x01},
 132         {0x3031, 0x0a}, {0x303f, 0x0c}, {0x3305, 0xf1},
 133         {0x3307, 0x04}, {0x3309, 0x29}, {0x3500, 0x00},
 134         {0x3501, 0x60}, {0x3502, 0x00}, {0x3503, 0x04},
 135         {0x3504, 0x00}, {0x3505, 0x00}, {0x3506, 0x00},
 136         {0x3507, 0x00}, {0x3508, 0x00}, {0x3509, 0x80},
 137         {0x350a, 0x00}, {0x350b, 0x00}, {0x350c, 0x00},
 138         {0x350d, 0x00}, {0x350e, 0x00}, {0x350f, 0x80},
 139         {0x3510, 0x00}, {0x3511, 0x00}, {0x3512, 0x00},
 140         {0x3513, 0x00}, {0x3514, 0x00}, {0x3515, 0x80},
 141         {0x3516, 0x00}, {0x3517, 0x00}, {0x3518, 0x00},
 142         {0x3519, 0x00}, {0x351a, 0x00}, {0x351b, 0x80},
 143         {0x351c, 0x00}, {0x351d, 0x00}, {0x351e, 0x00},
 144         {0x351f, 0x00}, {0x3520, 0x00}, {0x3521, 0x80},
 145         {0x3522, 0x08}, {0x3524, 0x08}, {0x3526, 0x08},
 146         {0x3528, 0x08}, {0x352a, 0x08}, {0x3602, 0x00},
 147         {0x3603, 0x40}, {0x3604, 0x02}, {0x3605, 0x00},
 148         {0x3606, 0x00}, {0x3607, 0x00}, {0x3609, 0x12},
 149         {0x360a, 0x40}, {0x360c, 0x08}, {0x360f, 0xe5},
 150         {0x3608, 0x8f}, {0x3611, 0x00}, {0x3613, 0xf7},
 151         {0x3616, 0x58}, {0x3619, 0x99}, {0x361b, 0x60},
 152         {0x361c, 0x7a}, {0x361e, 0x79}, {0x361f, 0x02},
 153         {0x3632, 0x00}, {0x3633, 0x10}, {0x3634, 0x10},
 154         {0x3635, 0x10}, {0x3636, 0x15}, {0x3646, 0x86},
 155         {0x364a, 0x0b}, {0x3700, 0x17}, {0x3701, 0x22},
 156         {0x3703, 0x10}, {0x370a, 0x37}, {0x3705, 0x00},
 157         {0x3706, 0x63}, {0x3709, 0x3c}, {0x370b, 0x01},
 158         {0x370c, 0x30}, {0x3710, 0x24}, {0x3711, 0x0c},
 159         {0x3716, 0x00}, {0x3720, 0x28}, {0x3729, 0x7b},
 160         {0x372a, 0x84}, {0x372b, 0xbd}, {0x372c, 0xbc},
 161         {0x372e, 0x52}, {0x373c, 0x0e}, {0x373e, 0x33},
 162         {0x3743, 0x10}, {0x3744, 0x88}, {0x3745, 0xc0},
 163         {0x374a, 0x43}, {0x374c, 0x00}, {0x374e, 0x23},
 164         {0x3751, 0x7b}, {0x3752, 0x84}, {0x3753, 0xbd},
 165         {0x3754, 0xbc}, {0x3756, 0x52}, {0x375c, 0x00},
 166         {0x3760, 0x00}, {0x3761, 0x00}, {0x3762, 0x00},
 167         {0x3763, 0x00}, {0x3764, 0x00}, {0x3767, 0x04},
 168         {0x3768, 0x04}, {0x3769, 0x08}, {0x376a, 0x08},
 169         {0x376b, 0x20}, {0x376c, 0x00}, {0x376d, 0x00},
 170         {0x376e, 0x00}, {0x3773, 0x00}, {0x3774, 0x51},
 171         {0x3776, 0xbd}, {0x3777, 0xbd}, {0x3781, 0x18},
 172         {0x3783, 0x25}, {0x3798, 0x1b}, {0x3800, 0x00},
 173         {0x3801, 0x08}, {0x3802, 0x00}, {0x3803, 0x04},
 174         {0x3804, 0x0a}, {0x3805, 0x97}, {0x3806, 0x05},
 175         {0x3807, 0xfb}, {0x3808, 0x0a}, {0x3809, 0x80},
 176         {0x380a, 0x05}, {0x380b, 0xf0}, {0x380c, 0x0a},
 177         {0x380d, 0x0e}, {0x380e, 0x06}, {0x380f, 0x12},
 178         {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00},
 179         {0x3813, 0x04}, {0x3814, 0x01}, {0x3815, 0x01},
 180         {0x3819, 0x01}, {0x3820, 0x00}, {0x3821, 0x06},
 181         {0x3829, 0x00}, {0x382a, 0x01}, {0x382b, 0x01},
 182         {0x382d, 0x7f}, {0x3830, 0x04}, {0x3836, 0x01},
 183         {0x3837, 0x00}, {0x3841, 0x02}, {0x3846, 0x08},
 184         {0x3847, 0x07}, {0x3d85, 0x36}, {0x3d8c, 0x71},
 185         {0x3d8d, 0xcb}, {0x3f0a, 0x00}, {0x4000, 0xf1},
 186         {0x4001, 0x40}, {0x4002, 0x04}, {0x4003, 0x14},
 187         {0x400e, 0x00}, {0x4011, 0x00}, {0x401a, 0x00},
 188         {0x401b, 0x00}, {0x401c, 0x00}, {0x401d, 0x00},
 189         {0x401f, 0x00}, {0x4020, 0x00}, {0x4021, 0x10},
 190         {0x4022, 0x07}, {0x4023, 0xcf}, {0x4024, 0x09},
 191         {0x4025, 0x60}, {0x4026, 0x09}, {0x4027, 0x6f},
 192         {0x4028, 0x00}, {0x4029, 0x02}, {0x402a, 0x06},
 193         {0x402b, 0x04}, {0x402c, 0x02}, {0x402d, 0x02},
 194         {0x402e, 0x0e}, {0x402f, 0x04}, {0x4302, 0xff},
 195         {0x4303, 0xff}, {0x4304, 0x00}, {0x4305, 0x00},
 196         {0x4306, 0x00}, {0x4308, 0x02}, {0x4500, 0x6c},
 197         {0x4501, 0xc4}, {0x4502, 0x40}, {0x4503, 0x01},
 198         {0x4601, 0xa7}, {0x4800, 0x04}, {0x4813, 0x08},
 199         {0x481f, 0x40}, {0x4829, 0x78}, {0x4837, 0x10},
 200         {0x4b00, 0x2a}, {0x4b0d, 0x00}, {0x4d00, 0x04},
 201         {0x4d01, 0x42}, {0x4d02, 0xd1}, {0x4d03, 0x93},
 202         {0x4d04, 0xf5}, {0x4d05, 0xc1}, {0x5000, 0xf3},
 203         {0x5001, 0x11}, {0x5004, 0x00}, {0x500a, 0x00},
 204         {0x500b, 0x00}, {0x5032, 0x00}, {0x5040, 0x00},
 205         {0x5050, 0x0c}, {0x5500, 0x00}, {0x5501, 0x10},
 206         {0x5502, 0x01}, {0x5503, 0x0f}, {0x8000, 0x00},
 207         {0x8001, 0x00}, {0x8002, 0x00}, {0x8003, 0x00},
 208         {0x8004, 0x00}, {0x8005, 0x00}, {0x8006, 0x00},
 209         {0x8007, 0x00}, {0x8008, 0x00}, {0x3638, 0x00},
 210         {REG_NULL, 0x00},
 211 };
 212
 213 static const struct ov4689_mode supported_modes[] = {
 214         {
 215                 .id = OV4689_MODE_2688_1520,
 216                 .width = 2688,
 217                 .height = 1520,
 218                 .sensor_width = 2720,
 219                 .sensor_height = 1536,
 220                 .crop_top = 8,
 221                 .crop_left = 16,
 222                 .max_fps = 30,
 223                 .exp_def = 1536,
 224                 .hts_def = 4 * 2574,
 225                 .vts_def = 1554,
 226                 .pixel_rate = 480000000,
 227                 .reg_list = ov4689_2688x1520_regs,
 228         },
 229 };
 230
 231 static const u64 link_freq_menu_items[] = { 504000000 };
 232
 233 static const char *const ov4689_test_pattern_menu[] = {
 234         "Disabled",
 235         "Vertical Color Bar Type 1",
 236         "Vertical Color Bar Type 2",
 237         "Vertical Color Bar Type 3",
 238         "Vertical Color Bar Type 4"
 239 };
 240
 241 /*
 242  * These coefficients are based on those used in Rockchip's camera
 243  * engine, with minor tweaks for continuity.
 244  */
 245 static const struct ov4689_gain_range ov4689_gain_ranges[] = {
 246         {
 247                 .logical_min = 0,
 248                 .logical_max = 255,
 249                 .offset = 0,
 250                 .divider = 1,
 251                 .physical_min = 0,
 252                 .physical_max = 255,
 253         },
 254         {
 255                 .logical_min = 256,
 256                 .logical_max = 511,
 257                 .offset = 252,
 258                 .divider = 2,
 259                 .physical_min = 376,
 260                 .physical_max = 504,
 261         },
 262         {
 263                 .logical_min = 512,
 264                 .logical_max = 1023,
 265                 .offset = 758,
 266                 .divider = 4,
 267                 .physical_min = 884,
 268                 .physical_max = 1012,
 269         },
 270         {
 271                 .logical_min = 1024,
 272                 .logical_max = 2047,
 273                 .offset = 1788,
 274                 .divider = 8,
 275                 .physical_min = 1912,
 276                 .physical_max = 2047,
 277         },
 278 };
 279
 280 /* Write registers up to 4 at a time */
 281 static int ov4689_write_reg(struct i2c_client *client, u16 reg, u32 len,
 282                             u32 val)
 283 {
 284         u32 buf_i, val_i;
 285         __be32 val_be;
 286         u8 *val_p;
 287         u8 buf[6];
 288
 289         if (len > 4)
 290                 return -EINVAL;
 291
 292         buf[0] = reg >> 8;
 293         buf[1] = reg & 0xff;
 294
 295         val_be = cpu_to_be32(val);
 296         val_p = (u8 *)&val_be;
 297         buf_i = 2;
 298         val_i = 4 - len;
 299
 300         while (val_i < 4)
 301                 buf[buf_i++] = val_p[val_i++];
 302
 303         if (i2c_master_send(client, buf, len + 2) != len + 2)
 304                 return -EIO;
 305
 306         return 0;
 307 }
 308
 309 static int ov4689_write_array(struct i2c_client *client,
 310                               const struct regval *regs)
 311 {
 312         int ret = 0;
 313         u32 i;
 314
 315         for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
 316                 ret = ov4689_write_reg(client, regs[i].addr,
 317                                        OV4689_REG_VALUE_08BIT, regs[i].val);
 318
 319         return ret;
 320 }
 321
 322 /* Read registers up to 4 at a time */
 323 static int ov4689_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
 324                            u32 *val)
 325 {
 326         __be16 reg_addr_be = cpu_to_be16(reg);
 327         struct i2c_msg msgs[2];
 328         __be32 data_be = 0;
 329         u8 *data_be_p;
 330         int ret;
 331
 332         if (len > 4 || !len)
 333                 return -EINVAL;
 334
 335         data_be_p = (u8 *)&data_be;
 336         /* Write register address */
 337         msgs[0].addr = client->addr;
 338         msgs[0].flags = 0;
 339         msgs[0].len = 2;
 340         msgs[0].buf = (u8 *)&reg_addr_be;
 341
 342         /* Read data from register */
 343         msgs[1].addr = client->addr;
 344         msgs[1].flags = I2C_M_RD;
 345         msgs[1].len = len;
 346         msgs[1].buf = &data_be_p[4 - len];
 347
 348         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 349         if (ret != ARRAY_SIZE(msgs))
 350                 return -EIO;
 351
 352         *val = be32_to_cpu(data_be);
 353
 354         return 0;
 355 }
 356
 357 static void ov4689_fill_fmt(const struct ov4689_mode *mode,
 358                             struct v4l2_mbus_framefmt *fmt)
 359 {
 360         fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
 361         fmt->width = mode->width;
 362         fmt->height = mode->height;
 363         fmt->field = V4L2_FIELD_NONE;
 364 }
 365
 366 static int ov4689_set_fmt(struct v4l2_subdev *sd,
 367                           struct v4l2_subdev_state *sd_state,
 368                           struct v4l2_subdev_format *fmt)
 369 {
 370         struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
 371         struct ov4689 *ov4689 = to_ov4689(sd);
 372
 373         /* only one mode supported for now */
 374         ov4689_fill_fmt(ov4689->cur_mode, mbus_fmt);
 375
 376         return 0;
 377 }
 378
 379 static int ov4689_get_fmt(struct v4l2_subdev *sd,
 380                           struct v4l2_subdev_state *sd_state,
 381                           struct v4l2_subdev_format *fmt)
 382 {
 383         struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
 384         struct ov4689 *ov4689 = to_ov4689(sd);
 385
 386         /* only one mode supported for now */
 387         ov4689_fill_fmt(ov4689->cur_mode, mbus_fmt);
 388
 389         return 0;
 390 }
 391
 392 static int ov4689_enum_mbus_code(struct v4l2_subdev *sd,
 393                                  struct v4l2_subdev_state *sd_state,
 394                                  struct v4l2_subdev_mbus_code_enum *code)
 395 {
 396         if (code->index != 0)
 397                 return -EINVAL;
 398         code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
 399
 400         return 0;
 401 }
 402
 403 static int ov4689_enum_frame_sizes(struct v4l2_subdev *sd,
 404                                    struct v4l2_subdev_state *sd_state,
 405                                    struct v4l2_subdev_frame_size_enum *fse)
 406 {
 407         if (fse->index >= ARRAY_SIZE(supported_modes))
 408                 return -EINVAL;
 409
 410         if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
 411                 return -EINVAL;
 412
 413         fse->min_width = supported_modes[fse->index].width;
 414         fse->max_width = supported_modes[fse->index].width;
 415         fse->max_height = supported_modes[fse->index].height;
 416         fse->min_height = supported_modes[fse->index].height;
 417
 418         return 0;
 419 }
 420
 421 static int ov4689_enable_test_pattern(struct ov4689 *ov4689, u32 pattern)
 422 {
 423         u32 val;
 424
 425         if (pattern)
 426                 val = (pattern - 1) | OV4689_TEST_PATTERN_ENABLE;
 427         else
 428                 val = OV4689_TEST_PATTERN_DISABLE;
 429
 430         return ov4689_write_reg(ov4689->client, OV4689_REG_TEST_PATTERN,
 431                                 OV4689_REG_VALUE_08BIT, val);
 432 }
 433
 434 static int ov4689_get_selection(struct v4l2_subdev *sd,
 435                                 struct v4l2_subdev_state *state,
 436                                 struct v4l2_subdev_selection *sel)
 437 {
 438         const struct ov4689_mode *mode = to_ov4689(sd)->cur_mode;
 439
 440         if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
 441                 return -EINVAL;
 442
 443         switch (sel->target) {
 444         case V4L2_SEL_TGT_CROP_BOUNDS:
 445                 sel->r.top = 0;
 446                 sel->r.left = 0;
 447                 sel->r.width = mode->sensor_width;
 448                 sel->r.height = mode->sensor_height;
 449                 return 0;
 450         case V4L2_SEL_TGT_CROP:
 451         case V4L2_SEL_TGT_CROP_DEFAULT:
 452                 sel->r.top = mode->crop_top;
 453                 sel->r.left = mode->crop_left;
 454                 sel->r.width = mode->width;
 455                 sel->r.height = mode->height;
 456                 return 0;
 457         }
 458
 459         return -EINVAL;
 460 }
 461
 462 static int ov4689_s_stream(struct v4l2_subdev *sd, int on)
 463 {
 464         struct ov4689 *ov4689 = to_ov4689(sd);
 465         struct i2c_client *client = ov4689->client;
 466         int ret = 0;
 467
 468         mutex_lock(&ov4689->mutex);
 469
 470         if (on) {
 471                 ret = pm_runtime_resume_and_get(&client->dev);
 472                 if (ret < 0)
 473                         goto unlock_and_return;
 474
 475                 ret = ov4689_write_array(ov4689->client,
 476                                          ov4689->cur_mode->reg_list);
 477                 if (ret) {
 478                         pm_runtime_put(&client->dev);
 479                         goto unlock_and_return;
 480                 }
 481
 482                 ret = __v4l2_ctrl_handler_setup(&ov4689->ctrl_handler);
 483                 if (ret) {
 484                         pm_runtime_put(&client->dev);
 485                         goto unlock_and_return;
 486                 }
 487
 488                 ret = ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE,
 489                                        OV4689_REG_VALUE_08BIT,
 490                                        OV4689_MODE_STREAMING);
 491                 if (ret) {
 492                         pm_runtime_put(&client->dev);
 493                         goto unlock_and_return;
 494                 }
 495         } else {
 496                 ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE,
 497                                  OV4689_REG_VALUE_08BIT,
 498                                  OV4689_MODE_SW_STANDBY);
 499                 pm_runtime_put(&client->dev);
 500         }
 501
 502 unlock_and_return:
 503         mutex_unlock(&ov4689->mutex);
 504
 505         return ret;
 506 }
 507
 508 /* Calculate the delay in us by clock rate and clock cycles */
 509 static inline u32 ov4689_cal_delay(struct ov4689 *ov4689, u32 cycles)
 510 {
 511         return DIV_ROUND_UP(cycles * 1000,
 512                             DIV_ROUND_UP(ov4689->clock_rate, 1000));
 513 }
 514
 515 static int __maybe_unused ov4689_power_on(struct device *dev)
 516 {
 517         struct v4l2_subdev *sd = dev_get_drvdata(dev);
 518         struct ov4689 *ov4689 = to_ov4689(sd);
 519         u32 delay_us;
 520         int ret;
 521
 522         ret = clk_prepare_enable(ov4689->xvclk);
 523         if (ret < 0) {
 524                 dev_err(dev, "Failed to enable xvclk\n");
 525                 return ret;
 526         }
 527
 528         gpiod_set_value_cansleep(ov4689->reset_gpio, 1);
 529
 530         ret = regulator_bulk_enable(ARRAY_SIZE(ov4689_supply_names),
 531                                     ov4689->supplies);
 532         if (ret < 0) {
 533                 dev_err(dev, "Failed to enable regulators\n");
 534                 goto disable_clk;
 535         }
 536
 537         gpiod_set_value_cansleep(ov4689->reset_gpio, 0);
 538         usleep_range(500, 1000);
 539         gpiod_set_value_cansleep(ov4689->pwdn_gpio, 0);
 540
 541         /* 8192 cycles prior to first SCCB transaction */
 542         delay_us = ov4689_cal_delay(ov4689, 8192);
 543         usleep_range(delay_us, delay_us * 2);
 544
 545         return 0;
 546
 547 disable_clk:
 548         clk_disable_unprepare(ov4689->xvclk);
 549
 550         return ret;
 551 }
 552
 553 static int __maybe_unused ov4689_power_off(struct device *dev)
 554 {
 555         struct v4l2_subdev *sd = dev_get_drvdata(dev);
 556         struct ov4689 *ov4689 = to_ov4689(sd);
 557
 558         gpiod_set_value_cansleep(ov4689->pwdn_gpio, 1);
 559         clk_disable_unprepare(ov4689->xvclk);
 560         gpiod_set_value_cansleep(ov4689->reset_gpio, 1);
 561         regulator_bulk_disable(ARRAY_SIZE(ov4689_supply_names),
 562                                ov4689->supplies);
 563         return 0;
 564 }
 565
 566 static int ov4689_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
 567 {
 568         struct ov4689 *ov4689 = to_ov4689(sd);
 569         struct v4l2_mbus_framefmt *try_fmt;
 570
 571         mutex_lock(&ov4689->mutex);
 572
 573         try_fmt = v4l2_subdev_get_try_format(sd, fh->state, 0);
 574         /* Initialize try_fmt */
 575         ov4689_fill_fmt(&supported_modes[OV4689_MODE_2688_1520], try_fmt);
 576
 577         mutex_unlock(&ov4689->mutex);
 578
 579         return 0;
 580 }
 581
 582 static const struct dev_pm_ops ov4689_pm_ops = {
 583         SET_RUNTIME_PM_OPS(ov4689_power_off, ov4689_power_on, NULL)
 584 };
 585
 586 static const struct v4l2_subdev_internal_ops ov4689_internal_ops = {
 587         .open = ov4689_open,
 588 };
 589
 590 static const struct v4l2_subdev_video_ops ov4689_video_ops = {
 591         .s_stream = ov4689_s_stream,
 592 };
 593
 594 static const struct v4l2_subdev_pad_ops ov4689_pad_ops = {
 595         .enum_mbus_code = ov4689_enum_mbus_code,
 596         .enum_frame_size = ov4689_enum_frame_sizes,
 597         .get_fmt = ov4689_get_fmt,
 598         .set_fmt = ov4689_set_fmt,
 599         .get_selection = ov4689_get_selection,
 600 };
 601
 602 static const struct v4l2_subdev_ops ov4689_subdev_ops = {
 603         .video = &ov4689_video_ops,
 604         .pad = &ov4689_pad_ops,
 605 };
 606
 607 /*
 608  * Map userspace (logical) gain to sensor (physical) gain using
 609  * ov4689_gain_ranges table.
 610  */
 611 static int ov4689_map_gain(struct ov4689 *ov4689, int logical_gain, int *result)
 612 {
 613         const struct device *dev = &ov4689->client->dev;
 614         const struct ov4689_gain_range *range;
 615         unsigned int n;
 616
 617         for (n = 0; n < ARRAY_SIZE(ov4689_gain_ranges); n++) {
 618                 if (logical_gain >= ov4689_gain_ranges[n].logical_min &&
 619                     logical_gain <= ov4689_gain_ranges[n].logical_max)
 620                         break;
 621         }
 622
 623         if (n == ARRAY_SIZE(ov4689_gain_ranges)) {
 624                 dev_warn_ratelimited(dev, "no mapping found for gain %d\n",
 625                                      logical_gain);
 626                 return -EINVAL;
 627         }
 628
 629         range = &ov4689_gain_ranges[n];
 630
 631         *result = clamp(range->offset + (logical_gain) / range->divider,
 632                         range->physical_min, range->physical_max);
 633         return 0;
 634 }
 635
 636 static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl)
 637 {
 638         struct ov4689 *ov4689 =
 639                 container_of(ctrl->handler, struct ov4689, ctrl_handler);
 640         struct i2c_client *client = ov4689->client;
 641         int sensor_gain;
 642         s64 max_expo;
 643         int ret;
 644
 645         /* Propagate change of current control to all related controls */
 646         switch (ctrl->id) {
 647         case V4L2_CID_VBLANK:
 648                 /* Update max exposure while meeting expected vblanking */
 649                 max_expo = ov4689->cur_mode->height + ctrl->val - 4;
 650                 __v4l2_ctrl_modify_range(ov4689->exposure,
 651                                          ov4689->exposure->minimum, max_expo,
 652                                          ov4689->exposure->step,
 653                                          ov4689->exposure->default_value);
 654                 break;
 655         }
 656
 657         if (!pm_runtime_get_if_in_use(&client->dev))
 658                 return 0;
 659
 660         switch (ctrl->id) {
 661         case V4L2_CID_EXPOSURE:
 662                 /* 4 least significant bits of expsoure are fractional part */
 663                 ret = ov4689_write_reg(ov4689->client, OV4689_REG_EXPOSURE,
 664                                        OV4689_REG_VALUE_24BIT, ctrl->val << 4);
 665                 break;
 666         case V4L2_CID_ANALOGUE_GAIN:
 667                 ret = ov4689_map_gain(ov4689, ctrl->val, &sensor_gain);
 668
 669                 ret = ret ?:
 670                         ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_H,
 671                                          OV4689_REG_VALUE_08BIT,
 672                                          (sensor_gain >> OV4689_GAIN_H_SHIFT) &
 673                                          OV4689_GAIN_H_MASK);
 674                 ret = ret ?:
 675                         ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_L,
 676                                          OV4689_REG_VALUE_08BIT,
 677                                          sensor_gain & OV4689_GAIN_L_MASK);
 678                 break;
 679         case V4L2_CID_VBLANK:
 680                 ret = ov4689_write_reg(ov4689->client, OV4689_REG_VTS,
 681                                        OV4689_REG_VALUE_16BIT,
 682                                        ctrl->val + ov4689->cur_mode->height);
 683                 break;
 684         case V4L2_CID_TEST_PATTERN:
 685                 ret = ov4689_enable_test_pattern(ov4689, ctrl->val);
 686                 break;
 687         default:
 688                 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
 689                          __func__, ctrl->id, ctrl->val);
 690                 ret = -EINVAL;
 691                 break;
 692         }
 693
 694         pm_runtime_put(&client->dev);
 695
 696         return ret;
 697 }
 698
 699 static const struct v4l2_ctrl_ops ov4689_ctrl_ops = {
 700         .s_ctrl = ov4689_set_ctrl,
 701 };
 702
 703 static int ov4689_initialize_controls(struct ov4689 *ov4689)
 704 {
 705         struct i2c_client *client = v4l2_get_subdevdata(&ov4689->subdev);
 706         struct v4l2_fwnode_device_properties props;
 707         struct v4l2_ctrl_handler *handler;
 708         const struct ov4689_mode *mode;
 709         s64 exposure_max, vblank_def;
 710         struct v4l2_ctrl *ctrl;
 711         s64 h_blank_def;
 712         int ret;
 713
 714         handler = &ov4689->ctrl_handler;
 715         mode = ov4689->cur_mode;
 716         ret = v4l2_ctrl_handler_init(handler, 10);
 717         if (ret)
 718                 return ret;
 719         handler->lock = &ov4689->mutex;
 720
 721         ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, 0, 0,
 722                                       link_freq_menu_items);
 723         if (ctrl)
 724                 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 725
 726         v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 0,
 727                           mode->pixel_rate, 1, mode->pixel_rate);
 728
 729         h_blank_def = mode->hts_def - mode->width;
 730         ctrl = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, h_blank_def,
 731                                  h_blank_def, 1, h_blank_def);
 732         if (ctrl)
 733                 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 734
 735         vblank_def = mode->vts_def - mode->height;
 736         v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_VBLANK,
 737                           vblank_def, OV4689_VTS_MAX - mode->height, 1,
 738                           vblank_def);
 739
 740         exposure_max = mode->vts_def - 4;
 741         ov4689->exposure =
 742                 v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_EXPOSURE,
 743                                   OV4689_EXPOSURE_MIN, exposure_max,
 744                                   OV4689_EXPOSURE_STEP, mode->exp_def);
 745
 746         v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
 747                           ov4689_gain_ranges[0].logical_min,
 748                           ov4689_gain_ranges[ARRAY_SIZE(ov4689_gain_ranges) - 1]
 749                                   .logical_max,
 750                           OV4689_GAIN_STEP, OV4689_GAIN_DEFAULT);
 751
 752         v4l2_ctrl_new_std_menu_items(handler, &ov4689_ctrl_ops,
 753                                      V4L2_CID_TEST_PATTERN,
 754                                      ARRAY_SIZE(ov4689_test_pattern_menu) - 1,
 755                                      0, 0, ov4689_test_pattern_menu);
 756
 757         if (handler->error) {
 758                 ret = handler->error;
 759                 dev_err(&ov4689->client->dev, "Failed to init controls(%d)\n",
 760                         ret);
 761                 goto err_free_handler;
 762         }
 763
 764         ret = v4l2_fwnode_device_parse(&client->dev, &props);
 765         if (ret)
 766                 goto err_free_handler;
 767
 768         ret = v4l2_ctrl_new_fwnode_properties(handler, &ov4689_ctrl_ops,
 769                                               &props);
 770         if (ret)
 771                 goto err_free_handler;
 772
 773         ov4689->subdev.ctrl_handler = handler;
 774
 775         return 0;
 776
 777 err_free_handler:
 778         v4l2_ctrl_handler_free(handler);
 779
 780         return ret;
 781 }
 782
 783 static int ov4689_check_sensor_id(struct ov4689 *ov4689,
 784                                   struct i2c_client *client)
 785 {
 786         struct device *dev = &ov4689->client->dev;
 787         u32 id = 0;
 788         int ret;
 789
 790         ret = ov4689_read_reg(client, OV4689_REG_CHIP_ID,
 791                               OV4689_REG_VALUE_16BIT, &id);
 792         if (ret) {
 793                 dev_err(dev, "Cannot read sensor ID\n");
 794                 return ret;
 795         }
 796
 797         if (id != CHIP_ID) {
 798                 dev_err(dev, "Unexpected sensor ID %06x, expected %06x\n",
 799                         id, CHIP_ID);
 800                 return -ENODEV;
 801         }
 802
 803         dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
 804
 805         return 0;
 806 }
 807
 808 static int ov4689_configure_regulators(struct ov4689 *ov4689)
 809 {
 810         unsigned int i;
 811
 812         for (i = 0; i < ARRAY_SIZE(ov4689_supply_names); i++)
 813                 ov4689->supplies[i].supply = ov4689_supply_names[i];
 814
 815         return devm_regulator_bulk_get(&ov4689->client->dev,
 816                                        ARRAY_SIZE(ov4689_supply_names),
 817                                        ov4689->supplies);
 818 }
 819
 820 static u64 ov4689_check_link_frequency(struct v4l2_fwnode_endpoint *ep)
 821 {
 822         const u64 *freqs = link_freq_menu_items;
 823         unsigned int i, j;
 824
 825         for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
 826                 for (j = 0; j < ep->nr_of_link_frequencies; j++)
 827                         if (freqs[i] == ep->link_frequencies[j])
 828                                 return freqs[i];
 829         }
 830
 831         return 0;
 832 }
 833
 834 static int ov4689_check_hwcfg(struct device *dev)
 835 {
 836         struct fwnode_handle *fwnode = dev_fwnode(dev);
 837         struct v4l2_fwnode_endpoint bus_cfg = {
 838                 .bus_type = V4L2_MBUS_CSI2_DPHY,
 839         };
 840         struct fwnode_handle *endpoint;
 841         int ret;
 842
 843         endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL);
 844         if (!endpoint)
 845                 return -EINVAL;
 846
 847         ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg);
 848         fwnode_handle_put(endpoint);
 849         if (ret)
 850                 return ret;
 851
 852         if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV4689_LANES) {
 853                 dev_err(dev, "Only a 4-lane CSI2 config is supported");
 854                 ret = -EINVAL;
 855                 goto out_free_bus_cfg;
 856         }
 857
 858         if (!ov4689_check_link_frequency(&bus_cfg)) {
 859                 dev_err(dev, "No supported link frequency found\n");
 860                 ret = -EINVAL;
 861         }
 862
 863 out_free_bus_cfg:
 864         v4l2_fwnode_endpoint_free(&bus_cfg);
 865
 866         return ret;
 867 }
 868
 869 static int ov4689_probe(struct i2c_client *client)
 870 {
 871         struct device *dev = &client->dev;
 872         struct v4l2_subdev *sd;
 873         struct ov4689 *ov4689;
 874         int ret;
 875
 876         ret = ov4689_check_hwcfg(dev);
 877         if (ret)
 878                 return ret;
 879
 880         ov4689 = devm_kzalloc(dev, sizeof(*ov4689), GFP_KERNEL);
 881         if (!ov4689)
 882                 return -ENOMEM;
 883
 884         ov4689->client = client;
 885         ov4689->cur_mode = &supported_modes[OV4689_MODE_2688_1520];
 886
 887         ov4689->xvclk = devm_clk_get_optional(dev, NULL);
 888         if (IS_ERR(ov4689->xvclk))
 889                 return dev_err_probe(dev, PTR_ERR(ov4689->xvclk),
 890                                      "Failed to get external clock\n");
 891
 892         if (!ov4689->xvclk) {
 893                 dev_dbg(dev,
 894                         "No clock provided, using clock-frequency property\n");
 895                 device_property_read_u32(dev, "clock-frequency",
 896                                          &ov4689->clock_rate);
 897         } else {
 898                 ov4689->clock_rate = clk_get_rate(ov4689->xvclk);
 899         }
 900
 901         if (ov4689->clock_rate != OV4689_XVCLK_FREQ) {
 902                 dev_err(dev,
 903                         "External clock rate mismatch: got %d Hz, expected %d Hz\n",
 904                         ov4689->clock_rate, OV4689_XVCLK_FREQ);
 905                 return -EINVAL;
 906         }
 907
 908         ov4689->reset_gpio = devm_gpiod_get_optional(dev, "reset",
 909                                                      GPIOD_OUT_LOW);
 910         if (IS_ERR(ov4689->reset_gpio)) {
 911                 dev_err(dev, "Failed to get reset-gpios\n");
 912                 return PTR_ERR(ov4689->reset_gpio);
 913         }
 914
 915         ov4689->pwdn_gpio = devm_gpiod_get_optional(dev, "pwdn", GPIOD_OUT_LOW);
 916         if (IS_ERR(ov4689->pwdn_gpio)) {
 917                 dev_err(dev, "Failed to get pwdn-gpios\n");
 918                 return PTR_ERR(ov4689->pwdn_gpio);
 919         }
 920
 921         ret = ov4689_configure_regulators(ov4689);
 922         if (ret)
 923                 return dev_err_probe(dev, ret,
 924                                      "Failed to get power regulators\n");
 925
 926         mutex_init(&ov4689->mutex);
 927
 928         sd = &ov4689->subdev;
 929         v4l2_i2c_subdev_init(sd, client, &ov4689_subdev_ops);
 930         ret = ov4689_initialize_controls(ov4689);
 931         if (ret)
 932                 goto err_destroy_mutex;
 933
 934         ret = ov4689_power_on(dev);
 935         if (ret)
 936                 goto err_free_handler;
 937
 938         ret = ov4689_check_sensor_id(ov4689, client);
 939         if (ret)
 940                 goto err_power_off;
 941
 942         sd->internal_ops = &ov4689_internal_ops;
 943         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 944
 945         ov4689->pad.flags = MEDIA_PAD_FL_SOURCE;
 946         sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
 947         ret = media_entity_pads_init(&sd->entity, 1, &ov4689->pad);
 948         if (ret < 0)
 949                 goto err_power_off;
 950
 951         ret = v4l2_async_register_subdev_sensor(sd);
 952         if (ret) {
 953                 dev_err(dev, "v4l2 async register subdev failed\n");
 954                 goto err_clean_entity;
 955         }
 956
 957         pm_runtime_set_active(dev);
 958         pm_runtime_enable(dev);
 959         pm_runtime_idle(dev);
 960
 961         return 0;
 962
 963 err_clean_entity:
 964         media_entity_cleanup(&sd->entity);
 965 err_power_off:
 966         ov4689_power_off(dev);
 967 err_free_handler:
 968         v4l2_ctrl_handler_free(&ov4689->ctrl_handler);
 969 err_destroy_mutex:
 970         mutex_destroy(&ov4689->mutex);
 971
 972         return ret;
 973 }
 974
 975 static void ov4689_remove(struct i2c_client *client)
 976 {
 977         struct v4l2_subdev *sd = i2c_get_clientdata(client);
 978         struct ov4689 *ov4689 = to_ov4689(sd);
 979
 980         v4l2_async_unregister_subdev(sd);
 981         media_entity_cleanup(&sd->entity);
 982
 983         v4l2_ctrl_handler_free(&ov4689->ctrl_handler);
 984         mutex_destroy(&ov4689->mutex);
 985
 986         pm_runtime_disable(&client->dev);
 987         if (!pm_runtime_status_suspended(&client->dev))
 988                 ov4689_power_off(&client->dev);
 989         pm_runtime_set_suspended(&client->dev);
 990 }
 991
 992 static const struct of_device_id ov4689_of_match[] = {
 993         { .compatible = "ovti,ov4689" },
 994         {},
 995 };
 996 MODULE_DEVICE_TABLE(of, ov4689_of_match);
 997
 998 static struct i2c_driver ov4689_i2c_driver = {
 999         .driver = {
1000                 .name = "ov4689",
1001                 .pm = &ov4689_pm_ops,
1002                 .of_match_table = ov4689_of_match,
1003         },
1004         .probe = ov4689_probe,
1005         .remove = ov4689_remove,
1006 };
1007
1008 module_i2c_driver(ov4689_i2c_driver);
1009
1010 MODULE_DESCRIPTION("OmniVision ov4689 sensor driver");
1011 MODULE_LICENSE("GPL");