Stefan Roese [Mon, 16 Nov 2020 17:02:30 +0000 (18:02 +0100)]
net: e1000: Add missing address translations
Add some missing address translations from virtual address in local DRAM
to physical address, which is needed for the DMA transactions to work
correctly.
This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.
Stefan Roese [Mon, 16 Nov 2020 17:02:29 +0000 (18:02 +0100)]
net: e1000: Use virt_to_phys() instead of pci_virt_to_mem()
Using (dm_)pci_virt_to_mem() is incorrect to translate the virtual
address in local DRAM to a physical address. The correct macro here
is virt_to_phys() so switch to using this macro.
As virt_to_bus() is now not used any more, this patch also removes
both definitions (DM and non-DM).
This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.
Jernej Skrabec [Mon, 11 Jan 2021 20:11:53 +0000 (21:11 +0100)]
sunxi: Add support for OrangePi Zero2
OrangePi Zero2 is SBC based on Allwinner H616 with 1 GiB of RAM, SD card
support, gigabit ethernet, micro HDMI, WIFI, Bluetooth and 1 USB 2.0
port. It also has two GPIO headers which allows further peripherals to
be used.
The devicetree file is taken from v3 of the OrangePi Zero2 Linux
submission [1], which it's not yet merged.
Jernej Skrabec [Mon, 11 Jan 2021 20:11:46 +0000 (21:11 +0100)]
sunxi: Add support for H616 SoC
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.
Andre Przywara [Mon, 11 Jan 2021 20:11:44 +0000 (21:11 +0100)]
mmc: sunxi: Refactor mod clock register offset
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid becoming trapped with some compatible fallback strings, let's
remove the whole struct sunxi_mmc_variant, and replace this with a SoC
based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols.
Jernej Skrabec [Mon, 11 Jan 2021 20:11:43 +0000 (21:11 +0100)]
sunxi: Add H616 DRAM support
Allwinner H616 supports many types of DRAM. Most notably it supports
LPDDR4. However, all commercially available boards at this time use
only DDR3, so this commit adds only DDR3 support.
Controller and MBUS are very similar to H6 but PHY is completely
unknown.
Andre Przywara [Mon, 11 Jan 2021 20:11:39 +0000 (21:11 +0100)]
sunxi: support loading with SPL > 32KB
H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
driver and need for PMIC configuration, which pulls several drivers which
are not needed otherwise.
spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with
that, reported in SPL header. If size in header is bigger, it will use
that value instead.
In the process of function rework, also add missing function argument.
Jernej Skrabec [Mon, 11 Jan 2021 20:11:36 +0000 (21:11 +0100)]
i2c: mvtwsi: sunxi: update macro
While currently none of the newer Allwinner SoCs currently has I2C
support implemented in U-Boot, this will change soon. mvtwsi driver is
good as it is for them except one macro. Update it to be ready once I2C
support lands for those SoCs.
Jernej Skrabec [Mon, 11 Jan 2021 20:11:34 +0000 (21:11 +0100)]
sunxi: Introduce common symbol for H6 like SoCs
It turns out that there are at least 2 other SoCs which have basically
the same memory map, similar clocks and other features as H6. It's very
likely that we'll see more such SoCs in the future. In order to ease
porting to new SoCs and lower ifdef clutter, introduce common symbol for
them.
Andre Przywara [Mon, 18 Jan 2021 23:23:59 +0000 (23:23 +0000)]
sunxi: Properly check for SATAPWR and MACPWR
The #ifdef CONFIG_xxxPWR conditionals were not working as expected, as
string Kconfig symbols are always "defined" from the preprocessor's
perspective. This lead to unnecessary calls to the GPIO routines, but
also always added a half a second delay to wait for a SATA disk to power
up. Many thanks to Peter for pointing this out!
Fix this by properly comparing the Kconfig symbols against the empty
string. strcmp() would be nicer for this, but GCC does not optimise this
away, probably due to our standalone compiler switches.
Jernej Skrabec [Wed, 6 Jan 2021 17:02:57 +0000 (18:02 +0100)]
sunxi: Add support for Tanix TX6
This commit adds support for Tanix TX6 TV box, based on H6. It's low end
H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
peripherals.
Andre Przywara [Sat, 14 Nov 2020 17:37:46 +0000 (17:37 +0000)]
net: sun8i-emac: Allow all RGMII PHY modes
So far all GBit users of the sun8i-emac driver were using the "rgmii"
PHY mode, even though this turns out to be wrong. It just worked because
the PHY driver doesn't do the proper setup (yet).
In fact for most boards the "rgmii-id" or "rgmii-txid" PHY modes are the
correct ones.
To allow the DTs to describe the phy-mode correctly, and to stay
compatible with Linux, at least allow those other RGMII modes in the
driver.
This avoids breakage if mainline DTs will be synced with U-Boot.
Tom Rini [Mon, 25 Jan 2021 14:02:06 +0000 (09:02 -0500)]
Merge tag 'doc-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for documentation tag doc-2021-04-rc1 (2)
* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
* Adjust suppression of newline in echo command.
* Provide unit test for echo command.
Tom Rini [Mon, 25 Jan 2021 14:01:28 +0000 (09:01 -0500)]
Merge tag 'u-boot-atmel-2021.04-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel features for 2021.04 cycle
This feature set includes macb updates for all interfaces and new
sama7g5 variant support; micrel ksz9031 DLL support; a new board from
Giant based on Adafruit feather form factor which contains a SAMA5D27
SoC; several fixes regarding the NAND flash PMECC block; and pincontrol
drive strength support for pio4 controller.
By default the echo command emits its arguments followed by a line feed.
If any of the arguments contains the sub-string "\c", the line feed is
suppressed.
This does not match shells used in Linux and BSD where the first argument
has to be -n to suppress the line feed.
The hush shell interferes with the parsing of backslashes. E.g. in the
following command line quadruple backslashes are required for suppressing
the line feed:
for i in 1 2 3; do for j in 4 5; do echo \\\\c ${i}${j}; done; echo; done;
To avoid unexpected behavior the patch changes echo to use -n as first
argument to suppress the line feed.
Weijie Gao [Thu, 12 Nov 2020 08:37:14 +0000 (16:37 +0800)]
reset: reset-mtmips: add DM_FLAG_PRE_RELOC flag
Add DM_FLAG_PRE_RELOC flag for reset-mtmips to make sure this driver can
be probed before relocation even if u-boot,dm-pre-reloc is not present
in the dts.
Weijie Gao [Thu, 12 Nov 2020 08:37:02 +0000 (16:37 +0800)]
mmc: mtk-sd: add pad control settings for MediaTek MT7620/MT76x8 SoCs
The driver is missing pad control settings (pad delay and pad conf) for
the mt7620 and mt76x8. Although mt76x8 still works well, mt7620 will
encounter CRC error on data transfers.
This patch adds default pad control settings for mt7620_compat.
Weijie Gao [Thu, 12 Nov 2020 08:36:53 +0000 (16:36 +0800)]
net: add ethernet driver for MediaTek MT7620 SoC
This patch adds ethernet driver for MediaTek MT7620 SoC.
The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in
7-port switch and two xMII interfaces (can be MII/RMII/RGMII).
The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be
configured to connect to either the intergrited FE PHY, or the xMII.
Port 5 always connects to the xMII. Port 6 is the CPU port.
This driver supports MT7530 giga switch connects to port 5.
Weijie Gao [Thu, 12 Nov 2020 08:36:42 +0000 (16:36 +0800)]
spi: add spi controller support for MediaTek MT7620 SoC
This patch adds spi controller support for MediaTek MT7620 SoC.
The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.
Weijie Gao [Thu, 12 Nov 2020 08:36:10 +0000 (16:36 +0800)]
clk: add clock driver for MediaTek MT7620 SoC
This patch adds a clock driver for MediaTek MT7620 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.
Weijie Gao [Thu, 12 Nov 2020 08:36:05 +0000 (16:36 +0800)]
serial: add uart driver for MediaTek MT7620 SoC
This patch adds uart support for MediaTek MT7620 and earlier SoCs.
The UART used by MT7620 is incompatible with the ns16550a driver.
All registers of this UART have different addresses. A special 16-bit
register for Divisor Latch is used to set the baudrate instead of the
original two 8-bit registers (DLL and DLM).
The driver supports of-platdata which is useful for tiny SPL.
Weijie Gao [Thu, 12 Nov 2020 08:36:00 +0000 (16:36 +0800)]
configs: mtmips: refresh for mt7628 based boards
Since mt7620 is added into Kconfig, the CONFIG_SOC_MT7628=y which is
omitted by default must be added back, otherwise make xxx_defconfig for
these boards will be configured for mt7620 platform.
Weijie Gao [Thu, 12 Nov 2020 08:35:38 +0000 (16:35 +0800)]
mips: enable _machine_restart for spl
The sysreset driver has a config CONFIG_SPL_SYSRESET for the spl stage.
Change CONFIG_SYSRESET to CONFIG_IS_ENABLED(SYSRESET) will give spl a
chance to use _machine_restart instead of the sysreset driver.
Weijie Gao [Thu, 12 Nov 2020 08:35:23 +0000 (16:35 +0800)]
mips: mtmips: move mt7628 related Kconfig into mt7628 subdirectory
This patch is a preparation for add a new soc fot mtmips.
Move all mt7628 related Kconfig (boards and UART selection) into mt7628
subdirectory and make sure the top directory of mtmips contains only
selection for SoCs.
Unfortunately we now see a number of now-fatal warnings about duplicate
labels. It is often unclear how best to re-write the document in
question to not duplicate these otherwise logical headings.
Marc Ferland [Mon, 4 Jan 2021 19:07:53 +0000 (14:07 -0500)]
arm: dart6ul: fix ddr size macro
The previous macro was off by one bit and so we were getting a ddr
size which was twice the real size. This commit refactors the macro so
it returns the right size in _bytes_ and modifies the printf call so the
size is still printed in MiB.
Marek Vasut [Mon, 18 Jan 2021 23:58:32 +0000 (00:58 +0100)]
spi: imx: Define register bits in the driver
The CSPI/ECSPI register bits do not differ between newer SoCs, instead
of having multiple copies of the same thing for each iMX SoC, define
the bits in the driver.
Marek Vasut [Mon, 18 Jan 2021 23:58:31 +0000 (00:58 +0100)]
clk: imx: Add ECSPI to iMX8MN
Add ECSPI clock entries to iMX8MN clock driver. Only make those entries
available in case SPI support in U-Boot is enabled at all to conserve
space, esp. in SPL.
Adam Ford [Mon, 18 Jan 2021 21:43:09 +0000 (15:43 -0600)]
arm64: dts: imx8mm-beacon: Resync imx8mm-beacon-som with 5.11-rc4
In order to support the QSPI chip on the SOM, the Flexspi bus
needs to be configured to talk with the SPI chip.
Resync the som device tree with 5.11-rc4
Martin Fuzzey [Wed, 13 Jan 2021 10:21:03 +0000 (11:21 +0100)]
w1: mxc: fix build
Now that header files no longer include common.h it must be included
first.
Otherwise the build fails with errors like
include/asm/arch/clock.h:43:1: error: unknown type name 'u32'
u32 imx_get_uartclk(void);
Fixes: c3dc39a2f85b ("arm: Don't include common.h in header files") Signed-off-by: Martin Fuzzey <[email protected]> Reviewed-by: Simon Glass <[email protected]>
Marc Ferland [Mon, 4 Jan 2021 15:41:57 +0000 (10:41 -0500)]
arm: dart6ul: enable DM_ETH for the dart6ul
This patch converts the dart6ul ethernet support to DM_ETH and cleans
up the legacy ethernet code. The clean up, more specifically:
* moves the fec2 node and pin definition to the carrier board DTS
since the phy associated with it is on the carrier board and not on
the SoM;
* add the reset pin associated to each phy;
* separate the ethernet, mdio and reset pins of each fec so that they
are easier to reference;
* add clock properties to the phy nodes since they are connected to the
50Mhz ENET[12]_TX_CLK clock of the SoC;
* remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty.
Sean Anderson [Mon, 28 Dec 2020 19:58:30 +0000 (14:58 -0500)]
mx6ul(l)evk: Enable DM_ETH_PHY
This fixes eth0 not initializing properly. Both eth0 and eth1 use the
MDIO interface on eth1 to access their PHYs. However, without
DM_ETH_PHY, eth0 still tries to use its own MDIO interface to access its
phy. Before this patch, a boot log might contain lines like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Could not get PHY for FEC0: addr 2
After this patch they now look like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Get shared mii bus on ethernet@2188000
Warning: ethernet@2188000 using MAC address from ROM
, eth0: ethernet@2188000
As an alternative to DM_ETH_PHY, FEC_MXC_SHARE_MDIO could also have been
used to achieve the same effect.
Alice Guo [Fri, 18 Dec 2020 07:19:27 +0000 (15:19 +0800)]
board: imx8mp: add boot.cmd for distro boot on iMX8MP
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value
"/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Alice Guo [Fri, 18 Dec 2020 07:19:26 +0000 (15:19 +0800)]
imx8mp: configs: add support for distro boot commands
Supported boot device types in iMX8MP: MMC.
CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution. kernel_addr_r is the location in RAM where
the kernel will be loaded to. Delete unnecessary environment variables
because "run distro_bootcmd" is set to be the default boot mode.
On the iMX8MP platform I used, "mmc1" represents SD card and "mmc2"
represents eMMC.
Alice Guo [Fri, 18 Dec 2020 06:50:08 +0000 (14:50 +0800)]
board: imx8mm: add boot.cmd for distro boot on iMX8MM
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value "
/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
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