Prevent a buffer overflow in mkimage when signing with SHA256
Due to the FIT_MAX_HASH_LEN constant not having been updated
to support SHA256 signatures one will always see a buffer
overflow in fit_image_process_hash when signing images that
use this larger hash. This is exposed by vboot_test.sh.
Signed-off-by: Michael van der Westhuizen <[email protected]> Acked-by: Simon Glass <[email protected]>
[trini: Rework a bit so move the exportable parts of hash.h outside of
!USE_HOSTCC and only need that as a new include to image.h] Signed-off-by: Tom Rini <[email protected]>
Heiko Schocher [Wed, 28 May 2014 09:33:34 +0000 (11:33 +0200)]
mpc8313, signed fit: enable legacy image format on ids8313 board
Enable legacy image format with CONFIG_IMAGE_FORMAT_LEGACY
on the ids8313 board, as it uses signed FIT images for booting
Linux and need the legacy image format.
Heiko Schocher [Wed, 28 May 2014 09:33:33 +0000 (11:33 +0200)]
bootm: make use of legacy image format configurable
make the use of legacy image format configurable through
the config define CONFIG_IMAGE_FORMAT_LEGACY.
When relying on signed FIT images with required signature check
the legacy image format should be disabled. Therefore introduce
this new define and enable legacy image format if CONFIG_FIT_SIGNATURE
is not set. If CONFIG_FIT_SIGNATURE is set disable per default
the legacy image format.
Jon Loeliger [Tue, 27 May 2014 14:12:48 +0000 (09:12 -0500)]
FDT: Fix DTC repository references
The Device Tree Compiler (DTC) used to have its master
repository located on jdl.com. While it is still there,
its official, new, shiny location is on kernel.org here:
fat: Define MAX_CLUSTSIZE using CONFIG_FS_FAT_MAX_CLUSTSIZE
Define the MAX_CLUSTSIZE to default of 65536 only if
CONFIG_FS_FAT_MAX_CLUSTSIZE is not defined.
This option has been provided to save memory in some
memory constrained cases.
Franck Jullien [Wed, 21 May 2014 20:43:50 +0000 (22:43 +0200)]
openrisc: fix relocation code
The relocation code can now relocate from anywhere to
the RAM.
The old code assumed that the binary was copied to the RAM
by some PBL and then it just relocated the .text section
from the loaded address to the linked address.
Now, it first checks if vectors are somewhere else than the
linked address. If yes, there are copied to address 0 (or
to the exception vector base address if register EVBAR is
present).
Then, the .text section is relocated from its current location
to the RAM.
Franck Jullien [Wed, 21 May 2014 20:43:49 +0000 (22:43 +0200)]
openrisc: update SPR registers definition
The OpenRISC architecture specification v1.0 defines
new SPR registers. This patch adds registers definition
for group 0 and update bit definitions for the CPU
configuration register.
phy: fix create_phy_by_mask for when its given an actual search mask
get_phy_id returns -EIO when it can't read from a phy at a given addr. This would cause
create_phy_by_mask to return prematurely before it had tested the other addresses in the provided mask.
Example usage:
Replace
phydev = phy_connect(bus, phy_addr, dev, phy_if)
with
phydev = phy_find_by_mask(bus, phy_mask, phy_if)
if (phydev)
phy_connect_dev(phydev, dev);
Simon Glass [Fri, 30 May 2014 20:41:50 +0000 (14:41 -0600)]
Fix hush to give the correct return code for a simple command
When a simple command like 'false' is provided, hush should return the
result of that command. However, hush only does this if the
FLAG_EXIT_FROM_LOOP flag is provided. Without this flag, hush will
happily execute the empty string command immediate after 'false' and
then return a success code.
This behaviour does not seem very useful, and requiring the flag also
seems wrong, since it means that hush will execute only the first command
in a sequence.
Add a check for empty string and fall out of the loop in that case. That
at least fixes the simple command case. This is a change in behaviour but
it is unlikely that the old behaviour would be considered correct in any
case.
Simon Glass [Fri, 30 May 2014 20:41:48 +0000 (14:41 -0600)]
Add final result tests for run_command_list()
run_command_list() is supposed to return a return code of 0 for success
and 1 for failure. Add a few simple tests that confirm this. These tests
work both with the built-in parser and hush.
Simon Glass [Fri, 11 Apr 2014 02:01:35 +0000 (20:01 -0600)]
main: Make the execution path a little clearer in main.c
bootdelay_process() never returns in some circumstances, whichs makes the
control flow confusing. Change it so that the decision about how to execute
the boot command is made in the main_loop() code, so it is easier to follow.
Move CLI stuff to cli.c.
Simon Glass [Fri, 11 Apr 2014 02:01:32 +0000 (20:01 -0600)]
m68k: powerpc: Clean up do_mdm_init
This code seems unnecessarily complex. We really just need to check the
global_data. Now that is it all in one place, and not arch-specific, this
is pretty easy.
Heiko Schocher [Thu, 22 May 2014 10:43:05 +0000 (12:43 +0200)]
dm: rename device struct to udevice
using UBI and DM together leads in compiler error, as
both define a "struct device", so rename "struct device"
in include/dm/device.h to "struct udevice", as we use
linux code (MTD/UBI/UBIFS some USB code,...) and cannot
change the linux "struct device"
Andreas Bießmann [Mon, 19 May 2014 12:23:39 +0000 (14:23 +0200)]
mkimage: add atmelimage
The new atmelimage converts a machine code BLOB to bootable ROM image. Atmel
ROM has no sophisticated image format, it only checks the first 7 ARM vectors.
The vectors can contain valid B or LDR opcodes, the 6'th vector contains the
image size to load.
Additionally the PMECC header can be written by the atmelimage target. The
parameters must be given via the -n switch as a coma separated list. For
example:
A provided image can be checked for correct header setup. It prints out the
PMECC header parameters if it has one and the 6'th interrupt vector content.
Bo Shen [Thu, 24 Apr 2014 03:42:16 +0000 (11:42 +0800)]
ARM: atmel: at91sam9x5ek: convert to generic board
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following
warning on boot:
"Warning: Your board does not use generic board. Please read
doc/README.generic-board and take action. Boards not
upgraded by the late 2014 may break or be removed."
Bo Shen [Thu, 24 Apr 2014 03:42:15 +0000 (11:42 +0800)]
ARM: atmel: at91sam9m10g45ek: convert to generic board
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following
warning on boot:
"Warning: Your board does not use generic board. Please read
doc/README.generic-board and take action. Boards not
upgraded by the late 2014 may break or be removed."
Bo Shen [Thu, 24 Apr 2014 03:42:14 +0000 (11:42 +0800)]
ARM: atmel: sama5d3_xplained: convert to generic board
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following
warning on boot:
"Warning: Your board does not use generic board. Please read
doc/README.generic-board and take action. Boards not
upgraded by the late 2014 may break or be removed."
Bo Shen [Thu, 24 Apr 2014 03:42:13 +0000 (11:42 +0800)]
ARM: atmel: sama5d3xek: convert to generic board
Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following
warning on boot:
"Warning: Your board does not use generic board. Please read
doc/README.generic-board and take action. Boards not
upgraded by the late 2014 may break or be removed."
Bo Shen [Wed, 19 Mar 2014 06:48:44 +0000 (14:48 +0800)]
ARM: atmel: switch to main crystal osc for SPL boot
If without switch to main crystal oscillator, the sama5d3 SoC will
use internal on chip RC oscillator.
In order to get better accuracy, switch to main crystal oscillator.
Ian Campbell [Wed, 14 May 2014 18:30:29 +0000 (19:30 +0100)]
net/designware: reorder struct dw_eth_dev to pack more efficiently.
On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote:
> The {r,t}xbuffs fields also need to be aligned. Previously this was done
> implicitly because they immediately followed the descriptor tables. Make this
> explicit and also move to the head of the struct.
Looks like I managed to not actually commit the move of the field to the
head of the struct! v3.1 follows....
Ian.
8<------------
>From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001
From: Ian Campbell <[email protected]>
Date: Thu, 1 May 2014 19:45:15 +0100
Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more
efficiently.
The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could
be 256 or even larger. That means there is a potentially huge hole in the
struct before those fields, so move them to the front where they are better
packed.
Moving them to the front also helps ensure that so long as dw_eth_dev is
properly aligned (which it is since "net/designware: ensure device private data
is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids
having to worry too much about compiler specifics.
The {r,t}xbuffs fields also need to be aligned. Previously this was done
implicitly because they immediately followed the descriptor tables. Make this
explicit and also move to the head of the struct.
Ian Campbell [Thu, 8 May 2014 21:26:33 +0000 (22:26 +0100)]
net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN
This is required at least on ARM.
When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.
Ian Campbell [Thu, 8 May 2014 21:26:32 +0000 (22:26 +0100)]
net/designware: ensure device private data is DMA aligned.
struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
is aligned to a dma boundary. Without this I see:
ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0
Ian Campbell [Mon, 5 May 2014 13:42:31 +0000 (14:42 +0100)]
sunxi: mmc support
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
> > + case 1:
> > +#if CONFIG_MMC1_PG
> Are you sure that this is correct and shouldn't be:
>
> +#ifdef CONFIG_MMC1_PG
>
> ?
It's "correct" in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...
> A quick scan through this patch series shows that this define
> is not set at all. Perhaps its outdated? Or is it used to support
> some other sunxi SoC? Not sure, perhaps it should be removed for
> now.
...I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.
> Other than this please add my:
>
> Reviewed-by: Stefan Roese <[email protected]>
Ian Campbell [Mon, 5 May 2014 10:52:26 +0000 (11:52 +0100)]
sunxi: add sun7i cpu, board and start of day support
This patch adds generic board, start of day and basic build system support for
the Allwinner A20 (sun7i) processor. This code will not been compiled until the
build is hooked up in a later patch. It has been split out to keep the patches
manageable.
Ian Campbell [Mon, 5 May 2014 10:52:25 +0000 (11:52 +0100)]
sunxi: add sun7i dram setup support
This patch adds DRAM initialisation support for the Allwinner A20 (sun7i)
processor. This code will not been compiled until the build is hooked up in a
later patch. It has been split out to keep the patches manageable.
Ian Campbell [Mon, 5 May 2014 10:52:24 +0000 (11:52 +0100)]
sunxi: add sun7i pinmux and gpio support
This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i)
processor. This code will not been compiled until the build is hooked up in a
later patch. It has been split out to keep the patches manageable.
Ian Campbell [Mon, 5 May 2014 10:52:23 +0000 (11:52 +0100)]
sunxi: add sun7i clocks and timer support.
This patch adds the basic clocks and timer support for the Allwinner A20
(sun7i) processor. This code will not been compiled until the build is hooked
up in a later patch. It has been split out to keep the patches manageable.
Some of the code here is common to multiple sunxi subarchtectures, hence files
are named sun4i which is the earliest similar variant.
Stefan Agner [Wed, 23 Apr 2014 16:17:51 +0000 (18:17 +0200)]
arm: vf610: add DDR_SEL_PAD_CONTR register
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.
projects / u-boot.git / log