Git Repo - u-boot.git/commit

]> Git Repo - u-boot.git/commit

author	Simon Glass <[email protected]>
	Sat, 4 Jul 2015 00:28:21 +0000 (18:28 -0600)
committer	Simon Glass <[email protected]>
	Wed, 15 Jul 2015 00:03:19 +0000 (18:03 -0600)
commit	e1e332c8f2e5cac70566998a0ba0ccfdea437f10
tree	0c3abcb9110ea2a766a6cc455464397834e406d9	tree \| snapshot
parent	a452002259e172c93277dbe5752817e0732afe78	commit \| diff

dm: spi: Correct status register access width

The status register on ICH9 is a single byte, so use byte access when
writing to it, to avoid updating the control register also.

Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>

drivers/spi/ich.c

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