]> Git Repo - u-boot.git/commit
arm: socfpga: gen5: reduce SPL pre-reloc malloc
authorSimon Goldschmidt <[email protected]>
Tue, 9 Apr 2019 19:02:06 +0000 (21:02 +0200)
committerMarek Vasut <[email protected]>
Wed, 24 Apr 2019 22:00:49 +0000 (00:00 +0200)
commit9dc61aac2ddc05b7118599c12c2a390d642189af
treeccefe89314acbc2b9a0e1d7a450eeb1cb83b584c
parentaef44283ac8e4d150f9faa87e16d9b962fc7ef5d
arm: socfpga: gen5: reduce SPL pre-reloc malloc

By enabling debug prints in malloc_simple, we can see that SPL for socfpga
gen5 does by far not need the 8 KiB malloc pool currently allocated for
SPL in pre-reloc phase.

On socfpga_socrates, 1304 bytes are currently used (and this increases by
~200 bytes only for the sdram/reset fixes in socfpga-next).

To prevent wasting precious SRAM space, let's reduce the initial heap used
for SPL to 2 KiB. This is still some hundred bytes more than currently
used. Also, the gen5 SPL enables stack and heap in DDR memory pretty
early. Only the initial uclass/dm parsing, serial console and DDR
initialization is done in the initial heap, so these 2 KiB should be
enough for all boards.

Signed-off-by: Simon Goldschmidt <[email protected]>
Acked-by: Marek Vasut <[email protected]>
arch/arm/mach-socfpga/Kconfig
This page took 0.033261 seconds and 4 git commands to generate.