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video: sunxi: dw-hdmi: Use DM for clock gates and resets
authorSamuel Holland <[email protected]>
Mon, 28 Nov 2022 07:02:27 +0000 (01:02 -0600)
committerAndre Przywara <[email protected]>
Tue, 11 Apr 2023 23:17:20 +0000 (00:17 +0100)
commit7108dd24439375dafa3fcfab9415e930b0abb4b3
tree069e4887c8ae25ce2ff4720d888c85fbc14bbc7atree | snapshot
parent9e804638bfe2693a908abf066ff66c251572afa7commit | diff
video: sunxi: dw-hdmi: Use DM for clock gates and resets

This abstracts away the CCU register layout, which is necessary for
supporting new SoCs like H6 with a reorganized CCU. One of the resets is
referenced from the PHY node instead of the controller node, so it will
have to wait until the PHY code is factored out to a separate driver.

Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
drivers/video/sunxi/sunxi_dw_hdmi.c diff | blob | blame | history
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