cache: include asm/cache.h for ARCH_DMA_MINALIGN definition

cache: include asm/cache.h for ARCH_DMA_MINALIGN definition

ARCH_DMA_MINALIGN will be used to allocate DMA buffers that are
aligned correctly.  In all current cases this means that the DMA
buffer will be aligned to at least the L1 data cache line size of
the configured architecture.  If the board configuration file
does not specify the architecture L1 data cache line size then the
maximum line size of the architecture is used to align DMA buffers.

Signed-off-by: Anton Staaf <[email protected]>
Cc: Mike Frysinger <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ilya Yanok <[email protected]>
Cc: Laurence Withers <[email protected]>