SPDX: Convert all of our single license tags to Linux Kernel style

[u-boot.git] / board / freescale / c29xpcie / c29xpcie.c

diff --git a/board/freescale/c29xpcie/c29xpcie.c b/board/freescale/c29xpcie/c29xpcie.c
index f964d6185aa0f35c0047d7c397acc7734638d894..8ee3e140bbfb5dbf54dc6f7e29a4a45f3b856337 100644 (file)
--- a/board/freescale/c29xpcie/c29xpcie.c
+++ b/board/freescale/c29xpcie/c29xpcie.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -11,7 +10,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
@@ -38,10 +37,10 @@ int checkboard(void)
 
 int board_early_init_f(void)
 {
-       struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
+       struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
 
        /* Clock configuration to access CPLD using IFC(GPCM) */
-       setbits_be32(&ifc->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
+       setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
 
        return 0;
 }
@@ -49,7 +48,7 @@ int board_early_init_f(void)
 int board_early_init_r(void)
 {
        const unsigned long flashbase = CONFIG_SYS_FLASH_BASE;
-       const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+       int flash_esel = find_tlb_idx((void *)flashbase, 1);
 
        /*
         * Remap Boot flash region to caching-inhibited
@@ -60,8 +59,14 @@ int board_early_init_r(void)
        flush_dcache();
        invalidate_icache();
 
-       /* invalidate existing TLB entry for flash */
-       disable_tlb(flash_esel);
+       if (flash_esel == -1) {
+               /* very unlikely unless something is messed up */
+               puts("Error: Could not find TLB for FLASH BASE\n");
+               flash_esel = 1; /* give our best effort to continue */
+       } else {
+               /* invalidate existing TLB entry for flash */
+               disable_tlb(flash_esel);
+       }
 
        set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
                        MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
@@ -77,9 +82,9 @@ void pci_init_board(void)
 }
 #endif /* ifdef CONFIG_PCI */
 
-#ifdef CONFIG_TSEC_ENET
 int board_eth_init(bd_t *bis)
 {
+#ifdef CONFIG_TSEC_ENET
        struct fsl_pq_mdio_info mdio_info;
        struct tsec_info_struct tsec_info[2];
        int num = 0;
@@ -104,10 +109,10 @@ int board_eth_init(bd_t *bis)
        fsl_pq_mdio_init(bis, &mdio_info);
 
        tsec_eth_init(bis, tsec_info, num);
+#endif
 
        return pci_eth_init(bis);
 }
-#endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 void fdt_del_sec(void *blob, int offset)
@@ -116,13 +121,13 @@ void fdt_del_sec(void *blob, int offset)
 
        while ((nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,sec-v6.0",
                        CONFIG_SYS_CCSRBAR_PHYS + CONFIG_SYS_FSL_SEC_OFFSET
-                       + offset * 0x20000)) >= 0) {
+                       + offset * CONFIG_SYS_FSL_SEC_IDX_OFFSET)) >= 0) {
                fdt_del_node(blob, nodeoff);
                offset++;
        }
 }
 
-void ft_board_setup(void *blob, bd_t *bd)
+int ft_board_setup(void *blob, bd_t *bd)
 {
        phys_addr_t base;
        phys_size_t size;
@@ -132,8 +137,8 @@ void ft_board_setup(void *blob, bd_t *bd)
 
        ft_cpu_setup(blob, bd);
 
-       base = getenv_bootm_low();
-       size = getenv_bootm_size();
+       base = env_get_bootm_low();
+       size = env_get_bootm_size();
 
 #if defined(CONFIG_PCI)
        FT_FSL_PCI_SETUP;
@@ -144,5 +149,7 @@ void ft_board_setup(void *blob, bd_t *bd)
                fdt_del_sec(blob, 1);
        else if (cpu->soc_ver == SVR_C292)
                fdt_del_sec(blob, 2);
+
+       return 0;
 }
 #endif