common: Drop asm/global_data.h from common header

[u-boot.git] / arch / riscv / lib / andes_plic.c

diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
index 5cf29df670cc8a8486fc39fc35f3b128bb00245a..221a5fe324e2ab1449e45277c5262844a9299920 100644 (file)
--- a/arch/riscv/lib/andes_plic.c
+++ b/arch/riscv/lib/andes_plic.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <asm/global_data.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/uclass-internal.h>
@@ -41,53 +42,45 @@ static int enable_ipi(int hart)
        return 0;
 }
 
-static int init_plic(void)
+int riscv_init_ipi(void)
 {
-       struct udevice *dev;
-       ofnode node;
        int ret;
+       long *base = syscon_get_first_range(RISCV_SYSCON_PLIC);
+       ofnode node;
+       struct udevice *dev;
        u32 reg;
 
+       if (IS_ERR(base))
+               return PTR_ERR(base);
+       gd->arch.plic = base;
+
        ret = uclass_find_first_device(UCLASS_CPU, &dev);
        if (ret)
                return ret;
+       else if (!dev)
+               return -ENODEV;
 
-       if (ret == 0 && dev) {
-               ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
-                       const char *device_type;
-
-                       device_type = ofnode_read_string(node, "device_type");
-                       if (!device_type)
-                               continue;
+       ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
+               const char *device_type;
 
-                       if (strcmp(device_type, "cpu"))
-                               continue;
+               device_type = ofnode_read_string(node, "device_type");
+               if (!device_type)
+                       continue;
 
-                       /* skip if hart is marked as not available */
-                       if (!ofnode_is_available(node))
-                               continue;
+               if (strcmp(device_type, "cpu"))
+                       continue;
 
-                       /* read hart ID of CPU */
-                       ret = ofnode_read_u32(node, "reg", &reg);
-                       if (ret == 0)
-                               enable_ipi(reg);
-               }
+               /* skip if hart is marked as not available */
+               if (!ofnode_is_available(node))
+                       continue;
 
-               return 0;
+               /* read hart ID of CPU */
+               ret = ofnode_read_u32(node, "reg", &reg);
+               if (ret == 0)
+                       enable_ipi(reg);
        }
 
-       return -ENODEV;
-}
-
-int riscv_init_ipi(void)
-{
-       long *ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
-
-       if (IS_ERR(ret))
-               return PTR_ERR(ret);
-       gd->arch.plic = ret;
-
-       return init_plic();
+       return 0;
 }
 
 int riscv_send_ipi(int hart)