Merge tag 'v2024.07-rc5' into next

[u-boot.git] / drivers / pinctrl / rockchip / pinctrl-rockchip-core.c

diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 3e74e2f14895dd47c8c80f3cd459867bf897c477..d449d07d32e74d1dec1978b1405bec94887908a2 100644 (file)
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -13,10 +13,10 @@
 #include <linux/libfdt.h>
 
 #include "pinctrl-rockchip.h"
+#include <dt-bindings/pinctrl/rockchip.h>
 
 #define MAX_ROCKCHIP_PINS_ENTRIES      30
 #define MAX_ROCKCHIP_GPIO_PER_BANK      32
-#define RK_FUNC_GPIO                    0
 
 static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
 {
@@ -131,8 +131,12 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
        if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
                return RK_FUNC_GPIO;
 
-       regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
-                               ? priv->regmap_pmu : priv->regmap_base;
+       if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+               regmap = priv->regmap_pmu;
+       else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
+               regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
+       else
+               regmap = priv->regmap_base;
 
        /* get basic quadrupel of mux registers and the correct reg inside */
        mux_type = bank->iomux[iomux_num].type;
@@ -142,6 +146,28 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
        if (bank->recalced_mask & BIT(pin))
                rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
+       if (IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) {
+               if (bank->bank_num == 0) {
+                       if (pin >= RK_PB4 && pin <= RK_PD7) {
+                               u32 reg0 = 0;
+
+                               reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */
+                               ret = regmap_read(regmap, reg0, &val);
+                               if (ret)
+                                       return ret;
+
+                               ret = ((val >> bit) & mask);
+                               if (ret != 8)
+                                       return ret;
+
+                               reg = reg + 0x8000; /* BUS_IOC_BASE */
+                               regmap = priv->regmap_base;
+                       }
+               } else if (bank->bank_num > 0) {
+                       reg += 0x8000; /* BUS_IOC_BASE */
+               }
+       }
+
        ret = regmap_read(regmap, reg, &val);
        if (ret)
                return ret;
@@ -171,7 +197,7 @@ static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
        }
 
        if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
-               if (mux != IOMUX_GPIO_ONLY) {
+               if (mux != RK_FUNC_GPIO) {
                        debug("pin %d only supports a gpio mux\n", pin);
                        return -ENOTSUPP;
                }
@@ -531,12 +557,14 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 
                        /* preset iomux offset value, set new start value */
                        if (iom->offset >= 0) {
-                               if (iom->type & IOMUX_SOURCE_PMU)
+                               if ((iom->type & IOMUX_SOURCE_PMU) ||
+                                   (iom->type & IOMUX_L_SOURCE_PMU))
                                        pmu_offs = iom->offset;
                                else
                                        grf_offs = iom->offset;
                        } else { /* set current iomux offset */
-                               iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+                               iom->offset = ((iom->type & IOMUX_SOURCE_PMU) ||
+                                              (iom->type & IOMUX_L_SOURCE_PMU)) ?
                                                        pmu_offs : grf_offs;
                        }