reset: Remove addr parameter from reset_cpu()

[u-boot.git] / board / hisilicon / hikey / hikey.c

diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index 72d6334b5f69c0f17166b4a2ad0a12c811bfd039..c9a2d60ee56c0212676326126b8a65d3e6df86e2 100644 (file)
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -1,17 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2015 Linaro
  * Peter Griffin <[email protected]>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
+#include <cpu_func.h>
 #include <dm.h>
+#include <fdt_support.h>
+#include <init.h>
+#include <log.h>
+#include <asm/global_data.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <errno.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <power/hi6553_pmic.h>
 #include <asm-generic/gpio.h>
 #include <asm/arch/dwmmc.h>
@@ -22,7 +27,7 @@
 #include <asm/armv8/mmu.h>
 
 /*TODO drop this table in favour of device tree */
-static const struct hikey_gpio_platdata hi6220_gpio[] = {
+static const struct hikey_gpio_plat hi6220_gpio[] = {
        { 0, HI6220_GPIO_BASE(0)},
        { 1, HI6220_GPIO_BASE(1)},
        { 2, HI6220_GPIO_BASE(2)},
@@ -46,7 +51,7 @@ static const struct hikey_gpio_platdata hi6220_gpio[] = {
 
 };
 
-U_BOOT_DEVICES(hi6220_gpios) = {
+U_BOOT_DRVINFOS(hi6220_gpios) = {
        { "gpio_hi6220", &hi6220_gpio[0] },
        { "gpio_hi6220", &hi6220_gpio[1] },
        { "gpio_hi6220", &hi6220_gpio[2] },
@@ -73,7 +78,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if !CONFIG_IS_ENABLED(OF_CONTROL)
 
-static const struct pl01x_serial_platdata serial_platdata = {
+static const struct pl01x_serial_plat serial_plat = {
 #if CONFIG_CONS_INDEX == 1
        .base = HI6220_UART0_BASE,
 #elif CONFIG_CONS_INDEX == 4
@@ -85,9 +90,9 @@ static const struct pl01x_serial_platdata serial_platdata = {
        .clock = 19200000
 };
 
-U_BOOT_DEVICE(hikey_seriala) = {
+U_BOOT_DRVINFO(hikey_seriala) = {
        .name = "serial_pl01x",
-       .platdata = &serial_platdata,
+       .plat = &serial_plat,
 };
 #endif
 
@@ -295,13 +300,47 @@ static void mmc1_reset_clk(void)
                data = readl(&peri_sc->rst0_stat);
        } while (!(data & PERI_RST0_MMC1));
 
-       /* unreset mmc0 clock domain */
+       /* unreset mmc1 clock domain */
        writel(PERI_RST0_MMC1, &peri_sc->rst0_dis);
        do {
                data = readl(&peri_sc->rst0_stat);
        } while (data & PERI_RST0_MMC1);
 }
 
+static void mmc0_reset_clk(void)
+{
+       unsigned int data;
+
+       /* disable mmc0 bus clock */
+       hi6220_clk_disable(PERI_CLK0_MMC0, &peri_sc->clk0_dis);
+
+       /* enable mmc0 bus clock */
+       hi6220_clk_enable(PERI_CLK0_MMC0, &peri_sc->clk0_en);
+
+       /* reset mmc0 clock domain */
+       writel(PERI_RST0_MMC0, &peri_sc->rst0_en);
+
+       /* bypass mmc0 clock phase */
+       data = readl(&peri_sc->ctrl2);
+       data |= 3;
+       writel(data, &peri_sc->ctrl2);
+
+       /* disable low power */
+       data = readl(&peri_sc->ctrl13);
+       data |= 1 << 3;
+       writel(data, &peri_sc->ctrl13);
+       do {
+               data = readl(&peri_sc->rst0_stat);
+       } while (!(data & PERI_RST0_MMC0));
+
+       /* unreset mmc0 clock domain */
+       writel(PERI_RST0_MMC0, &peri_sc->rst0_dis);
+       do {
+               data = readl(&peri_sc->rst0_stat);
+       } while (data & PERI_RST0_MMC0);
+}
+
+
 /* PMU SSI is the IP that maps the external PMU hi6553 registers as IO */
 static void hi6220_pmussi_init(void)
 {
@@ -341,15 +380,16 @@ int board_init(void)
        return 0;
 }
 
-#ifdef CONFIG_GENERIC_MMC
+#ifdef CONFIG_MMC
 
 static int init_dwmmc(void)
 {
-       int ret;
+       int ret = 0;
 
-#ifdef CONFIG_DWMMC
+#ifdef CONFIG_MMC_DW
 
-       /* mmc0 clocks are already configured by ATF */
+       /* mmc0 pll is already configured by ATF */
+       mmc0_reset_clk();
        ret = hi6220_pinmux_config(PERIPH_ID_SDMMC0);
        if (ret)
                printf("%s: Error configuring pinmux for eMMC (%d)\n"
@@ -390,7 +430,7 @@ int power_init_board(void)
        return 0;
 }
 
-int board_mmc_init(bd_t *bis)
+int board_mmc_init(struct bd_info *bis)
 {
        int ret;
 
@@ -410,7 +450,7 @@ int dram_init(void)
        return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
        /*
         * Reserve regions below from DT memory node (which gets generated
@@ -442,9 +482,11 @@ void dram_init_banksize(void)
 
        gd->bd->bi_dram[5].start = 0x22000000;
        gd->bd->bi_dram[5].size = 0x1c000000;
+
+       return 0;
 }
 
-void reset_cpu(ulong addr)
+void reset_cpu(void)
 {
        writel(0x48698284, &ao_sc->stat0);
        wfi();