+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
* With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spi.h>
#include <asm/mpc8xxx_spi.h>
-#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
-#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
+enum {
+ SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */
+ SPI_EV_NF = BIT(31 - 23), /* Transmitter Not Full */
+};
-#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
-#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
-#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
-#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
+enum {
+ SPI_MODE_LOOP = BIT(31 - 1), /* Loopback mode */
+ SPI_MODE_CI = BIT(31 - 2), /* Clock invert */
+ SPI_MODE_CP = BIT(31 - 3), /* Clock phase */
+ SPI_MODE_DIV16 = BIT(31 - 4), /* Divide clock source by 16 */
+ SPI_MODE_REV = BIT(31 - 5), /* Reverse mode - MSB first */
+ SPI_MODE_MS = BIT(31 - 6), /* Always master */
+ SPI_MODE_EN = BIT(31 - 7), /* Enable interface */
+
+ SPI_MODE_LEN_MASK = 0xf00000,
+ SPI_MODE_PM_MASK = 0xf0000,
+
+ SPI_COM_LST = BIT(31 - 9),
+};
#define SPI_TIMEOUT 1000
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
{
struct spi_slave *slave;
void spi_init(void)
{
- volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
+ spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
/*
* SPI pins on the MPC83xx are not muxed, so all we do is initialize
* some registers
*/
- spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
- spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8
- (16.67MHz typ.) */
- spi->event = 0xffffffff; /* Clear all SPI events */
- spi->mask = 0x00000000; /* Mask all SPI interrupts */
- spi->com = 0; /* LST bit doesn't do anything, so disregard */
+ out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
+ /* Use SYSCLK / 8 (16.67MHz typ.) */
+ clrsetbits_be32(&spi->mode, 0x000f0000, BIT(16));
+ /* Clear all SPI events */
+ setbits_be32(&spi->event, 0xffffffff);
+ /* Mask all SPI interrupts */
+ clrbits_be32(&spi->mask, 0xffffffff);
+ /* LST bit doesn't do anything, so disregard */
+ out_be32(&spi->com, 0);
}
int spi_claim_bus(struct spi_slave *slave)
void spi_release_bus(struct spi_slave *slave)
{
-
}
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
- void *din, unsigned long flags)
+int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
+ ulong flags)
{
- volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
- unsigned int tmpdout, tmpdin, event;
- int numBlks = DIV_ROUND_UP(bitlen, 32);
- int tm, isRead = 0;
- unsigned char charSize = 32;
+ spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
+ uint tmpdout, tmpdin, event;
+ int num_blks = DIV_ROUND_UP(bitlen, 32);
+ int tm;
+ uchar char_size = 32;
- debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
- slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
+ debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
+ slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);
- spi->event = 0xffffffff; /* Clear all SPI events */
+ /* Clear all SPI events */
+ setbits_be32(&spi->event, 0xffffffff);
- /* handle data in 32-bit chunks */
- while (numBlks--) {
+ /* Handle data in 32-bit chunks */
+ while (num_blks--) {
tmpdout = 0;
- charSize = (bitlen >= 32 ? 32 : bitlen);
+ char_size = (bitlen >= 32 ? 32 : bitlen);
/* Shift data so it's msb-justified */
- tmpdout = *(u32 *) dout >> (32 - charSize);
+ tmpdout = *(u32 *)dout >> (32 - char_size);
/* The LEN field of the SPMODE register is set as follows:
*
* len > 16 0
*/
- spi->mode &= ~SPI_MODE_EN;
+ clrbits_be32(&spi->mode, SPI_MODE_EN);
- if (bitlen <= 16) {
- if (bitlen <= 4)
- spi->mode = (spi->mode & 0xff0fffff) |
- (3 << 20);
- else
- spi->mode = (spi->mode & 0xff0fffff) |
- ((bitlen - 1) << 20);
+ if (bitlen <= 4) {
+ clrsetbits_be32(&spi->mode, 0x00f00000, (3 << 20));
+ } else if (bitlen <= 16) {
+ clrsetbits_be32(&spi->mode, 0x00f00000,
+ ((bitlen - 1) << 20));
} else {
- spi->mode = (spi->mode & 0xff0fffff);
+ clrbits_be32(&spi->mode, 0x00f00000);
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
}
- spi->mode |= SPI_MODE_EN;
+ setbits_be32(&spi->mode, SPI_MODE_EN);
- spi->tx = tmpdout; /* Write the data out */
- debug("*** spi_xfer: ... %08x written\n", tmpdout);
+ /* Write the data out */
+ out_be32(&spi->tx, tmpdout);
+
+ debug("*** %s: ... %08x written\n", __func__, tmpdout);
/*
* Wait for SPI transmit to get out
* or time out (1 second = 1000 ms)
* The NE event must be read and cleared first
*/
- for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
- event = spi->event;
- if (event & SPI_EV_NE) {
- tmpdin = spi->rx;
- spi->event |= SPI_EV_NE;
- isRead = 1;
-
- *(u32 *) din = (tmpdin << (32 - charSize));
- if (charSize == 32) {
+ for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
+ event = in_be32(&spi->event);
+ bool have_ne = event & SPI_EV_NE;
+ bool have_nf = event & SPI_EV_NF;
+
+ if (have_ne) {
+ tmpdin = in_be32(&spi->rx);
+ setbits_be32(&spi->event, SPI_EV_NE);
+
+ *(u32 *)din = (tmpdin << (32 - char_size));
+ if (char_size == 32) {
/* Advance output buffer by 32 bits */
din += 4;
}
* in the future put an arbitrary delay after writing
* the device. Arbitrary delays suck, though...
*/
- if (isRead && (event & SPI_EV_NF))
+ if (have_ne && have_nf)
break;
}
if (tm >= SPI_TIMEOUT)
- puts("*** spi_xfer: Time out during SPI transfer");
+ debug("*** %s: Time out during SPI transfer\n",
+ __func__);
- debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
+ debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin);
}
if (flags & SPI_XFER_END)
projects / u-boot.git / blobdiff