dtoc: Tidy up more Python style in dtb_platdata

[u-boot.git] / drivers / timer / timer-uclass.c

diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index fe73f71819914c948e3bcac65d90e49b321f825c..62d0e860e80c527aa9d982fe3cb44be1c4bf7cef 100644 (file)
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -4,13 +4,17 @@
  */
 
 #include <common.h>
+#include <clk.h>
+#include <cpu.h>
 #include <dm.h>
 #include <dm/lists.h>
+#include <dm/device_compat.h>
 #include <dm/device-internal.h>
 #include <dm/root.h>
-#include <clk.h>
 #include <errno.h>
+#include <init.h>
 #include <timer.h>
+#include <linux/err.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -30,7 +34,8 @@ int notrace timer_get_count(struct udevice *dev, u64 *count)
        if (!ops->get_count)
                return -ENOSYS;
 
-       return ops->get_count(dev, count);
+       *count = ops->get_count(dev);
+       return 0;
 }
 
 unsigned long notrace timer_get_rate(struct udevice *dev)
@@ -48,6 +53,10 @@ static int timer_pre_probe(struct udevice *dev)
        int err;
        ulong ret;
 
+       /* It is possible that a timer device has a null ofnode */
+       if (!dev_of_valid(dev))
+               return 0;
+
        err = clk_get_by_index(dev, 0, &timer_clk);
        if (!err) {
                ret = clk_get_rate(&timer_clk);
@@ -73,6 +82,36 @@ static int timer_post_probe(struct udevice *dev)
        return 0;
 }
 
+/*
+ * TODO: should be CONFIG_IS_ENABLED(CPU), but the SPL config has _SUPPORT on
+ * the end...
+ */
+#if defined(CONFIG_CPU) || defined(CONFIG_SPL_CPU_SUPPORT)
+int timer_timebase_fallback(struct udevice *dev)
+{
+       struct udevice *cpu;
+       struct cpu_platdata *cpu_plat;
+       struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+       /* Did we get our clock rate from the device tree? */
+       if (uc_priv->clock_rate)
+               return 0;
+
+       /* Fall back to timebase-frequency */
+       dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
+       cpu = cpu_get_current_dev();
+       if (!cpu)
+               return -ENODEV;
+
+       cpu_plat = dev_get_parent_platdata(cpu);
+       if (!cpu_plat)
+               return -ENODEV;
+
+       uc_priv->clock_rate = cpu_plat->timebase_freq;
+       return 0;
+}
+#endif
+
 u64 timer_conv_64(u32 count)
 {
        /* increment tbh if tbl has rolled over */
@@ -108,7 +147,7 @@ int notrace dm_timer_init(void)
                 * If the timer is not marked to be bound before
                 * relocation, bind it anyway.
                 */
-               if (!lists_bind_fdt(dm_root(), node, &dev)) {
+               if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
                        ret = device_probe(dev);
                        if (ret)
                                return ret;