#define __CONFIG_H
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define CONFIG_NAND
#include <configs/ti_omap3_common.h>
/*
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_BCH
-
/* call misc_init_r */
#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
-#define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
-
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
-#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
-
-/* Configure SMSC9211 ethernet */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_SMC911X
-#define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE 0x2C000000
-#endif /* (CONFIG_CMD_NET) */
+#define CONFIG_ENV_OFFSET 0x240000
+#define CONFIG_ENV_ADDR 0x240000
/* Initial RAM setup */
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
/* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_MAX_ECCPOS 56
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */