]> Git Repo - u-boot.git/blobdiff - include/configs/sama5d2_ptc_ek.h
global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*
[u-boot.git] / include / configs / sama5d2_ptc_ek.h
index d99eaee18fd2f24d9f16be5e74fd3e7c7f7c8734..09cc4dddb2ad1c194e24ef04eee41e37ca84ac02 100644 (file)
@@ -1,11 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Configuration file for the SAMA5D2 PTC EK Board.
  *
  * Copyright (C) 2017 Microchip Technology Inc.
  *                   Wenyou Yang <[email protected]>
  *                   Ludovic Desroches <[email protected]>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
 #undef CONFIG_SYS_AT91_MAIN_CLOCK
 #define CONFIG_SYS_AT91_MAIN_CLOCK      24000000 /* from 24 MHz crystal */
 
-#define CONFIG_MISC_INIT_R
-
 /* SDRAM */
-#define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_SYS_SDRAM_BASE          0x20000000
 #define CONFIG_SYS_SDRAM_SIZE          0x20000000
 
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_LOAD_ADDR           0x22000000 /* load address */
-
 /* NAND Flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
+#define CFG_SYS_NAND_BASE              ATMEL_BASE_CS3
 /* our ALE is AD21 */
-#define CONFIG_SYS_NAND_MASK_ALE       BIT(21)
+#define CFG_SYS_NAND_MASK_ALE  BIT(21)
 /* our CLE is AD22 */
-#define CONFIG_SYS_NAND_MASK_CLE       BIT(22)
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
+#define CFG_SYS_NAND_MASK_CLE  BIT(22)
 #endif
 
 #endif /* __CONFIG_H */
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