]> Git Repo - u-boot.git/blobdiff - drivers/clk/sunxi/clk_a31.c
dm: treewide: Rename auto_alloc_size members to be shorter
[u-boot.git] / drivers / clk / sunxi / clk_a31.c
index 5bd8b7dcccfa935e7bad1448171a2f468a52c80c..9226112f4afdb5281df4340172e158774daecaa8 100644 (file)
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun6i-a31-ccu.h>
 #include <dt-bindings/reset/sun6i-a31-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate a31_gates[] = {
        [CLK_AHB1_MMC0]         = GATE(0x060, BIT(8)),
        [CLK_AHB1_MMC1]         = GATE(0x060, BIT(9)),
        [CLK_AHB1_MMC2]         = GATE(0x060, BIT(10)),
        [CLK_AHB1_MMC3]         = GATE(0x060, BIT(11)),
+       [CLK_AHB1_EMAC]         = GATE(0x060, BIT(17)),
+       [CLK_AHB1_SPI0]         = GATE(0x060, BIT(20)),
+       [CLK_AHB1_SPI1]         = GATE(0x060, BIT(21)),
+       [CLK_AHB1_SPI2]         = GATE(0x060, BIT(22)),
+       [CLK_AHB1_SPI3]         = GATE(0x060, BIT(23)),
        [CLK_AHB1_OTG]          = GATE(0x060, BIT(24)),
        [CLK_AHB1_EHCI0]        = GATE(0x060, BIT(26)),
        [CLK_AHB1_EHCI1]        = GATE(0x060, BIT(27)),
@@ -31,6 +37,11 @@ static struct ccu_clk_gate a31_gates[] = {
        [CLK_APB2_UART4]        = GATE(0x06c, BIT(20)),
        [CLK_APB2_UART5]        = GATE(0x06c, BIT(21)),
 
+       [CLK_SPI0]              = GATE(0x0a0, BIT(31)),
+       [CLK_SPI1]              = GATE(0x0a4, BIT(31)),
+       [CLK_SPI2]              = GATE(0x0a8, BIT(31)),
+       [CLK_SPI3]              = GATE(0x0ac, BIT(31)),
+
        [CLK_USB_PHY0]          = GATE(0x0cc, BIT(8)),
        [CLK_USB_PHY1]          = GATE(0x0cc, BIT(9)),
        [CLK_USB_PHY2]          = GATE(0x0cc, BIT(10)),
@@ -48,6 +59,11 @@ static struct ccu_reset a31_resets[] = {
        [RST_AHB1_MMC1]         = RESET(0x2c0, BIT(9)),
        [RST_AHB1_MMC2]         = RESET(0x2c0, BIT(10)),
        [RST_AHB1_MMC3]         = RESET(0x2c0, BIT(11)),
+       [RST_AHB1_EMAC]         = RESET(0x2c0, BIT(17)),
+       [RST_AHB1_SPI0]         = RESET(0x2c0, BIT(20)),
+       [RST_AHB1_SPI1]         = RESET(0x2c0, BIT(21)),
+       [RST_AHB1_SPI2]         = RESET(0x2c0, BIT(22)),
+       [RST_AHB1_SPI3]         = RESET(0x2c0, BIT(23)),
        [RST_AHB1_OTG]          = RESET(0x2c0, BIT(24)),
        [RST_AHB1_EHCI0]        = RESET(0x2c0, BIT(26)),
        [RST_AHB1_EHCI1]        = RESET(0x2c0, BIT(27)),
@@ -83,7 +99,7 @@ U_BOOT_DRIVER(clk_sun6i_a31) = {
        .name           = "sun6i_a31_ccu",
        .id             = UCLASS_CLK,
        .of_match       = a31_clk_ids,
-       .priv_auto_alloc_size   = sizeof(struct ccu_priv),
+       .priv_auto      = sizeof(struct ccu_priv),
        .ops            = &sunxi_clk_ops,
        .probe          = sunxi_clk_probe,
        .bind           = a31_clk_bind,
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