]> Git Repo - u-boot.git/blobdiff - arch/arm/dts/imx6qdl-wandboard.dtsi
arm64: xilinx: Fix file location described in zynqmp-p-a2197-00-revA.dts
[u-boot.git] / arch / arm / dts / imx6qdl-wandboard.dtsi
index 90aa43d21bb61e1f132b084d83c6b932bdadffba..ec6fba5ee8fdeb890fb7c87edcd05622550faa05 100644 (file)
@@ -8,10 +8,6 @@
 #include <dt-bindings/gpio/gpio.h>
 
 / {
-       aliases {
-               mmc0 = &usdhc3;
-       };
-
        chosen {
                stdout-path = &uart1;
        };
                spdif-out;
        };
 
+       reg_1p5v: regulator-1p5v {
+               compatible = "regulator-fixed";
+               regulator-name = "1P5V";
+               regulator-min-microvolt = <1500000>;
+               regulator-max-microvolt = <1500000>;
+               regulator-always-on;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "1P8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+       };
+
+       reg_2p8v: regulator-2p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "2P8V";
+               regulator-min-microvolt = <2800000>;
+               regulator-max-microvolt = <2800000>;
+               regulator-always-on;
+       };
+
        reg_2p5v: regulator-2p5v {
                compatible = "regulator-fixed";
                regulator-name = "2P5V";
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 &i2c2 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        codec: sgtl5000@a {
                VDDIO-supply = <&reg_3p3v>;
                lrclk-strength = <3>;
        };
+
+       camera@3c {
+               compatible = "ovti,ov5645";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ov5645>;
+               reg = <0x3c>;
+               clocks = <&clks IMX6QDL_CLK_CKO2>;
+               clock-names = "xclk";
+               clock-frequency = <24000000>;
+               vdddo-supply = <&reg_1p8v>;
+               vdda-supply = <&reg_2p8v>;
+               vddd-supply = <&reg_1p5v>;
+               enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
+
+               port {
+                       ov5645_to_mipi_csi2: endpoint {
+                               remote-endpoint = <&mipi_csi2_in>;
+                               clock-lanes = <0>;
+                               data-lanes = <1 2>;
+                       };
+               };
+       };
 };
 
 &iomuxc {
                                MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
                                MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
-                               MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;
                };
 
                        >;
                };
 
+               pinctrl_i2c1_gpio: i2c1gpiogrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D21__GPIO3_IO21          0x4001b8b0
+                               MX6QDL_PAD_EIM_D28__GPIO3_IO28          0x4001b8b0
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
                        >;
                };
 
+               pinctrl_i2c2_gpio: i2c2gpiogrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x4001b8b0
+                               MX6QDL_PAD_KEY_ROW3__GPIO4_IO13         0x4001b8b0
+                       >;
+               };
+
                pinctrl_mclk: mclkgrp {
                        fsl,pins = <
                                MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0
                        >;
                };
 
+               pinctrl_ov5645: ov5645grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_3__CCM_CLKO2            0x000b0
+                               MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x1b0b0
+                               MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b0b0
+                       >;
+               };
+
                pinctrl_spdif: spdifgrp {
                        fsl,pins = <
                                MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet>;
        phy-mode = "rgmii-id";
+       phy-handle = <&ethphy>;
        phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
-       interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
-                             <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
-       fsl,err006687-workaround-present;
        status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy: ethernet-phy@1 {
+                       reg = <1>;
+                       qca,clk-out-frequency = <125000000>;
+               };
+       };
+};
+
+&mipi_csi {
+       status = "okay";
+
+       port@0 {
+               reg = <0>;
+
+               mipi_csi2_in: endpoint {
+                       remote-endpoint = <&ov5645_to_mipi_csi2>;
+                       clock-lanes = <0>;
+                       data-lanes = <1 2>;
+               };
+       };
 };
 
 &spdif {
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