]> Git Repo - u-boot.git/blobdiff - arch/arm/dts/sun50i-h6.dtsi
Merge tag 'xilinx-for-v2025.01-rc1-v2' of https://source.denx.de/u-boot/custodians...
[u-boot.git] / arch / arm / dts / sun50i-h6.dtsi
index af8b7d0ef75068040ce7bcc569cdca8e618d30e6..82aa5679fc488d46830928fa982829b008259927 100644 (file)
@@ -4,6 +4,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/sun50i-h6-ccu.h>
 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/clock/sun8i-de2.h>
 #include <dt-bindings/clock/sun8i-tcon-top.h>
 #include <dt-bindings/reset/sun50i-h6-ccu.h>
@@ -67,7 +68,7 @@
                status = "disabled";
        };
 
-       osc24M: osc24M_clk {
+       osc24M: osc24M-clk {
                #clock-cells = <0>;
                compatible = "fixed-clock";
                clock-frequency = <24000000>;
                        display_clocks: clock@0 {
                                compatible = "allwinner,sun50i-h6-de3-clk";
                                reg = <0x0 0x10000>;
-                               clocks = <&ccu CLK_DE>,
-                                        <&ccu CLK_BUS_DE>;
-                               clock-names = "mod",
-                                             "bus";
+                               clocks = <&ccu CLK_BUS_DE>,
+                                        <&ccu CLK_DE>;
+                               clock-names = "bus",
+                                             "mod";
                                resets = <&ccu RST_BUS_DE>;
                                #clock-cells = <1>;
                                #reset-cells = <1>;
                        };
                };
 
+               video-codec-g2@1c00000 {
+                       compatible = "allwinner,sun50i-h6-vpu-g2";
+                       reg = <0x01c00000 0x1000>;
+                       interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_VP9>;
+                       iommus = <&iommu 5>;
+               };
+
                video-codec@1c0e000 {
                        compatible = "allwinner,sun50i-h6-video-engine";
                        reg = <0x01c0e000 0x2000>;
                        clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
                        clock-names = "core", "bus";
                        resets = <&ccu RST_BUS_GPU>;
+                       #cooling-cells = <2>;
                        status = "disabled";
                };
 
                ccu: clock@3001000 {
                        compatible = "allwinner,sun50i-h6-ccu";
                        reg = <0x03001000 0x1000>;
-                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
                        clock-names = "hosc", "losc", "iosc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                        };
                };
 
+               timer@3009000 {
+                       compatible = "allwinner,sun50i-h6-timer",
+                                    "allwinner,sun8i-a23-timer";
+                       reg = <0x03009000 0xa0>;
+                       interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&osc24M>;
+               };
+
                watchdog: watchdog@30090a0 {
                        compatible = "allwinner,sun50i-h6-wdt",
                                     "allwinner,sun6i-a31-wdt";
                                     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                                function = "spi1";
                        };
 
+                       /omit-if-no-ref/
                        spdif_tx_pin: spdif-tx-pin {
                                pins = "PH7";
                                function = "spdif";
                        clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
                        clock-names = "apb", "spdif";
                        resets = <&ccu RST_BUS_SPDIF>;
-                       dmas = <&dma 2>;
-                       dma-names = "tx";
-                       pinctrl-names = "default";
-                       pinctrl-0 = <&spdif_tx_pin>;
+                       dmas = <&dma 2>, <&dma 2>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_XHCI>,
                                 <&ccu CLK_BUS_XHCI>,
-                                <&rtc 0>;
+                                <&rtc CLK_OSC32K>;
                        clock-names = "ref", "bus_early", "suspend";
                        resets = <&ccu RST_BUS_XHCI>;
                        /*
                r_ccu: clock@7010000 {
                        compatible = "allwinner,sun50i-h6-r-ccu";
                        reg = <0x07010000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
                                 <&ccu CLK_PLL_PERIPH0>;
                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                        #clock-cells = <1>;
                        reg = <0x07022000 0x400>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
+                       clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                };
 
                gpu-thermal {
-                       polling-delay-passive = <0>;
-                       polling-delay = <0>;
+                       polling-delay-passive = <1000>;
+                       polling-delay = <2000>;
                        thermal-sensors = <&ths 1>;
+
+                       trips {
+                               gpu_alert0: gpu-alert-0 {
+                                       temperature = <95000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               gpu_alert1: gpu-alert-1 {
+                                       temperature = <100000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               gpu_alert2: gpu-alert-2 {
+                                       temperature = <105000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               gpu-crit {
+                                       temperature = <115000>;
+                                       hysteresis = <0>;
+                                       type = "critical";
+                               };
+                       };
+
+                       cooling-maps {
+                               // Forbid the GPU to go over 756MHz
+                               map0 {
+                                       trip = <&gpu_alert0>;
+                                       cooling-device = <&gpu 1 THERMAL_NO_LIMIT>;
+                               };
+
+                               // Forbid the GPU to go over 624MHz
+                               map1 {
+                                       trip = <&gpu_alert1>;
+                                       cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
+                               };
+
+                               // Forbid the GPU to go over 576MHz
+                               map2 {
+                                       trip = <&gpu_alert2>;
+                                       cooling-device = <&gpu 3 THERMAL_NO_LIMIT>;
+                               };
+                       };
                };
        };
 };
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