clk: rockchip: rk3308: Add support for SCLK_RTC32K clock

[u-boot.git] / arch / arm / include / asm / arch-rk3308 / cru_rk3308.h

diff --git a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
index 84b63e4d5682b94aca7e55f41f9b397b374a14b9..091ae82d7cc1750b7cca84095b2ef6fb43872ce7 100644 (file)
--- a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
@@ -147,6 +147,20 @@ enum {
        CORE_DIV_CON_SHIFT      = 0,
        CORE_DIV_CON_MASK       = 0x0f << CORE_DIV_CON_SHIFT,
 
+       /* CRU_CLK_SEL2_CON */
+       CLK_RTC32K_SEL_SHIFT    = 8,
+       CLK_RTC32K_SEL_MASK     = 3 << CLK_RTC32K_SEL_SHIFT,
+       CLK_RTC32K_IO           = 0,
+       CLK_RTC32K_PVTM,
+       CLK_RTC32K_FRAC_DIV,
+       CLK_RTC32K_DIV,
+
+       /* CRU_CLK_SEL3_CON */
+       CLK_RTC32K_FRAC_NUMERATOR_SHIFT         = 16,
+       CLK_RTC32K_FRAC_NUMERATOR_MASK          = 0xffff << 16,
+       CLK_RTC32K_FRAC_DENOMINATOR_SHIFT       = 0,
+       CLK_RTC32K_FRAC_DENOMINATOR_MASK        = 0xffff,
+
        /* CRU_CLK_SEL5_CON */
        BUS_PLL_SEL_SHIFT       = 6,
        BUS_PLL_SEL_MASK        = 0x3 << BUS_PLL_SEL_SHIFT,