* (C) Copyright 2007
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H__
*
* Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
*
- * TSIM command
- * tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu
+ * TSIM command:
+ * $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas
*
+ * In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are
+ * hard-coded to these values and need not be specified. (see below)
+ *
+ * Get TSIM from http://www.gaisler.com/index.php/downloads/simulators
*/
-#define CONFIG_LEON3 /* This is an LEON3 CPU */
-#define CONFIG_LEON 1 /* This is an LEON CPU */
#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
#define CONFIG_TSIM 1 /* ... running on TSIM */
/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
-/* Number of SPARC register windows */
-#define CONFIG_SYS_SPARC_NWINDOWS 8
-
/*
* Serial console configuration
*/
/*
* Supported commands
*/
-#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */
-#define CONFIG_CMD_BDI /* bdinfo */
-#define CONFIG_CMD_CONSOLE /* coninfo */
#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_ECHO /* echo arguments */
-#define CONFIG_CMD_FPGA /* FPGA configuration Support */
+#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_ITEST /* Integer (and string) test */
-#define CONFIG_CMD_LOADB /* loadb */
-#define CONFIG_CMD_LOADS /* loads */
-#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_RUN /* run command in env variable */
-#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
-#define CONFIG_CMD_SOURCE /* "source" command support */
-#define CONFIG_CMD_XIMG /* Load part of Multi Image */
/*
* Autobooting
*/
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_PREBOOT "echo;" \
"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
"echo"
#undef CONFIG_BOOTARGS
-/*#define CONFIG_SYS_HUSH_PARSER 0*/
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/export/roofs\0" \
"scratch=40000000\0" \
- "getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
- "ethaddr=00:00:7A:CC:00:12\0" \
+ "getkernel=tftpboot $(scratch) $(bootfile)\0" \
"bootargs=console=ttyS0,38400" \
""
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.81
#define CONFIG_IPADDR 192.168.0.80
-#define CONFIG_ROOTPATH /export/rootfs
+#define CONFIG_ROOTPATH "/export/rootfs"
#define CONFIG_HOSTNAME grxc3s1500
-#define CONFIG_BOOTFILE /uImage
+#define CONFIG_BOOTFILE "/uImage"
#define CONFIG_BOOTCOMMAND "run flash_self"
/*
* Memory map
*/
-#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_SDRAM_SIZE 0x02000000
-#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
+#define CONFIG_SYS_SDRAM_BASE 0x60000000
+#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */
+#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE)
-/* no SRAM available */
-#undef CONFIG_SYS_SRAM_BASE
-#undef CONFIG_SYS_SRAM_SIZE
+#define CONFIG_SYS_SRAM_BASE 0x40000000
+#define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */
+#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE)
/* Always Run U-Boot from SDRAM */
-#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
-#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
+#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
+#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_PROM_SIZE (8192-CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
+#ifdef CONFIG_CMD_NET
/*
* Ethernet configuration
*/
#define CONFIG_GRETH 1
-#define CONFIG_NET_MULTI 1
-
-/* Default HARDWARE address */
-#define GRETH_HWADDR_0 0x00
-#define GRETH_HWADDR_1 0x00
-#define GRETH_HWADDR_2 0x7A
-#define GRETH_HWADDR_3 0xcc
-#define GRETH_HWADDR_4 0x00
-#define GRETH_HWADDR_5 0x12
-
-#define CONFIG_ETHADDR 00:00:7a:cc:00:12
/*
* Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
/* #define CONFIG_GRETH_10MBIT 1 */
#define CONFIG_PHY_ADDR 0x00
+#endif /* CONFIG_CMD_NET */
+
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/***** Gaisler GRLIB IP-Cores Config ********/
-/* AMBA Plug & Play info display on startup */
-/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
-
#define CONFIG_SYS_GRLIB_SDRAM 0
+
#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
+
+/* No SDRAM Configuration */
+#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
+
+/* LEON2 MCTRL configuration */
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
#if CONFIG_GRSIM
/* GRSIM configuration */
-#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
#else
/* TSIM configuration */
-#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220
#endif
-#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
+#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
-#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
-#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
-#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
+/* GRLIB FT-MCTRL configuration */
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
+#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
/* no DDR controller */
-#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
+#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
/* no DDR2 Controller */
-#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
-#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
-
-#define CONFIG_SYS_GRLIB_APBUART_SCALER \
- ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
+#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
-#define CONFIG_IDENT_STRING "Gaisler GRSIM"
+/* TSIM command:
+ * $ ./tsim-leon3 -mmu -cas
+ *
+ * This TSIM evaluation version will expire 2015-04-02
+ *
+ *
+ * TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version)
+ *
+ * Copyright (C) 2014, Aeroflex Gaisler - all rights reserved.
+ * This software may only be used with a valid license.
+ * For latest updates, go to http://www.gaisler.com/
+ *
+ * serial port A on stdin/stdout
+ * allocated 4096 K SRAM memory, in 1 bank
+ * allocated 32 M SDRAM memory, in 1 bank
+ * allocated 2048 K ROM memory
+ * icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
+ * dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
+ * tsim> leon
+ * 0x80000000 Memory configuration register 1 0x000002ff
+ * 0x80000004 Memory configuration register 2 0x81805220
+ * 0x80000008 Memory configuration register 3 0x00000000
+ */
#endif /* __CONFIG_H */
projects / u-boot.git / blobdiff