1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
7 #ifndef __KEYMILE_COMMON_H
8 #define __KEYMILE_COMMON_H
10 #define WRG_RESET 0x80
11 #define H_OPORTS_14 0x40
15 #define OPRTL_XBUFENA 0x20
17 #define H_OPORTS_SCC4_ENA 0x10
18 #define H_OPORTS_SCC4_FD_ENA 0x04
19 #define H_OPORTS_FCC1_PW_DWN 0x01
21 #define PIGGY_PRESENT 0x80
28 unsigned char res1[3];
35 unsigned char res2[2];
37 unsigned char res3[0xfff0];
39 unsigned char pgy_rev;
40 unsigned char pgy_outputs;
41 unsigned char pgy_eth;
44 #define BFTICU_DIPSWITCH_MASK 0x0f
48 * BFTICU is used on mgcoge and mgocge3ne
51 u8 xi_ena; /* General defect enable */
111 u8 led_on; /* Leds */
113 u8 sfp_control; /* SFP modules */
115 u8 alarm_control; /* Alarm output */
117 u8 icps; /* ICN clock pulse shaping */
118 u8 mswitch; /* Read mode switch */
123 #if !defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET)
124 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 0
127 int ethernet_present(void);
128 int ivm_read_eeprom(unsigned char *buf, int len);
129 int ivm_analyze_eeprom(unsigned char *buf, int len);
131 int trigger_fpga_config(void);
132 int wait_for_fpga_config(void);
133 int fpga_reset(void);
134 int toggle_eeprom_spi_bus(void);
136 int get_testpin(void);
138 int set_km_env(void);
140 #define DELAY_ABORT_SEQ 62 /* @200kHz 9 clocks = 44us, 62us is ok */
141 #define DELAY_HALF_PERIOD (500 / (CONFIG_SYS_I2C_SPEED / 1000))
143 int i2c_soft_read_pin(void);
144 int i2c_make_abort(void);
145 #endif /* __KEYMILE_COMMON_H */