2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale Vybrid vf610twr board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_SYS_CACHELINE_SIZE 32
14 #include <asm/arch/imx-regs.h>
18 #define CONFIG_DISPLAY_CPUINFO
19 #define CONFIG_DISPLAY_BOARDINFO
20 #define CONFIG_SYS_FSL_CLK
22 #define CONFIG_MACH_TYPE 4146
24 #define CONFIG_SKIP_LOWLEVEL_INIT
26 /* Enable passing of ATAGs */
27 #define CONFIG_CMDLINE_TAG
29 #define CONFIG_CMD_FUSE
30 #ifdef CONFIG_CMD_FUSE
31 #define CONFIG_MXC_OCOTP
34 /* Size of malloc() pool */
35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
37 #define CONFIG_BOARD_EARLY_INIT_F
39 #define LPUART_BASE UART1_BASE
41 /* Allow to overwrite serial and ethaddr */
42 #define CONFIG_ENV_OVERWRITE
43 #define CONFIG_SYS_UART_PORT (1)
44 #define CONFIG_BAUDRATE 115200
47 #define CONFIG_CMD_NAND
48 #define CONFIG_CMD_NAND_TRIMFFS
49 #define CONFIG_SYS_NAND_ONFI_DETECTION
51 #ifdef CONFIG_CMD_NAND
52 #define CONFIG_USE_ARCH_MEMCPY
53 #define CONFIG_SYS_MAX_NAND_DEVICE 1
54 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
57 #define CONFIG_CMD_UBI
58 #define CONFIG_CMD_UBIFS
62 /* Dynamic MTD partition support */
63 #define CONFIG_CMD_MTDPARTS
64 #define CONFIG_MTD_PARTITIONS
65 #define CONFIG_MTD_DEVICE
66 #define MTDIDS_DEFAULT "nand0=fsl_nfc"
67 #define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \
77 #define CONFIG_FSL_ESDHC
78 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
79 #define CONFIG_SYS_FSL_ESDHC_NUM 1
81 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
83 #define CONFIG_CMD_MMC
84 #define CONFIG_GENERIC_MMC
85 #define CONFIG_CMD_FAT
86 #define CONFIG_DOS_PARTITION
88 #define CONFIG_CMD_PING
89 #define CONFIG_CMD_DHCP
90 #define CONFIG_CMD_MII
91 #define CONFIG_FEC_MXC
93 #define IMX_FEC_BASE ENET_BASE_ADDR
94 #define CONFIG_FEC_XCV_TYPE RMII
95 #define CONFIG_FEC_MXC_PHYADDR 0
97 #define CONFIG_PHY_MICREL
101 #ifdef CONFIG_FSL_QSPI
102 #define CONFIG_CMD_SF
103 #define FSL_QSPI_FLASH_SIZE (1 << 24)
104 #define FSL_QSPI_FLASH_NUM 2
105 #define CONFIG_SYS_FSL_QSPI_LE
109 #define CONFIG_CMD_I2C
110 #define CONFIG_SYS_I2C
111 #define CONFIG_SYS_I2C_MXC
112 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
113 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
114 #define CONFIG_SYS_SPD_BUS_NUM 0
116 #define CONFIG_BOOTDELAY 3
118 #define CONFIG_SYS_LOAD_ADDR 0x82000000
120 /* We boot from the gfxRAM area of the OCRAM. */
121 #define CONFIG_SYS_TEXT_BASE 0x3f408000
122 #define CONFIG_BOARD_SIZE_LIMIT 524288
125 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
126 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
127 * DDR3. Hence, limit the memory range for image processing to 112MB
128 * using bootm_size. All of the following must be within this range.
129 * We have the default load at 32MB into DDR (for the kernel), FDT at
130 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
131 * seen large trees). This allows a reasonable split between ramdisk
132 * and kernel size, where the ram disk can be a bit larger.
134 #define MEM_LAYOUT_ENV_SETTINGS \
135 "bootm_size=0x07000000\0" \
136 "loadaddr=0x82000000\0" \
137 "kernel_addr_r=0x82000000\0" \
138 "fdt_addr=0x84000000\0" \
139 "fdt_addr_r=0x84000000\0" \
140 "rdaddr=0x84080000\0" \
141 "ramdisk_addr_r=0x84080000\0"
143 #define CONFIG_EXTRA_ENV_SETTINGS \
144 MEM_LAYOUT_ENV_SETTINGS \
145 "script=boot.scr\0" \
148 "fdt_file=vf610-twr.dtb\0" \
151 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
153 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
154 "update_sd_firmware_filename=u-boot.imx\0" \
155 "update_sd_firmware=" \
156 "if test ${ip_dyn} = yes; then " \
157 "setenv get_cmd dhcp; " \
159 "setenv get_cmd tftp; " \
161 "if mmc dev ${mmcdev}; then " \
162 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
163 "setexpr fw_sz ${filesize} / 0x200; " \
164 "setexpr fw_sz ${fw_sz} + 1; " \
165 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
168 "mmcargs=setenv bootargs console=${console},${baudrate} " \
169 "root=${mmcroot}\0" \
171 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
172 "bootscript=echo Running bootscript from mmc ...; " \
174 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
175 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
176 "mmcboot=echo Booting from mmc ...; " \
178 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
179 "if run loadfdt; then " \
180 "bootz ${loadaddr} - ${fdt_addr}; " \
182 "if test ${boot_fdt} = try; then " \
185 "echo WARN: Cannot load the DT; " \
191 "netargs=setenv bootargs console=${console},${baudrate} " \
193 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
194 "netboot=echo Booting from net ...; " \
196 "if test ${ip_dyn} = yes; then " \
197 "setenv get_cmd dhcp; " \
199 "setenv get_cmd tftp; " \
201 "${get_cmd} ${image}; " \
202 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
203 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
204 "bootz ${loadaddr} - ${fdt_addr}; " \
206 "if test ${boot_fdt} = try; then " \
209 "echo WARN: Cannot load the DT; " \
216 #define CONFIG_BOOTCOMMAND \
217 "mmc dev ${mmcdev}; if mmc rescan; then " \
218 "if run loadbootscript; then " \
221 "if run loadimage; then " \
223 "else run netboot; " \
226 "else run netboot; fi"
228 /* Miscellaneous configurable options */
229 #define CONFIG_SYS_LONGHELP /* undef to save memory */
230 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
231 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
232 #undef CONFIG_AUTO_COMPLETE
233 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
234 #define CONFIG_SYS_PBSIZE \
235 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
236 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
237 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
239 #define CONFIG_CMD_MEMTEST
240 #define CONFIG_SYS_MEMTEST_START 0x80010000
241 #define CONFIG_SYS_MEMTEST_END 0x87C00000
245 * The stack sizes are set up in start.S using the settings below
247 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
249 /* Physical memory map */
250 #define CONFIG_NR_DRAM_BANKS 1
251 #define PHYS_SDRAM (0x80000000)
252 #define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
254 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
255 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
256 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
258 #define CONFIG_SYS_INIT_SP_OFFSET \
259 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
260 #define CONFIG_SYS_INIT_SP_ADDR \
261 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
263 /* FLASH and environment organization */
264 #define CONFIG_SYS_NO_FLASH
266 #ifdef CONFIG_ENV_IS_IN_MMC
267 #define CONFIG_ENV_SIZE (8 * 1024)
269 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
270 #define CONFIG_SYS_MMC_ENV_DEV 0
273 #ifdef CONFIG_ENV_IS_IN_NAND
274 #define CONFIG_ENV_SIZE (64 * 2048)
275 #define CONFIG_ENV_SECT_SIZE (64 * 2048)
276 #define CONFIG_ENV_RANGE (512 * 1024)
277 #define CONFIG_ENV_OFFSET 0x180000
280 #define CONFIG_OF_LIBFDT
281 #define CONFIG_CMD_BOOTZ