]> Git Repo - u-boot.git/blame_incremental - post/tests.c
projects / u-boot.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
ARM: mvebu: Allow MVNETA to be selected with Armada 3700 SoCs
[u-boot.git] / post / tests.c
... / ...
CommitLineData
1/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, [email protected].
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9
10#include <post.h>
11
12extern int ocm_post_test (int flags);
13extern int cache_post_test (int flags);
14extern int watchdog_post_test (int flags);
15extern int i2c_post_test (int flags);
16extern int rtc_post_test (int flags);
17extern int memory_post_test (int flags);
18extern int cpu_post_test (int flags);
19extern int fpu_post_test (int flags);
20extern int uart_post_test (int flags);
21extern int ether_post_test (int flags);
22extern int spi_post_test (int flags);
23extern int usb_post_test (int flags);
24extern int spr_post_test (int flags);
25extern int sysmon_post_test (int flags);
26extern int dsp_post_test (int flags);
27extern int codec_post_test (int flags);
28extern int ecc_post_test (int flags);
29extern int flash_post_test(int flags);
30
31extern int dspic_init_post_test (int flags);
32extern int dspic_post_test (int flags);
33extern int gdc_post_test (int flags);
34extern int fpga_post_test (int flags);
35extern int lwmon5_watchdog_post_test(int flags);
36extern int sysmon1_post_test(int flags);
37extern int coprocessor_post_test(int flags);
38extern int led_post_test(int flags);
39extern int button_post_test(int flags);
40extern int memory_regions_post_test(int flags);
41
42extern int sysmon_init_f (void);
43
44extern void sysmon_reloc (void);
45
46
47struct post_test post_list[] =
48{
49#if CONFIG_POST & CONFIG_SYS_POST_OCM
50 {
51 "OCM test",
52 "ocm",
53 "This test checks on chip memory (OCM).",
54 POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
55 &ocm_post_test,
56 NULL,
57 NULL,
58 CONFIG_SYS_POST_OCM
59 },
60#endif
61#if CONFIG_POST & CONFIG_SYS_POST_CACHE
62 {
63 "Cache test",
64 "cache",
65 "This test verifies the CPU cache operation.",
66 POST_RAM | POST_ALWAYS,
67 &cache_post_test,
68 NULL,
69 NULL,
70 CONFIG_SYS_POST_CACHE
71 },
72#endif
73#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
74#if defined(CONFIG_POST_WATCHDOG)
75 CONFIG_POST_WATCHDOG,
76#else
77 {
78 "Watchdog timer test",
79 "watchdog",
80 "This test checks the watchdog timer.",
81 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
82 &watchdog_post_test,
83 NULL,
84 NULL,
85 CONFIG_SYS_POST_WATCHDOG
86 },
87#endif
88#endif
89#if CONFIG_POST & CONFIG_SYS_POST_I2C
90 {
91 "I2C test",
92 "i2c",
93 "This test verifies the I2C operation.",
94 POST_RAM | POST_ALWAYS,
95 &i2c_post_test,
96 NULL,
97 NULL,
98 CONFIG_SYS_POST_I2C
99 },
100#endif
101#if CONFIG_POST & CONFIG_SYS_POST_RTC
102 {
103 "RTC test",
104 "rtc",
105 "This test verifies the RTC operation.",
106 POST_RAM | POST_SLOWTEST | POST_MANUAL,
107 &rtc_post_test,
108 NULL,
109 NULL,
110 CONFIG_SYS_POST_RTC
111 },
112#endif
113#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
114 {
115 "Memory test",
116 "memory",
117 "This test checks RAM.",
118 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
119 &memory_post_test,
120 NULL,
121 NULL,
122 CONFIG_SYS_POST_MEMORY
123 },
124#endif
125#if CONFIG_POST & CONFIG_SYS_POST_CPU
126 {
127 "CPU test",
128 "cpu",
129 "This test verifies the arithmetic logic unit of"
130 " CPU.",
131 POST_RAM | POST_ALWAYS,
132 &cpu_post_test,
133 NULL,
134 NULL,
135 CONFIG_SYS_POST_CPU
136 },
137#endif
138#if CONFIG_POST & CONFIG_SYS_POST_FPU
139 {
140 "FPU test",
141 "fpu",
142 "This test verifies the arithmetic logic unit of"
143 " FPU.",
144 POST_RAM | POST_ALWAYS,
145 &fpu_post_test,
146 NULL,
147 NULL,
148 CONFIG_SYS_POST_FPU
149 },
150#endif
151#if CONFIG_POST & CONFIG_SYS_POST_UART
152#if defined(CONFIG_POST_UART)
153 CONFIG_POST_UART,
154#else
155 {
156 "UART test",
157 "uart",
158 "This test verifies the UART operation.",
159 POST_RAM | POST_SLOWTEST | POST_MANUAL,
160 &uart_post_test,
161 NULL,
162 NULL,
163 CONFIG_SYS_POST_UART
164 },
165#endif /* CONFIG_POST_UART */
166#endif
167#if CONFIG_POST & CONFIG_SYS_POST_ETHER
168 {
169 "ETHERNET test",
170 "ethernet",
171 "This test verifies the ETHERNET operation.",
172 POST_RAM | POST_ALWAYS,
173 &ether_post_test,
174 NULL,
175 NULL,
176 CONFIG_SYS_POST_ETHER
177 },
178#endif
179#if CONFIG_POST & CONFIG_SYS_POST_USB
180 {
181 "USB test",
182 "usb",
183 "This test verifies the USB operation.",
184 POST_RAM | POST_ALWAYS,
185 &usb_post_test,
186 NULL,
187 NULL,
188 CONFIG_SYS_POST_USB
189 },
190#endif
191#if CONFIG_POST & CONFIG_SYS_POST_SPR
192 {
193 "SPR test",
194 "spr",
195 "This test checks SPR contents.",
196 POST_RAM | POST_ALWAYS,
197 &spr_post_test,
198 NULL,
199 NULL,
200 CONFIG_SYS_POST_SPR
201 },
202#endif
203#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
204 {
205 "SYSMON test",
206 "sysmon",
207 "This test monitors system hardware.",
208 POST_RAM | POST_ALWAYS,
209 &sysmon_post_test,
210 &sysmon_init_f,
211 &sysmon_reloc,
212 CONFIG_SYS_POST_SYSMON
213 },
214#endif
215#if CONFIG_POST & CONFIG_SYS_POST_DSP
216 {
217 "DSP test",
218 "dsp",
219 "This test checks any connected DSP(s).",
220 POST_RAM | POST_ALWAYS,
221 &dsp_post_test,
222 NULL,
223 NULL,
224 CONFIG_SYS_POST_DSP
225 },
226#endif
227#if CONFIG_POST & CONFIG_SYS_POST_CODEC
228 {
229 "CODEC test",
230 "codec",
231 "This test checks any connected codec(s).",
232 POST_RAM | POST_MANUAL,
233 &codec_post_test,
234 NULL,
235 NULL,
236 CONFIG_SYS_POST_CODEC
237 },
238#endif
239#if CONFIG_POST & CONFIG_SYS_POST_ECC
240 {
241 "ECC test",
242 "ecc",
243 "This test checks the ECC facility of memory.",
244 POST_ROM | POST_ALWAYS | POST_PREREL,
245 &ecc_post_test,
246 NULL,
247 NULL,
248 CONFIG_SYS_POST_ECC
249 },
250#endif
251#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
252 CONFIG_POST_BSPEC1,
253#endif
254#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
255 CONFIG_POST_BSPEC2,
256#endif
257#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
258 CONFIG_POST_BSPEC3,
259#endif
260#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
261 CONFIG_POST_BSPEC4,
262#endif
263#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
264 CONFIG_POST_BSPEC5,
265#endif
266#if CONFIG_POST & CONFIG_SYS_POST_COPROC
267 {
268 "Coprocessors communication test",
269 "coproc_com",
270 "This test checks communication with coprocessors.",
271 POST_RAM | POST_ALWAYS | POST_CRITICAL,
272 &coprocessor_post_test,
273 NULL,
274 NULL,
275 CONFIG_SYS_POST_COPROC
276 },
277#endif
278#if CONFIG_POST & CONFIG_SYS_POST_FLASH
279 {
280 "Parallel NOR flash test",
281 "flash",
282 "This test verifies parallel flash operations.",
283 POST_RAM | POST_SLOWTEST | POST_MANUAL,
284 &flash_post_test,
285 NULL,
286 NULL,
287 CONFIG_SYS_POST_FLASH
288 },
289#endif
290#if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS
291 {
292 "Memory regions test",
293 "mem_regions",
294 "This test checks regularly placed regions of the RAM.",
295 POST_ROM | POST_SLOWTEST | POST_PREREL,
296 &memory_regions_post_test,
297 NULL,
298 NULL,
299 CONFIG_SYS_POST_MEM_REGIONS
300 },
301#endif
302};
303
304unsigned int post_list_size = ARRAY_SIZE(post_list);
Empty description
This page took 0.029109 seconds and 4 git commands to generate.