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hush: fix some quoted variable expansion issues
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c609719b 1/*
34c202c7 2 * (C) Copyright 2000-2011
c609719b
WD
3 * Wolfgang Denk, DENX Software Engineering, [email protected].
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
c609719b
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6 */
7
8/*
9 * IDE support
10 */
113bfe48 11
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12#include <common.h>
13#include <config.h>
14#include <watchdog.h>
15#include <command.h>
16#include <image.h>
17#include <asm/byteorder.h>
f98984cb 18#include <asm/io.h>
735dd97b 19
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20#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
21# include <pcmcia.h>
22#endif
735dd97b 23
c609719b
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24#include <ide.h>
25#include <ata.h>
735dd97b 26
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27#ifdef CONFIG_STATUS_LED
28# include <status_led.h>
29#endif
735dd97b 30
5cf91d6b
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31#ifdef __PPC__
32# define EIEIO __asm__ volatile ("eieio")
1a344f29 33# define SYNC __asm__ volatile ("sync")
5cf91d6b
WD
34#else
35# define EIEIO /* nothing */
1a344f29 36# define SYNC /* nothing */
c609719b
WD
37#endif
38
c609719b
WD
39/* ------------------------------------------------------------------------- */
40
41/* Current I/O Device */
42static int curr_device = -1;
43
44/* Current offset for IDE0 / IDE1 bus access */
6d0f6bcf
JCPV
45ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
46#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
47 CONFIG_SYS_ATA_IDE0_OFFSET,
c609719b 48#endif
6d0f6bcf
JCPV
49#if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
50 CONFIG_SYS_ATA_IDE1_OFFSET,
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51#endif
52};
53
6d0f6bcf 54static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
c609719b 55
6d0f6bcf 56block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
c609719b
WD
57/* ------------------------------------------------------------------------- */
58
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WD
59#ifdef CONFIG_IDE_RESET
60static void ide_reset (void);
61#else
62#define ide_reset() /* dummy */
63#endif
64
65static void ide_ident (block_dev_desc_t *dev_desc);
66static uchar ide_wait (int dev, ulong t);
67
68#define IDE_TIME_OUT 2000 /* 2 sec timeout */
69
70#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
71
72#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
73
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74static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
75
6d0f6bcf
JCPV
76#ifndef CONFIG_SYS_ATA_PORT_ADDR
77#define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
566a494f 78#endif
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79
80#ifdef CONFIG_ATAPI
81static void atapi_inquiry(block_dev_desc_t *dev_desc);
b6458d38
SG
82static ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt,
83 void *buffer);
c609719b
WD
84#endif
85
86
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87/* ------------------------------------------------------------------------- */
88
34c202c7 89int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
c609719b 90{
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WD
91 int rcode = 0;
92
93 switch (argc) {
94 case 0:
95 case 1:
4c12eeb8 96 return CMD_RET_USAGE;
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WD
97 case 2:
98 if (strncmp(argv[1], "res", 3) == 0) {
99 puts("\nReset IDE"
c609719b 100#ifdef CONFIG_IDE_8xx_DIRECT
34c202c7 101 " on PCMCIA " PCMCIA_SLOT_MSG
c609719b 102#endif
34c202c7 103 ": ");
c609719b 104
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105 ide_init();
106 return 0;
107 } else if (strncmp(argv[1], "inf", 3) == 0) {
108 int i;
c609719b 109
34c202c7 110 putc('\n');
c609719b 111
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WD
112 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
113 if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN)
114 continue; /* list only known devices */
115 printf("IDE device %d: ", i);
116 dev_print(&ide_dev_desc[i]);
117 }
118 return 0;
c609719b 119
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WD
120 } else if (strncmp(argv[1], "dev", 3) == 0) {
121 if ((curr_device < 0)
122 || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
123 puts("\nno IDE devices available\n");
124 return 1;
c609719b 125 }
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WD
126 printf("\nIDE device %d: ", curr_device);
127 dev_print(&ide_dev_desc[curr_device]);
128 return 0;
129 } else if (strncmp(argv[1], "part", 4) == 0) {
130 int dev, ok;
131
132 for (ok = 0, dev = 0;
133 dev < CONFIG_SYS_IDE_MAXDEVICE;
134 ++dev) {
135 if (ide_dev_desc[dev].part_type !=
136 PART_TYPE_UNKNOWN) {
137 ++ok;
138 if (dev)
139 putc('\n');
140 print_part(&ide_dev_desc[dev]);
141 }
142 }
143 if (!ok) {
144 puts("\nno IDE devices available\n");
145 rcode++;
146 }
147 return rcode;
c609719b 148 }
4c12eeb8 149 return CMD_RET_USAGE;
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WD
150 case 3:
151 if (strncmp(argv[1], "dev", 3) == 0) {
152 int dev = (int) simple_strtoul(argv[2], NULL, 10);
c609719b 153
34c202c7
WD
154 printf("\nIDE device %d: ", dev);
155 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
156 puts("unknown device\n");
157 return 1;
158 }
159 dev_print(&ide_dev_desc[dev]);
160 /*ide_print (dev); */
c609719b 161
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WD
162 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
163 return 1;
c609719b 164
34c202c7 165 curr_device = dev;
c609719b 166
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WD
167 puts("... is now current device\n");
168
169 return 0;
170 } else if (strncmp(argv[1], "part", 4) == 0) {
171 int dev = (int) simple_strtoul(argv[2], NULL, 10);
c609719b 172
34c202c7 173 if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) {
c609719b 174 print_part(&ide_dev_desc[dev]);
34c202c7
WD
175 } else {
176 printf("\nIDE device %d not available\n",
177 dev);
178 rcode = 1;
179 }
180 return rcode;
c609719b 181 }
c609719b 182
4c12eeb8 183 return CMD_RET_USAGE;
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WD
184 default:
185 /* at least 4 args */
c609719b 186
34c202c7
WD
187 if (strcmp(argv[1], "read") == 0) {
188 ulong addr = simple_strtoul(argv[2], NULL, 16);
189 ulong cnt = simple_strtoul(argv[4], NULL, 16);
190 ulong n;
c609719b 191
6d0f6bcf 192#ifdef CONFIG_SYS_64BIT_LBA
34c202c7 193 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 194
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WD
195 printf("\nIDE read: device %d block # %lld, count %ld ... ",
196 curr_device, blk, cnt);
42dfe7a1 197#else
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198 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
199
200 printf("\nIDE read: device %d block # %ld, count %ld ... ",
201 curr_device, blk, cnt);
202#endif
203
204 n = ide_dev_desc[curr_device].block_read(curr_device,
205 blk, cnt,
206 (ulong *)addr);
207 /* flush cache after read */
208 flush_cache(addr,
209 cnt * ide_dev_desc[curr_device].blksz);
210
211 printf("%ld blocks read: %s\n",
212 n, (n == cnt) ? "OK" : "ERROR");
213 if (n == cnt)
214 return 0;
215 else
216 return 1;
217 } else if (strcmp(argv[1], "write") == 0) {
218 ulong addr = simple_strtoul(argv[2], NULL, 16);
219 ulong cnt = simple_strtoul(argv[4], NULL, 16);
220 ulong n;
c609719b 221
6d0f6bcf 222#ifdef CONFIG_SYS_64BIT_LBA
34c202c7 223 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 224
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WD
225 printf("\nIDE write: device %d block # %lld, count %ld ... ",
226 curr_device, blk, cnt);
42dfe7a1 227#else
34c202c7 228 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
42dfe7a1 229
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WD
230 printf("\nIDE write: device %d block # %ld, count %ld ... ",
231 curr_device, blk, cnt);
42dfe7a1 232#endif
34c202c7 233 n = ide_write(curr_device, blk, cnt, (ulong *) addr);
c609719b 234
34c202c7
WD
235 printf("%ld blocks written: %s\n",
236 n, (n == cnt) ? "OK" : "ERROR");
237 if (n == cnt)
238 return 0;
239 else
240 return 1;
241 } else {
4c12eeb8 242 return CMD_RET_USAGE;
34c202c7 243 }
c609719b 244
34c202c7 245 return rcode;
c609719b 246 }
c609719b
WD
247}
248
34c202c7 249int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
c609719b 250{
7405a133 251 return common_diskboot(cmdtp, "ide", argc, argv);
c609719b
WD
252}
253
254/* ------------------------------------------------------------------------- */
255
19be2ea2
PH
256void __ide_led(uchar led, uchar status)
257{
258#if defined(CONFIG_IDE_LED) && defined(PER8_BASE) /* required by LED_PORT */
259 static uchar led_buffer; /* Buffer for current LED status */
260
261 uchar *led_port = LED_PORT;
262
263 if (status) /* switch LED on */
264 led_buffer |= led;
265 else /* switch LED off */
266 led_buffer &= ~led;
267
268 *led_port = led_buffer;
269#endif
270}
271
272void ide_led(uchar led, uchar status)
273 __attribute__ ((weak, alias("__ide_led")));
274
275#ifndef CONFIG_IDE_LED /* define LED macros, they are not used anyways */
276# define DEVICE_LED(x) 0
277# define LED_IDE1 1
278# define LED_IDE2 2
279#endif
280
281/* ------------------------------------------------------------------------- */
282
34c202c7 283inline void __ide_outb(int dev, int port, unsigned char val)
f2302d44 284{
34c202c7
WD
285 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
286 dev, port, val,
287 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
0abddf82
ML
288
289#if defined(CONFIG_IDE_AHB)
290 if (port) {
291 /* write command */
292 ide_write_register(dev, port, val);
293 } else {
294 /* write data */
295 outb(val, (ATA_CURR_BASE(dev)));
296 }
297#else
34c202c7 298 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
0abddf82 299#endif
f2302d44 300}
0abddf82 301
34c202c7
WD
302void ide_outb(int dev, int port, unsigned char val)
303 __attribute__ ((weak, alias("__ide_outb")));
f2302d44 304
34c202c7 305inline unsigned char __ide_inb(int dev, int port)
f2302d44
SR
306{
307 uchar val;
0abddf82
ML
308
309#if defined(CONFIG_IDE_AHB)
310 val = ide_read_register(dev, port);
311#else
34c202c7 312 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
0abddf82
ML
313#endif
314
34c202c7
WD
315 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
316 dev, port,
317 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
f2302d44
SR
318 return val;
319}
34c202c7 320
2df72b82 321unsigned char ide_inb(int dev, int port)
34c202c7 322 __attribute__ ((weak, alias("__ide_inb")));
f2302d44 323
36c2d306 324#ifdef CONFIG_TUNE_PIO
34c202c7 325inline int __ide_set_piomode(int pio_mode)
36c2d306
SF
326{
327 return 0;
328}
34c202c7
WD
329
330inline int ide_set_piomode(int pio_mode)
331 __attribute__ ((weak, alias("__ide_set_piomode")));
36c2d306
SF
332#endif
333
34c202c7 334void ide_init(void)
c609719b 335{
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WD
336 unsigned char c;
337 int i, bus;
34c202c7 338
9fd5e31f 339#ifdef CONFIG_IDE_8xx_PCCARD
34c202c7
WD
340 extern int ide_devices_found; /* Initialized in check_ide_device() */
341#endif /* CONFIG_IDE_8xx_PCCARD */
9fd5e31f
WD
342
343#ifdef CONFIG_IDE_PREINIT
344 WATCHDOG_RESET();
345
34c202c7
WD
346 if (ide_preinit()) {
347 puts("ide_preinit failed\n");
9fd5e31f
WD
348 return;
349 }
34c202c7 350#endif /* CONFIG_IDE_PREINIT */
c609719b 351
c609719b
WD
352 WATCHDOG_RESET();
353
34c202c7
WD
354 /*
355 * Reset the IDE just to be sure.
c609719b
WD
356 * Light LED's to show
357 */
34c202c7
WD
358 ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
359
360 /* ATAPI Drives seems to need a proper IDE Reset */
361 ide_reset();
c609719b 362
8d1165e1
PH
363#ifdef CONFIG_IDE_INIT_POSTRESET
364 WATCHDOG_RESET();
c609719b 365
8d1165e1
PH
366 if (ide_init_postreset()) {
367 puts("ide_preinit_postreset failed\n");
368 return;
369 }
370#endif /* CONFIG_IDE_INIT_POSTRESET */
c609719b
WD
371
372 /*
373 * Wait for IDE to get ready.
374 * According to spec, this can take up to 31 seconds!
375 */
34c202c7
WD
376 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
377 int dev =
378 bus * (CONFIG_SYS_IDE_MAXDEVICE /
379 CONFIG_SYS_IDE_MAXBUS);
c609719b 380
6069ff26
WD
381#ifdef CONFIG_IDE_8xx_PCCARD
382 /* Skip non-ide devices from probing */
383 if ((ide_devices_found & (1 << bus)) == 0) {
34c202c7 384 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
6069ff26
WD
385 continue;
386 }
387#endif
34c202c7 388 printf("Bus %d: ", bus);
c609719b
WD
389
390 ide_bus_ok[bus] = 0;
391
392 /* Select device
393 */
34c202c7
WD
394 udelay(100000); /* 100 ms */
395 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
396 udelay(100000); /* 100 ms */
c609719b
WD
397 i = 0;
398 do {
34c202c7 399 udelay(10000); /* 10 ms */
c609719b 400
34c202c7 401 c = ide_inb(dev, ATA_STATUS);
c609719b
WD
402 i++;
403 if (i > (ATA_RESET_TIME * 100)) {
34c202c7
WD
404 puts("** Timeout **\n");
405 /* LED's off */
406 ide_led((LED_IDE1 | LED_IDE2), 0);
c609719b
WD
407 return;
408 }
34c202c7
WD
409 if ((i >= 100) && ((i % 100) == 0))
410 putc('.');
411
c609719b
WD
412 } while (c & ATA_STAT_BUSY);
413
414 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
34c202c7
WD
415 puts("not available ");
416 debug("Status = 0x%02X ", c);
417#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
418 } else if ((c & ATA_STAT_READY) == 0) {
419 puts("not available ");
420 debug("Status = 0x%02X ", c);
c609719b
WD
421#endif
422 } else {
34c202c7 423 puts("OK ");
c609719b
WD
424 ide_bus_ok[bus] = 1;
425 }
426 WATCHDOG_RESET();
427 }
c7de829c 428
34c202c7 429 putc('\n');
c609719b 430
34c202c7 431 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
c609719b
WD
432
433 curr_device = -1;
34c202c7 434 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
c609719b 435 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
34c202c7
WD
436 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
437 ide_dev_desc[i].if_type = IF_TYPE_IDE;
438 ide_dev_desc[i].dev = i;
439 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
440 ide_dev_desc[i].blksz = 0;
0472fbfd
EE
441 ide_dev_desc[i].log2blksz =
442 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
34c202c7
WD
443 ide_dev_desc[i].lba = 0;
444 ide_dev_desc[i].block_read = ide_read;
0abddf82 445 ide_dev_desc[i].block_write = ide_write;
c609719b
WD
446 if (!ide_bus_ok[IDE_BUS(i)])
447 continue;
34c202c7 448 ide_led(led, 1); /* LED on */
c609719b 449 ide_ident(&ide_dev_desc[i]);
34c202c7 450 ide_led(led, 0); /* LED off */
c609719b 451 dev_print(&ide_dev_desc[i]);
34c202c7 452
c609719b 453 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
34c202c7
WD
454 /* initialize partition type */
455 init_part(&ide_dev_desc[i]);
c609719b
WD
456 if (curr_device < 0)
457 curr_device = i;
458 }
459 }
460 WATCHDOG_RESET();
461}
462
463/* ------------------------------------------------------------------------- */
464
df3fc526 465#ifdef CONFIG_PARTITIONS
34c202c7 466block_dev_desc_t *ide_get_dev(int dev)
c609719b 467{
6d0f6bcf 468 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
c609719b 469}
df3fc526 470#endif
c609719b 471
c609719b
WD
472/* ------------------------------------------------------------------------- */
473
f5b82c0f
PH
474void ide_input_swap_data(int dev, ulong *sect_buf, int words)
475 __attribute__ ((weak, alias("__ide_input_swap_data")));
476
477void ide_input_data(int dev, ulong *sect_buf, int words)
478 __attribute__ ((weak, alias("__ide_input_data")));
479
480void ide_output_data(int dev, const ulong *sect_buf, int words)
481 __attribute__ ((weak, alias("__ide_output_data")));
482
5da627a4 483/* We only need to swap data if we are running on a big endian cpu. */
4d1361d8 484#if defined(__LITTLE_ENDIAN)
f5b82c0f
PH
485void __ide_input_swap_data(int dev, ulong *sect_buf, int words)
486{
487 ide_input_data(dev, sect_buf, words);
488}
5da627a4 489#else
f5b82c0f 490void __ide_input_swap_data(int dev, ulong *sect_buf, int words)
c609719b 491{
34c202c7
WD
492 volatile ushort *pbuf =
493 (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
494 ushort *dbuf = (ushort *) sect_buf;
1a344f29 495
34c202c7
WD
496 debug("in input swap data base for read is %lx\n",
497 (unsigned long) pbuf);
1a344f29
WD
498
499 while (words--) {
0c32d96d 500#ifdef __MIPS__
34c202c7
WD
501 *dbuf++ = swab16p((u16 *) pbuf);
502 *dbuf++ = swab16p((u16 *) pbuf);
0c32d96d 503#else
1a344f29
WD
504 *dbuf++ = ld_le16(pbuf);
505 *dbuf++ = ld_le16(pbuf);
0c32d96d 506#endif /* !MIPS */
1a344f29 507 }
c609719b 508}
4d1361d8 509#endif /* __LITTLE_ENDIAN */
2262cfee
WD
510
511
f2a37fcd 512#if defined(CONFIG_IDE_SWAP_IO)
f5b82c0f 513void __ide_output_data(int dev, const ulong *sect_buf, int words)
c609719b 514{
34c202c7
WD
515 ushort *dbuf;
516 volatile ushort *pbuf;
1a344f29 517
34c202c7
WD
518 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
519 dbuf = (ushort *) sect_buf;
1a344f29
WD
520 while (words--) {
521 EIEIO;
522 *pbuf = *dbuf++;
523 EIEIO;
524 *pbuf = *dbuf++;
525 }
c609719b 526}
34c202c7 527#else /* ! CONFIG_IDE_SWAP_IO */
f5b82c0f 528void __ide_output_data(int dev, const ulong *sect_buf, int words)
2262cfee 529{
0abddf82
ML
530#if defined(CONFIG_IDE_AHB)
531 ide_write_data(dev, sect_buf, words);
532#else
34c202c7 533 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
0abddf82 534#endif
2262cfee 535}
34c202c7 536#endif /* CONFIG_IDE_SWAP_IO */
c609719b 537
f2a37fcd 538#if defined(CONFIG_IDE_SWAP_IO)
f5b82c0f 539void __ide_input_data(int dev, ulong *sect_buf, int words)
c609719b 540{
34c202c7
WD
541 ushort *dbuf;
542 volatile ushort *pbuf;
1a344f29 543
34c202c7
WD
544 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
545 dbuf = (ushort *) sect_buf;
1a344f29
WD
546
547 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
548
549 while (words--) {
cd172b71 550 EIEIO;
1a344f29 551 *dbuf++ = *pbuf;
cd172b71 552 EIEIO;
1a344f29 553 *dbuf++ = *pbuf;
a522fa0e 554 }
c609719b 555}
34c202c7 556#else /* ! CONFIG_IDE_SWAP_IO */
f5b82c0f 557void __ide_input_data(int dev, ulong *sect_buf, int words)
2262cfee 558{
0abddf82
ML
559#if defined(CONFIG_IDE_AHB)
560 ide_read_data(dev, sect_buf, words);
561#else
34c202c7 562 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
0abddf82 563#endif
2262cfee
WD
564}
565
34c202c7 566#endif /* CONFIG_IDE_SWAP_IO */
c609719b
WD
567
568/* -------------------------------------------------------------------------
569 */
34c202c7 570static void ide_ident(block_dev_desc_t *dev_desc)
c609719b 571{
c609719b 572 unsigned char c;
b18eabfa 573 hd_driveid_t iop;
c609719b 574
64f70bed
WD
575#ifdef CONFIG_ATAPI
576 int retries = 0;
c7de829c
WD
577#endif
578
36c2d306
SF
579#ifdef CONFIG_TUNE_PIO
580 int pio_mode;
581#endif
582
c609719b
WD
583#if 0
584 int mode, cycle_time;
585#endif
586 int device;
c609719b 587
34c202c7
WD
588 device = dev_desc->dev;
589 printf(" Device %d: ", device);
590
591 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
592 /* Select device
593 */
34c202c7
WD
594 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
595 dev_desc->if_type = IF_TYPE_IDE;
c609719b 596#ifdef CONFIG_ATAPI
c7de829c 597
34c202c7
WD
598 retries = 0;
599
600 /* Warning: This will be tricky to read */
601 while (retries <= 1) {
602 /* check signature */
603 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
604 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
605 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
606 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
607 /* ATAPI Signature found */
608 dev_desc->if_type = IF_TYPE_ATAPI;
609 /*
610 * Start Ident Command
611 */
612 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
613 /*
614 * Wait for completion - ATAPI devices need more time
615 * to become ready
616 */
617 c = ide_wait(device, ATAPI_TIME_OUT);
618 } else
c609719b 619#endif
1a344f29 620 {
34c202c7
WD
621 /*
622 * Start Ident Command
623 */
624 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
625
626 /*
627 * Wait for completion
628 */
629 c = ide_wait(device, IDE_TIME_OUT);
1a344f29 630 }
34c202c7
WD
631 ide_led(DEVICE_LED(device), 0); /* LED off */
632
633 if (((c & ATA_STAT_DRQ) == 0) ||
634 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
635#ifdef CONFIG_ATAPI
636 {
637 /*
638 * Need to soft reset the device
639 * in case it's an ATAPI...
640 */
641 debug("Retrying...\n");
642 ide_outb(device, ATA_DEV_HD,
643 ATA_LBA | ATA_DEVICE(device));
644 udelay(100000);
645 ide_outb(device, ATA_COMMAND, 0x08);
646 udelay(500000); /* 500 ms */
647 }
648 /*
649 * Select device
650 */
651 ide_outb(device, ATA_DEV_HD,
652 ATA_LBA | ATA_DEVICE(device));
653 retries++;
64f70bed 654#else
34c202c7 655 return;
64f70bed 656#endif
34c202c7 657 }
64f70bed 658#ifdef CONFIG_ATAPI
34c202c7
WD
659 else
660 break;
661 } /* see above - ugly to read */
64f70bed 662
34c202c7 663 if (retries == 2) /* Not found */
64f70bed
WD
664 return;
665#endif
c609719b 666
f5b82c0f 667 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
c609719b 668
34c202c7
WD
669 ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev,
670 sizeof(dev_desc->revision));
671 ident_cpy((unsigned char *) dev_desc->vendor, iop.model,
672 sizeof(dev_desc->vendor));
673 ident_cpy((unsigned char *) dev_desc->product, iop.serial_no,
674 sizeof(dev_desc->product));
c3f9d493
WD
675#ifdef __LITTLE_ENDIAN
676 /*
bcdf1d2c
RR
677 * firmware revision, model, and serial number have Big Endian Byte
678 * order in Word. Convert all three to little endian.
c3f9d493
WD
679 *
680 * See CF+ and CompactFlash Specification Revision 2.0:
bcdf1d2c 681 * 6.2.1.6: Identify Drive, Table 39 for more details
c3f9d493
WD
682 */
683
34c202c7
WD
684 strswab(dev_desc->revision);
685 strswab(dev_desc->vendor);
686 strswab(dev_desc->product);
c3f9d493 687#endif /* __LITTLE_ENDIAN */
c609719b 688
b18eabfa 689 if ((iop.config & 0x0080) == 0x0080)
c609719b
WD
690 dev_desc->removable = 1;
691 else
692 dev_desc->removable = 0;
693
36c2d306
SF
694#ifdef CONFIG_TUNE_PIO
695 /* Mode 0 - 2 only, are directly determined by word 51. */
b18eabfa 696 pio_mode = iop.tPIO;
36c2d306
SF
697 if (pio_mode > 2) {
698 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
34c202c7
WD
699 /* Force it to dead slow, and hope for the best... */
700 pio_mode = 0;
36c2d306
SF
701 }
702
703 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
704 * shall set bit 1 of word 53 to one and support the fields contained
705 * in words 64 through 70.
706 */
b18eabfa 707 if (iop.field_valid & 0x02) {
34c202c7
WD
708 /*
709 * Mode 3 and above are possible. Check in order from slow
36c2d306
SF
710 * to fast, so we wind up with the highest mode allowed.
711 */
b18eabfa 712 if (iop.eide_pio_modes & 0x01)
36c2d306 713 pio_mode = 3;
b18eabfa 714 if (iop.eide_pio_modes & 0x02)
36c2d306 715 pio_mode = 4;
b18eabfa
MV
716 if (ata_id_is_cfa((u16 *)&iop)) {
717 if ((iop.cf_advanced_caps & 0x07) == 0x01)
36c2d306 718 pio_mode = 5;
b18eabfa 719 if ((iop.cf_advanced_caps & 0x07) == 0x02)
36c2d306
SF
720 pio_mode = 6;
721 }
722 }
723
724 /* System-specific, depends on bus speeds, etc. */
725 ide_set_piomode(pio_mode);
726#endif /* CONFIG_TUNE_PIO */
727
c609719b
WD
728#if 0
729 /*
730 * Drive PIO mode autoselection
731 */
b18eabfa 732 mode = iop.tPIO;
c609719b 733
34c202c7 734 printf("tPIO = 0x%02x = %d\n", mode, mode);
c609719b
WD
735 if (mode > 2) { /* 2 is maximum allowed tPIO value */
736 mode = 2;
34c202c7 737 debug("Override tPIO -> 2\n");
c609719b 738 }
b18eabfa 739 if (iop.field_valid & 2) { /* drive implements ATA2? */
34c202c7 740 debug("Drive implements ATA2\n");
b18eabfa
MV
741 if (iop.capability & 8) { /* drive supports use_iordy? */
742 cycle_time = iop.eide_pio_iordy;
c609719b 743 } else {
b18eabfa 744 cycle_time = iop.eide_pio;
c609719b 745 }
34c202c7 746 debug("cycle time = %d\n", cycle_time);
c609719b 747 mode = 4;
34c202c7
WD
748 if (cycle_time > 120)
749 mode = 3; /* 120 ns for PIO mode 4 */
750 if (cycle_time > 180)
751 mode = 2; /* 180 ns for PIO mode 3 */
752 if (cycle_time > 240)
753 mode = 1; /* 240 ns for PIO mode 4 */
754 if (cycle_time > 383)
755 mode = 0; /* 383 ns for PIO mode 4 */
c609719b 756 }
34c202c7 757 printf("PIO mode to use: PIO %d\n", mode);
c609719b
WD
758#endif /* 0 */
759
760#ifdef CONFIG_ATAPI
34c202c7 761 if (dev_desc->if_type == IF_TYPE_ATAPI) {
c609719b
WD
762 atapi_inquiry(dev_desc);
763 return;
764 }
765#endif /* CONFIG_ATAPI */
766
c3f9d493 767#ifdef __BIG_ENDIAN
c609719b 768 /* swap shorts */
b18eabfa 769 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
34c202c7 770#else /* ! __BIG_ENDIAN */
c3f9d493
WD
771 /*
772 * do not swap shorts on little endian
773 *
774 * See CF+ and CompactFlash Specification Revision 2.0:
775 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
776 */
b18eabfa 777 dev_desc->lba = iop.lba_capacity;
34c202c7 778#endif /* __BIG_ENDIAN */
c40b2956 779
42dfe7a1 780#ifdef CONFIG_LBA48
34c202c7 781 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
6e592385 782 dev_desc->lba48 = 1;
34c202c7
WD
783 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
784 ((unsigned long long) iop.lba48_capacity[1] << 16) |
785 ((unsigned long long) iop.lba48_capacity[2] << 32) |
786 ((unsigned long long) iop.lba48_capacity[3] << 48);
c40b2956 787 } else {
c40b2956
WD
788 dev_desc->lba48 = 0;
789 }
790#endif /* CONFIG_LBA48 */
c609719b 791 /* assuming HD */
34c202c7
WD
792 dev_desc->type = DEV_TYPE_HARDDISK;
793 dev_desc->blksz = ATA_BLOCKSIZE;
0472fbfd 794 dev_desc->log2blksz = LOG2(dev_desc->blksz);
34c202c7
WD
795 dev_desc->lun = 0; /* just to fill something in... */
796
797#if 0 /* only used to test the powersaving mode,
798 * if enabled, the drive goes after 5 sec
799 * in standby mode */
800 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
801 c = ide_wait(device, IDE_TIME_OUT);
802 ide_outb(device, ATA_SECT_CNT, 1);
803 ide_outb(device, ATA_LBA_LOW, 0);
804 ide_outb(device, ATA_LBA_MID, 0);
805 ide_outb(device, ATA_LBA_HIGH, 0);
806 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
807 ide_outb(device, ATA_COMMAND, 0xe3);
808 udelay(50);
809 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
c609719b
WD
810#endif
811}
812
813
814/* ------------------------------------------------------------------------- */
815
ff8fef56 816ulong ide_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
c609719b
WD
817{
818 ulong n = 0;
819 unsigned char c;
34c202c7
WD
820 unsigned char pwrsave = 0; /* power save */
821
42dfe7a1 822#ifdef CONFIG_LBA48
c40b2956 823 unsigned char lba48 = 0;
c609719b 824
413bf586 825 if (blknr & 0x0000fffff0000000ULL) {
c40b2956
WD
826 /* more than 28 bits used, use 48bit mode */
827 lba48 = 1;
828 }
829#endif
ff8fef56 830 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
34c202c7 831 device, blknr, blkcnt, (ulong) buffer);
c609719b 832
34c202c7 833 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
834
835 /* Select device
836 */
34c202c7
WD
837 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
838 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
839
840 if (c & ATA_STAT_BUSY) {
34c202c7 841 printf("IDE read: device %d not ready\n", device);
c609719b
WD
842 goto IDE_READ_E;
843 }
844
845 /* first check if the drive is in Powersaving mode, if yes,
846 * increase the timeout value */
34c202c7
WD
847 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
848 udelay(50);
c609719b 849
34c202c7 850 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
c609719b
WD
851
852 if (c & ATA_STAT_BUSY) {
34c202c7 853 printf("IDE read: device %d not ready\n", device);
c609719b
WD
854 goto IDE_READ_E;
855 }
856 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
34c202c7 857 printf("No Powersaving mode %X\n", c);
c609719b 858 } else {
34c202c7
WD
859 c = ide_inb(device, ATA_SECT_CNT);
860 debug("Powersaving %02X\n", c);
861 if (c == 0)
862 pwrsave = 1;
c609719b
WD
863 }
864
865
866 while (blkcnt-- > 0) {
867
34c202c7 868 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
869
870 if (c & ATA_STAT_BUSY) {
34c202c7 871 printf("IDE read: device %d not ready\n", device);
c609719b
WD
872 break;
873 }
42dfe7a1 874#ifdef CONFIG_LBA48
c40b2956
WD
875 if (lba48) {
876 /* write high bits */
34c202c7
WD
877 ide_outb(device, ATA_SECT_CNT, 0);
878 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
6d0f6bcf 879#ifdef CONFIG_SYS_64BIT_LBA
34c202c7
WD
880 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
881 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
413bf586 882#else
34c202c7
WD
883 ide_outb(device, ATA_LBA_MID, 0);
884 ide_outb(device, ATA_LBA_HIGH, 0);
413bf586 885#endif
c40b2956
WD
886 }
887#endif
34c202c7
WD
888 ide_outb(device, ATA_SECT_CNT, 1);
889 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
890 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
891 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 892
42dfe7a1 893#ifdef CONFIG_LBA48
c40b2956 894 if (lba48) {
34c202c7
WD
895 ide_outb(device, ATA_DEV_HD,
896 ATA_LBA | ATA_DEVICE(device));
897 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
c40b2956
WD
898
899 } else
900#endif
901 {
34c202c7
WD
902 ide_outb(device, ATA_DEV_HD, ATA_LBA |
903 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
904 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
c40b2956 905 }
c609719b 906
34c202c7 907 udelay(50);
c609719b 908
34c202c7
WD
909 if (pwrsave) {
910 /* may take up to 4 sec */
911 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
912 pwrsave = 0;
c609719b 913 } else {
34c202c7
WD
914 /* can't take over 500 ms */
915 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
916 }
917
34c202c7
WD
918 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
919 ATA_STAT_DRQ) {
ff8fef56
SS
920 printf("Error (no IRQ) dev %d blk " LBAF ": status "
921 "%#02x\n", device, blknr, c);
c609719b
WD
922 break;
923 }
924
f5b82c0f 925 ide_input_data(device, buffer, ATA_SECTORWORDS);
34c202c7 926 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
c609719b
WD
927
928 ++n;
929 ++blknr;
0b94504d 930 buffer += ATA_BLOCKSIZE;
c609719b
WD
931 }
932IDE_READ_E:
34c202c7 933 ide_led(DEVICE_LED(device), 0); /* LED off */
c609719b
WD
934 return (n);
935}
936
937/* ------------------------------------------------------------------------- */
938
939
ff8fef56 940ulong ide_write(int device, lbaint_t blknr, lbaint_t blkcnt, const void *buffer)
c609719b
WD
941{
942 ulong n = 0;
943 unsigned char c;
34c202c7 944
42dfe7a1 945#ifdef CONFIG_LBA48
c40b2956
WD
946 unsigned char lba48 = 0;
947
413bf586 948 if (blknr & 0x0000fffff0000000ULL) {
c40b2956
WD
949 /* more than 28 bits used, use 48bit mode */
950 lba48 = 1;
951 }
952#endif
c609719b 953
34c202c7 954 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
955
956 /* Select device
957 */
34c202c7 958 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
959
960 while (blkcnt-- > 0) {
961
34c202c7 962 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
963
964 if (c & ATA_STAT_BUSY) {
34c202c7 965 printf("IDE read: device %d not ready\n", device);
c609719b
WD
966 goto WR_OUT;
967 }
42dfe7a1 968#ifdef CONFIG_LBA48
c40b2956
WD
969 if (lba48) {
970 /* write high bits */
34c202c7
WD
971 ide_outb(device, ATA_SECT_CNT, 0);
972 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
6d0f6bcf 973#ifdef CONFIG_SYS_64BIT_LBA
34c202c7
WD
974 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
975 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
413bf586 976#else
34c202c7
WD
977 ide_outb(device, ATA_LBA_MID, 0);
978 ide_outb(device, ATA_LBA_HIGH, 0);
413bf586 979#endif
c40b2956
WD
980 }
981#endif
34c202c7
WD
982 ide_outb(device, ATA_SECT_CNT, 1);
983 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
984 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
985 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 986
42dfe7a1 987#ifdef CONFIG_LBA48
c40b2956 988 if (lba48) {
34c202c7
WD
989 ide_outb(device, ATA_DEV_HD,
990 ATA_LBA | ATA_DEVICE(device));
991 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
c40b2956
WD
992
993 } else
994#endif
995 {
34c202c7
WD
996 ide_outb(device, ATA_DEV_HD, ATA_LBA |
997 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
998 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
c40b2956 999 }
c609719b 1000
34c202c7 1001 udelay(50);
c609719b 1002
34c202c7
WD
1003 /* can't take over 500 ms */
1004 c = ide_wait(device, IDE_TIME_OUT);
c609719b 1005
34c202c7
WD
1006 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1007 ATA_STAT_DRQ) {
ff8fef56
SS
1008 printf("Error (no IRQ) dev %d blk " LBAF ": status "
1009 "%#02x\n", device, blknr, c);
c609719b
WD
1010 goto WR_OUT;
1011 }
1012
f5b82c0f 1013 ide_output_data(device, buffer, ATA_SECTORWORDS);
34c202c7 1014 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
c609719b
WD
1015 ++n;
1016 ++blknr;
0b94504d 1017 buffer += ATA_BLOCKSIZE;
c609719b
WD
1018 }
1019WR_OUT:
34c202c7 1020 ide_led(DEVICE_LED(device), 0); /* LED off */
c609719b
WD
1021 return (n);
1022}
1023
1024/* ------------------------------------------------------------------------- */
1025
1026/*
1027 * copy src to dest, skipping leading and trailing blanks and null
1028 * terminate the string
7d7ce412 1029 * "len" is the size of available memory including the terminating '\0'
c609719b 1030 */
34c202c7
WD
1031static void ident_cpy(unsigned char *dst, unsigned char *src,
1032 unsigned int len)
c609719b 1033{
7d7ce412
WD
1034 unsigned char *end, *last;
1035
1036 last = dst;
34c202c7 1037 end = src + len - 1;
7d7ce412
WD
1038
1039 /* reserve space for '\0' */
1040 if (len < 2)
1041 goto OUT;
efa329cb 1042
7d7ce412 1043 /* skip leading white space */
34c202c7 1044 while ((*src) && (src < end) && (*src == ' '))
7d7ce412
WD
1045 ++src;
1046
1047 /* copy string, omitting trailing white space */
34c202c7 1048 while ((*src) && (src < end)) {
7d7ce412
WD
1049 *dst++ = *src;
1050 if (*src++ != ' ')
1051 last = dst;
c609719b 1052 }
7d7ce412
WD
1053OUT:
1054 *last = '\0';
c609719b
WD
1055}
1056
1057/* ------------------------------------------------------------------------- */
1058
1059/*
1060 * Wait until Busy bit is off, or timeout (in ms)
1061 * Return last status
1062 */
34c202c7 1063static uchar ide_wait(int dev, ulong t)
c609719b 1064{
34c202c7 1065 ulong delay = 10 * t; /* poll every 100 us */
c609719b
WD
1066 uchar c;
1067
2262cfee 1068 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
34c202c7
WD
1069 udelay(100);
1070 if (delay-- == 0)
c609719b 1071 break;
c609719b
WD
1072 }
1073 return (c);
1074}
1075
1076/* ------------------------------------------------------------------------- */
1077
1078#ifdef CONFIG_IDE_RESET
1079extern void ide_set_reset(int idereset);
1080
34c202c7 1081static void ide_reset(void)
c609719b 1082{
c609719b
WD
1083 int i;
1084
1085 curr_device = -1;
34c202c7 1086 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
c609719b 1087 ide_bus_ok[i] = 0;
34c202c7 1088 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
c609719b
WD
1089 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1090
34c202c7 1091 ide_set_reset(1); /* assert reset */
c609719b 1092
e175eacc
MK
1093 /* the reset signal shall be asserted for et least 25 us */
1094 udelay(25);
1095
c609719b
WD
1096 WATCHDOG_RESET();
1097
c609719b
WD
1098 /* de-assert RESET signal */
1099 ide_set_reset(0);
1100
1101 /* wait 250 ms */
34c202c7
WD
1102 for (i = 0; i < 250; ++i)
1103 udelay(1000);
c609719b
WD
1104}
1105
34c202c7 1106#endif /* CONFIG_IDE_RESET */
c609719b
WD
1107
1108/* ------------------------------------------------------------------------- */
1109
3887c3fb
HS
1110#if defined(CONFIG_OF_IDE_FIXUP)
1111int ide_device_present(int dev)
1112{
1113 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1114 return 0;
1115 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1116}
1117#endif
c609719b
WD
1118/* ------------------------------------------------------------------------- */
1119
1120#ifdef CONFIG_ATAPI
1121/****************************************************************************
1122 * ATAPI Support
1123 */
1124
f5b82c0f
PH
1125void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
1126 __attribute__ ((weak, alias("__ide_input_data_shorts")));
1127
1128void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
1129 __attribute__ ((weak, alias("__ide_output_data_shorts")));
1130
1131
f2a37fcd 1132#if defined(CONFIG_IDE_SWAP_IO)
c609719b
WD
1133/* since ATAPI may use commands with not 4 bytes alligned length
1134 * we have our own transfer functions, 2 bytes alligned */
f5b82c0f 1135void __ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
c609719b 1136{
34c202c7
WD
1137 ushort *dbuf;
1138 volatile ushort *pbuf;
c609719b 1139
34c202c7
WD
1140 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1141 dbuf = (ushort *) sect_buf;
db01a2ea 1142
34c202c7
WD
1143 debug("in output data shorts base for read is %lx\n",
1144 (unsigned long) pbuf);
db01a2ea 1145
c609719b 1146 while (shorts--) {
5cf91d6b 1147 EIEIO;
1a344f29 1148 *pbuf = *dbuf++;
c609719b 1149 }
1a344f29
WD
1150}
1151
f5b82c0f 1152void __ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
1a344f29 1153{
34c202c7
WD
1154 ushort *dbuf;
1155 volatile ushort *pbuf;
1a344f29 1156
34c202c7
WD
1157 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1158 dbuf = (ushort *) sect_buf;
1a344f29 1159
34c202c7
WD
1160 debug("in input data shorts base for read is %lx\n",
1161 (unsigned long) pbuf);
1a344f29
WD
1162
1163 while (shorts--) {
1164 EIEIO;
1165 *dbuf++ = *pbuf;
1166 }
c609719b
WD
1167}
1168
34c202c7 1169#else /* ! CONFIG_IDE_SWAP_IO */
f5b82c0f 1170void __ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
2262cfee 1171{
34c202c7 1172 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1173}
1174
f5b82c0f 1175void __ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
2262cfee 1176{
34c202c7 1177 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1178}
1179
34c202c7 1180#endif /* CONFIG_IDE_SWAP_IO */
2262cfee 1181
c609719b
WD
1182/*
1183 * Wait until (Status & mask) == res, or timeout (in ms)
1184 * Return last status
1185 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1186 * and then they set their DRQ Bit
1187 */
34c202c7 1188static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
c609719b 1189{
34c202c7 1190 ulong delay = 10 * t; /* poll every 100 us */
c609719b
WD
1191 uchar c;
1192
34c202c7
WD
1193 /* prevents to read the status before valid */
1194 c = ide_inb(dev, ATA_DEV_CTL);
1195
2262cfee 1196 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
c609719b 1197 /* break if error occurs (doesn't make sense to wait more) */
34c202c7 1198 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
c609719b 1199 break;
34c202c7
WD
1200 udelay(100);
1201 if (delay-- == 0)
c609719b 1202 break;
c609719b
WD
1203 }
1204 return (c);
1205}
1206
1207/*
1208 * issue an atapi command
1209 */
34c202c7
WD
1210unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
1211 unsigned char *buffer, int buflen)
c609719b 1212{
34c202c7 1213 unsigned char c, err, mask, res;
c609719b 1214 int n;
34c202c7
WD
1215
1216 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
1217
1218 /* Select device
1219 */
34c202c7 1220 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
c609719b 1221 res = 0;
34c202c7
WD
1222 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1223 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
c609719b 1224 if ((c & mask) != res) {
34c202c7
WD
1225 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
1226 c);
1227 err = 0xFF;
c609719b
WD
1228 goto AI_OUT;
1229 }
1230 /* write taskfile */
34c202c7
WD
1231 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1232 ide_outb(device, ATA_SECT_CNT, 0);
1233 ide_outb(device, ATA_SECT_NUM, 0);
1234 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
1235 ide_outb(device, ATA_CYL_HIGH,
1236 (unsigned char) ((buflen >> 8) & 0xFF));
1237 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1238
1239 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
1240 udelay(50);
1241
1242 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
c609719b 1243 res = ATA_STAT_DRQ;
34c202c7 1244 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
c609719b 1245
34c202c7
WD
1246 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1247 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
1248 device, c);
1249 err = 0xFF;
c609719b
WD
1250 goto AI_OUT;
1251 }
1252
34c202c7 1253 /* write command block */
f5b82c0f 1254 ide_output_data_shorts(device, (unsigned short *) ccb, ccblen / 2);
34c202c7 1255
53677ef1 1256 /* ATAPI Command written wait for completition */
34c202c7 1257 udelay(5000); /* device must set bsy */
c609719b 1258
34c202c7
WD
1259 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1260 /*
1261 * if no data wait for DRQ = 0 BSY = 0
1262 * if data wait for DRQ = 1 BSY = 0
1263 */
1264 res = 0;
1265 if (buflen)
c609719b 1266 res = ATA_STAT_DRQ;
34c202c7
WD
1267 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1268 if ((c & mask) != res) {
c609719b 1269 if (c & ATA_STAT_ERR) {
34c202c7
WD
1270 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
1271 debug("atapi_issue 1 returned sense key %X status %02X\n",
1272 err, c);
c609719b 1273 } else {
34c202c7
WD
1274 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
1275 ccb[0], c);
1276 err = 0xFF;
c609719b
WD
1277 }
1278 goto AI_OUT;
1279 }
34c202c7
WD
1280 n = ide_inb(device, ATA_CYL_HIGH);
1281 n <<= 8;
1282 n += ide_inb(device, ATA_CYL_LOW);
1283 if (n > buflen) {
1284 printf("ERROR, transfer bytes %d requested only %d\n", n,
1285 buflen);
1286 err = 0xff;
c609719b
WD
1287 goto AI_OUT;
1288 }
34c202c7
WD
1289 if ((n == 0) && (buflen < 0)) {
1290 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
1291 err = 0xff;
c609719b
WD
1292 goto AI_OUT;
1293 }
34c202c7
WD
1294 if (n != buflen) {
1295 debug("WARNING, transfer bytes %d not equal with requested %d\n",
1296 n, buflen);
c609719b 1297 }
34c202c7
WD
1298 if (n != 0) { /* data transfer */
1299 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
1300 /* we transfer shorts */
1301 n >>= 1;
c609719b 1302 /* ok now decide if it is an in or output */
34c202c7
WD
1303 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
1304 debug("Write to device\n");
f5b82c0f
PH
1305 ide_output_data_shorts(device,
1306 (unsigned short *) buffer, n);
c609719b 1307 } else {
34c202c7 1308 debug("Read from device @ %p shorts %d\n", buffer, n);
f5b82c0f
PH
1309 ide_input_data_shorts(device,
1310 (unsigned short *) buffer, n);
c609719b
WD
1311 }
1312 }
34c202c7
WD
1313 udelay(5000); /* seems that some CD ROMs need this... */
1314 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
1315 res = 0;
1316 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
c609719b 1317 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
34c202c7
WD
1318 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
1319 debug("atapi_issue 2 returned sense key %X status %X\n", err,
1320 c);
c609719b
WD
1321 } else {
1322 err = 0;
1323 }
1324AI_OUT:
34c202c7 1325 ide_led(DEVICE_LED(device), 0); /* LED off */
c609719b
WD
1326 return (err);
1327}
1328
1329/*
1330 * sending the command to atapi_issue. If an status other than good
1331 * returns, an request_sense will be issued
1332 */
1333
53677ef1 1334#define ATAPI_DRIVE_NOT_READY 100
c609719b
WD
1335#define ATAPI_UNIT_ATTN 10
1336
34c202c7
WD
1337unsigned char atapi_issue_autoreq(int device,
1338 unsigned char *ccb,
1339 int ccblen,
1340 unsigned char *buffer, int buflen)
c609719b 1341{
34c202c7
WD
1342 unsigned char sense_data[18], sense_ccb[12];
1343 unsigned char res, key, asc, ascq;
1344 int notready, unitattn;
c609719b 1345
34c202c7
WD
1346 unitattn = ATAPI_UNIT_ATTN;
1347 notready = ATAPI_DRIVE_NOT_READY;
c609719b
WD
1348
1349retry:
34c202c7
WD
1350 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
1351 if (res == 0)
1352 return 0; /* Ok */
1353
1354 if (res == 0xFF)
1355 return 0xFF; /* error */
1356
1357 debug("(auto_req)atapi_issue returned sense key %X\n", res);
1358
1359 memset(sense_ccb, 0, sizeof(sense_ccb));
1360 memset(sense_data, 0, sizeof(sense_data));
1361 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
1362 sense_ccb[4] = 18; /* allocation Length */
1363
1364 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
1365 key = (sense_data[2] & 0xF);
1366 asc = (sense_data[12]);
1367 ascq = (sense_data[13]);
1368
1369 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
1370 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1371 sense_data[0], key, asc, ascq);
1372
1373 if ((key == 0))
1374 return 0; /* ok device ready */
1375
1376 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
1377 if (unitattn-- > 0) {
1378 udelay(200 * 1000);
c609719b
WD
1379 goto retry;
1380 }
34c202c7 1381 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
c609719b
WD
1382 goto error;
1383 }
34c202c7
WD
1384 if ((asc == 0x4) && (ascq == 0x1)) {
1385 /* not ready, but will be ready soon */
1386 if (notready-- > 0) {
1387 udelay(200 * 1000);
c609719b
WD
1388 goto retry;
1389 }
34c202c7
WD
1390 printf("Drive not ready, tried %d times\n",
1391 ATAPI_DRIVE_NOT_READY);
c609719b
WD
1392 goto error;
1393 }
34c202c7
WD
1394 if (asc == 0x3a) {
1395 debug("Media not present\n");
c609719b
WD
1396 goto error;
1397 }
c7de829c 1398
34c202c7
WD
1399 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
1400 ascq);
c609719b 1401error:
34c202c7 1402 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
c609719b
WD
1403 return (0xFF);
1404}
1405
1406
34c202c7 1407static void atapi_inquiry(block_dev_desc_t *dev_desc)
c609719b 1408{
34c202c7
WD
1409 unsigned char ccb[12]; /* Command descriptor block */
1410 unsigned char iobuf[64]; /* temp buf */
c609719b
WD
1411 unsigned char c;
1412 int device;
1413
34c202c7
WD
1414 device = dev_desc->dev;
1415 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
1416 dev_desc->block_read = atapi_read;
c609719b 1417
34c202c7
WD
1418 memset(ccb, 0, sizeof(ccb));
1419 memset(iobuf, 0, sizeof(iobuf));
c609719b 1420
34c202c7
WD
1421 ccb[0] = ATAPI_CMD_INQUIRY;
1422 ccb[4] = 40; /* allocation Legnth */
1423 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40);
c609719b 1424
34c202c7
WD
1425 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
1426 if (c != 0)
c609719b
WD
1427 return;
1428
1429 /* copy device ident strings */
34c202c7
WD
1430 ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8);
1431 ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16);
1432 ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5);
c609719b 1433
34c202c7
WD
1434 dev_desc->lun = 0;
1435 dev_desc->lba = 0;
1436 dev_desc->blksz = 0;
0472fbfd 1437 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
34c202c7 1438 dev_desc->type = iobuf[0] & 0x1f;
c609719b 1439
34c202c7 1440 if ((iobuf[1] & 0x80) == 0x80)
c609719b
WD
1441 dev_desc->removable = 1;
1442 else
1443 dev_desc->removable = 0;
1444
34c202c7
WD
1445 memset(ccb, 0, sizeof(ccb));
1446 memset(iobuf, 0, sizeof(iobuf));
1447 ccb[0] = ATAPI_CMD_START_STOP;
1448 ccb[4] = 0x03; /* start */
c609719b 1449
34c202c7 1450 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
c609719b 1451
34c202c7
WD
1452 debug("ATAPI_CMD_START_STOP returned %x\n", c);
1453 if (c != 0)
c609719b
WD
1454 return;
1455
34c202c7
WD
1456 memset(ccb, 0, sizeof(ccb));
1457 memset(iobuf, 0, sizeof(iobuf));
1458 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
c609719b 1459
34c202c7
WD
1460 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
1461 if (c != 0)
c609719b
WD
1462 return;
1463
34c202c7
WD
1464 memset(ccb, 0, sizeof(ccb));
1465 memset(iobuf, 0, sizeof(iobuf));
1466 ccb[0] = ATAPI_CMD_READ_CAP;
1467 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8);
1468 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
1469 if (c != 0)
c609719b
WD
1470 return;
1471
34c202c7
WD
1472 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1473 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
1474 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
1475
1476 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
1477 ((unsigned long) iobuf[1] << 16) +
1478 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
1479 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
1480 ((unsigned long) iobuf[5] << 16) +
1481 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
0472fbfd 1482 dev_desc->log2blksz = LOG2(dev_desc->blksz);
42dfe7a1 1483#ifdef CONFIG_LBA48
34c202c7
WD
1484 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1485 dev_desc->lba48 = 0;
42dfe7a1 1486#endif
c609719b
WD
1487 return;
1488}
1489
1490
1491/*
1492 * atapi_read:
1493 * we transfer only one block per command, since the multiple DRQ per
1494 * command is not yet implemented
1495 */
1496#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
1497#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
34c202c7 1498#define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
c609719b 1499
b6458d38 1500ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
c609719b
WD
1501{
1502 ulong n = 0;
34c202c7 1503 unsigned char ccb[12]; /* Command descriptor block */
c609719b
WD
1504 ulong cnt;
1505
b6458d38 1506 debug("atapi_read dev %d start %lX, blocks " LBAF " buffer at %lX\n",
34c202c7 1507 device, blknr, blkcnt, (ulong) buffer);
c609719b
WD
1508
1509 do {
34c202c7
WD
1510 if (blkcnt > ATAPI_READ_MAX_BLOCK)
1511 cnt = ATAPI_READ_MAX_BLOCK;
1512 else
1513 cnt = blkcnt;
1514
1515 ccb[0] = ATAPI_CMD_READ_12;
1516 ccb[1] = 0; /* reserved */
1517 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
1518 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
1519 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
1520 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
1521 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
1522 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
1523 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
1524 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
1525 ccb[10] = 0; /* reserved */
1526 ccb[11] = 0; /* reserved */
1527
1528 if (atapi_issue_autoreq(device, ccb, 12,
1529 (unsigned char *) buffer,
1530 cnt * ATAPI_READ_BLOCK_SIZE)
1531 == 0xFF) {
c609719b
WD
1532 return (n);
1533 }
34c202c7
WD
1534 n += cnt;
1535 blkcnt -= cnt;
1536 blknr += cnt;
1537 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
c609719b
WD
1538 } while (blkcnt > 0);
1539 return (n);
1540}
1541
1542/* ------------------------------------------------------------------------- */
1543
1544#endif /* CONFIG_ATAPI */
1545
34c202c7
WD
1546U_BOOT_CMD(ide, 5, 1, do_ide,
1547 "IDE sub-system",
1548 "reset - reset IDE controller\n"
1549 "ide info - show available IDE devices\n"
1550 "ide device [dev] - show or set current device\n"
1551 "ide part [dev] - print partition table of one or all IDE devices\n"
1552 "ide read addr blk# cnt\n"
1553 "ide write addr blk# cnt - read/write `cnt'"
1554 " blocks starting at block `blk#'\n"
1555 " to/from memory address `addr'");
1556
1557U_BOOT_CMD(diskboot, 3, 1, do_diskboot,
1558 "boot from IDE device", "loadAddr dev:part");
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