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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
d90a5a30 | 2 | /* |
5eee93e5 | 3 | * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@com> |
d90a5a30 MY |
4 | */ |
5 | ||
6 | #ifndef __PINCTRL_H | |
7 | #define __PINCTRL_H | |
8 | ||
d5a83139 | 9 | #define PINNAME_SIZE 10 |
e19b8dda | 10 | #define PINMUX_SIZE 80 |
d5a83139 | 11 | |
d90a5a30 MY |
12 | /** |
13 | * struct pinconf_param - pin config parameters | |
5eee93e5 SA |
14 | * @property: Property name in DT nodes |
15 | * @param: ID for this config parameter | |
16 | * @default_value: default value for this config parameter used in case | |
17 | * no value is specified in DT nodes | |
d90a5a30 MY |
18 | */ |
19 | struct pinconf_param { | |
20 | const char * const property; | |
21 | unsigned int param; | |
22 | u32 default_value; | |
23 | }; | |
24 | ||
25 | /** | |
26 | * struct pinctrl_ops - pin control operations, to be implemented by | |
27 | * pin controller drivers. | |
28 | * | |
5eee93e5 SA |
29 | * set_state() is the only mandatory operation. You can implement your pinctrl |
30 | * driver with its own @set_state. In this case, the other callbacks are not | |
31 | * required. Otherwise, generic pinctrl framework is also available; use | |
32 | * pinctrl_generic_set_state for @set_state, and implement other operations | |
d90a5a30 | 33 | * depending on your necessity. |
d90a5a30 MY |
34 | */ |
35 | struct pinctrl_ops { | |
5eee93e5 SA |
36 | /** |
37 | * @get_pins_count: Get the number of selectable pins | |
38 | * | |
39 | * @dev: Pinctrl device to use | |
40 | * | |
41 | * This function is necessary to parse the "pins" property in DTS. | |
42 | * | |
43 | * @Return: | |
44 | * number of selectable named pins available in this driver | |
45 | */ | |
d90a5a30 | 46 | int (*get_pins_count)(struct udevice *dev); |
5eee93e5 SA |
47 | |
48 | /** | |
49 | * @get_pin_name: Get the name of a pin | |
50 | * | |
51 | * @dev: Pinctrl device of the pin | |
52 | * | |
53 | * @selector: The pin selector | |
54 | * | |
55 | * This function is called by the core to figure out which pin it will | |
56 | * do operations to. This function is necessary to parse the "pins" | |
57 | * property in DTS. | |
58 | * | |
59 | * @Return: const pointer to the name of the pin | |
60 | */ | |
d90a5a30 | 61 | const char *(*get_pin_name)(struct udevice *dev, unsigned selector); |
5eee93e5 SA |
62 | |
63 | /** | |
64 | * @get_groups_count: Get the number of selectable groups | |
65 | * | |
66 | * @dev: Pinctrl device to use | |
67 | * | |
68 | * This function is necessary to parse the "groups" property in DTS. | |
69 | * | |
70 | * @Return: | |
71 | * number of selectable named groups available in the driver | |
72 | */ | |
d90a5a30 | 73 | int (*get_groups_count)(struct udevice *dev); |
5eee93e5 SA |
74 | |
75 | /** | |
76 | * @get_group_name: Get the name of a group | |
77 | * | |
78 | * @dev: Pinctrl device of the group | |
79 | * | |
80 | * @selector: The group selector | |
81 | * | |
82 | * This function is called by the core to figure out which group it | |
83 | * will do operations to. This function is necessary to parse the | |
84 | * "groups" property in DTS. | |
85 | * | |
86 | * @Return: Pointer to the name of the group | |
87 | */ | |
d90a5a30 | 88 | const char *(*get_group_name)(struct udevice *dev, unsigned selector); |
5eee93e5 SA |
89 | |
90 | /** | |
91 | * @get_functions_count: Get the number of selectable functions | |
92 | * | |
93 | * @dev: Pinctrl device to use | |
94 | * | |
95 | * This function is necessary for pin-muxing. | |
96 | * | |
97 | * @Return: | |
98 | * number of selectable named functions available in this driver | |
99 | */ | |
d90a5a30 | 100 | int (*get_functions_count)(struct udevice *dev); |
5eee93e5 SA |
101 | |
102 | /** | |
103 | * @get_function_name: Get the name of a function | |
104 | * | |
105 | * @dev: Pinmux device of the function | |
106 | * | |
107 | * @selector: The function selector | |
108 | * | |
109 | * This function is called by the core to figure out which mux setting | |
110 | * it will map a certain device to. This function is necessary for | |
111 | * pin-muxing. | |
112 | * | |
113 | * @Return: | |
114 | * Pointer to the function name of the muxing selector | |
115 | */ | |
d90a5a30 MY |
116 | const char *(*get_function_name)(struct udevice *dev, |
117 | unsigned selector); | |
5eee93e5 SA |
118 | |
119 | /** | |
120 | * @pinmux_set: Mux a pin to a function | |
121 | * | |
122 | * @dev: Pinctrl device to use | |
123 | * | |
124 | * @pin_selector: The pin selector | |
125 | * | |
126 | * @func_selector: The func selector | |
127 | * | |
128 | * On simple controllers one of @pin_selector or @func_selector may be | |
129 | * ignored. This function is necessary for pin-muxing against a single | |
130 | * pin. | |
131 | * | |
132 | * @Return: 0 if OK, or negative error code on failure | |
133 | */ | |
d90a5a30 MY |
134 | int (*pinmux_set)(struct udevice *dev, unsigned pin_selector, |
135 | unsigned func_selector); | |
5eee93e5 SA |
136 | |
137 | /** | |
138 | * @pinmux_group_set: Mux a group of pins to a function | |
139 | * | |
140 | * @dev: Pinctrl device to use | |
141 | * | |
142 | * @group_selector: The group selector | |
143 | * | |
144 | * @func_selector: The func selector | |
145 | * | |
146 | * On simple controllers one of @group_selector or @func_selector may be | |
147 | * ignored. This function is necessary for pin-muxing against a group of | |
148 | * pins. | |
149 | * | |
150 | * @Return: 0 if OK, or negative error code on failure | |
151 | */ | |
d90a5a30 MY |
152 | int (*pinmux_group_set)(struct udevice *dev, unsigned group_selector, |
153 | unsigned func_selector); | |
5eee93e5 SA |
154 | |
155 | /** | |
156 | * @pinmux_property_set: Enable a pinmux group | |
157 | * | |
158 | * @dev: Pinctrl device to use | |
159 | * | |
160 | * @pinmux_group: A u32 representing the pin identifier and mux | |
161 | * settings. The exact format of a pinmux group is left | |
162 | * up to the driver. | |
163 | * | |
164 | * Mux a single pin to a single function based on a driver-specific | |
165 | * pinmux group. This function is necessary for parsing the "pinmux" | |
166 | * property in DTS, and for pin-muxing against a pinmux group. | |
167 | * | |
168 | * @Return: | |
169 | * Pin selector for the muxed pin if OK, or negative error code on | |
170 | * failure | |
171 | */ | |
9c08fbfc | 172 | int (*pinmux_property_set)(struct udevice *dev, u32 pinmux_group); |
5eee93e5 SA |
173 | |
174 | /** | |
175 | * @pinconf_num_params: | |
176 | * Number of driver-specific parameters to be parsed from device | |
177 | * trees. This member is necessary for pin configuration. | |
178 | */ | |
d90a5a30 | 179 | unsigned int pinconf_num_params; |
5eee93e5 SA |
180 | |
181 | /** | |
182 | * @pinconf_params: | |
183 | * List of driver-specific parameters to be parsed from the device | |
184 | * tree. This member is necessary for pin configuration. | |
185 | */ | |
d90a5a30 | 186 | const struct pinconf_param *pinconf_params; |
5eee93e5 SA |
187 | |
188 | /** | |
189 | * @pinconf_set: Configure an individual pin with a parameter | |
190 | * | |
191 | * @dev: Pinctrl device to use | |
192 | * | |
193 | * @pin_selector: The pin selector | |
194 | * | |
195 | * @param: An &enum pin_config_param from @pinconf_params | |
196 | * | |
197 | * @argument: The argument to this param from the device tree, or | |
198 | * @pinconf_params.default_value | |
199 | * | |
200 | * This function is necessary for pin configuration against a single | |
201 | * pin. | |
202 | * | |
203 | * @Return: 0 if OK, or negative error code on failure | |
204 | */ | |
d90a5a30 MY |
205 | int (*pinconf_set)(struct udevice *dev, unsigned pin_selector, |
206 | unsigned param, unsigned argument); | |
5eee93e5 SA |
207 | |
208 | /** | |
209 | * @pinconf_group_set: Configure all pins in a group with a parameter | |
210 | * | |
211 | * @dev: Pinctrl device to use | |
212 | * | |
213 | * @pin_selector: The group selector | |
214 | * | |
215 | * @param: A &enum pin_config_param from | |
216 | * @pinconf_params | |
217 | * | |
218 | * @argument: The argument to this param from the device tree, or | |
219 | * @pinconf_params.default_value | |
220 | * | |
221 | * This function is necessary for pin configuration against a group of | |
222 | * pins. | |
223 | * | |
224 | * @Return: 0 if OK, or negative error code on failure | |
225 | */ | |
d90a5a30 MY |
226 | int (*pinconf_group_set)(struct udevice *dev, unsigned group_selector, |
227 | unsigned param, unsigned argument); | |
5eee93e5 SA |
228 | |
229 | /** | |
230 | * @set_state: Configure a pinctrl device | |
231 | * | |
232 | * @dev: Pinctrl device to use | |
233 | * | |
234 | * @config: Pseudo device pointing a config node | |
235 | * | |
236 | * This function is required to be implemented by all pinctrl drivers. | |
237 | * Drivers may set this member to pinctrl_generic_set_state(), which | |
238 | * will call other functions in &struct pinctrl_ops to parse | |
239 | * @config. | |
240 | * | |
241 | * @Return: 0 if OK, or negative error code on failure | |
242 | */ | |
d90a5a30 | 243 | int (*set_state)(struct udevice *dev, struct udevice *config); |
c5acf4a2 | 244 | |
5eee93e5 SA |
245 | /** |
246 | * @set_state_simple: Configure a pinctrl device | |
247 | * | |
248 | * @dev: Pinctrl device to use | |
249 | * | |
250 | * @config: Pseudo-device pointing a config node | |
251 | * | |
252 | * This function is usually a simpler version of set_state(). Only the | |
253 | * first pinctrl device on the system is supported by this function. | |
254 | * | |
255 | * @Return: 0 if OK, or negative error code on failure | |
256 | */ | |
d90a5a30 | 257 | int (*set_state_simple)(struct udevice *dev, struct udevice *periph); |
5eee93e5 | 258 | |
c5acf4a2 | 259 | /** |
5eee93e5 SA |
260 | * @request: Request a particular pinctrl function |
261 | * | |
262 | * @dev: Device to adjust (%UCLASS_PINCTRL) | |
263 | * | |
264 | * @func: Function number (driver-specific) | |
c5acf4a2 SG |
265 | * |
266 | * This activates the selected function. | |
267 | * | |
5eee93e5 | 268 | * @Return: 0 if OK, or negative error code on failure |
c5acf4a2 SG |
269 | */ |
270 | int (*request)(struct udevice *dev, int func, int flags); | |
271 | ||
272 | /** | |
5eee93e5 SA |
273 | * @get_periph_id: Get the peripheral ID for a device |
274 | * | |
275 | * @dev: Pinctrl device to use for decoding | |
276 | * | |
277 | * @periph: Device to check | |
c5acf4a2 SG |
278 | * |
279 | * This generally looks at the peripheral's device tree node to work | |
280 | * out the peripheral ID. The return value is normally interpreted as | |
5eee93e5 | 281 | * &enum periph_id. so long as this is defined by the platform (which it |
c5acf4a2 SG |
282 | * should be). |
283 | * | |
5eee93e5 SA |
284 | * @Return: |
285 | * Peripheral ID of @periph, or %-ENOENT on error | |
c5acf4a2 SG |
286 | */ |
287 | int (*get_periph_id)(struct udevice *dev, struct udevice *periph); | |
77eaa19e SG |
288 | |
289 | /** | |
5eee93e5 SA |
290 | * @get_gpio_mux: Get the mux value for a particular GPIO |
291 | * | |
292 | * @dev: Pinctrl device to use | |
293 | * | |
294 | * @banknum: GPIO bank number | |
295 | * | |
296 | * @index: GPIO index within the bank | |
77eaa19e SG |
297 | * |
298 | * This allows the raw mux value for a GPIO to be obtained. It is | |
299 | * useful for displaying the function being used by that GPIO, such | |
300 | * as with the 'gpio' command. This function is internal to the GPIO | |
301 | * subsystem and should not be used by generic code. Typically it is | |
302 | * used by a GPIO driver with knowledge of the SoC pinctrl setup. | |
303 | * | |
5eee93e5 SA |
304 | * @Return: |
305 | * Mux value (SoC-specific, e.g. 0 for input, 1 for output) | |
77eaa19e SG |
306 | */ |
307 | int (*get_gpio_mux)(struct udevice *dev, int banknum, int index); | |
f55a0c0a PC |
308 | |
309 | /** | |
5eee93e5 SA |
310 | * @get_pin_muxing: Show pin muxing |
311 | * | |
312 | * @dev: Pinctrl device to use | |
313 | * | |
314 | * @selector: Pin selector | |
315 | * | |
316 | * @buf: Buffer to fill with pin muxing description | |
317 | * | |
318 | * @size: Size of @buf | |
f55a0c0a PC |
319 | * |
320 | * This allows to display the muxing of a given pin. It's useful for | |
5eee93e5 SA |
321 | * debug purposes to know if a pin is configured as GPIO or as an |
322 | * alternate function and which one. Typically it is used by a PINCTRL | |
323 | * driver with knowledge of the SoC pinctrl setup. | |
324 | * | |
325 | * @Return: 0 if OK, or negative error code on failure | |
f55a0c0a PC |
326 | */ |
327 | int (*get_pin_muxing)(struct udevice *dev, unsigned int selector, | |
328 | char *buf, int size); | |
ae59d7ca MV |
329 | |
330 | /** | |
5eee93e5 SA |
331 | * @gpio_request_enable: Request and enable GPIO on a certain pin. |
332 | * | |
333 | * @dev: Pinctrl device to use | |
334 | * | |
335 | * @selector: Pin selector | |
336 | * | |
337 | * Implement this only if you can mux every pin individually as GPIO. | |
338 | * The affected GPIO range is passed along with an offset(pin number) | |
339 | * into that specific GPIO range - function selectors and pin groups are | |
340 | * orthogonal to this, the core will however make sure the pins do not | |
341 | * collide. | |
ae59d7ca | 342 | * |
5eee93e5 SA |
343 | * @Return: |
344 | * 0 if OK, or negative error code on failure | |
ae59d7ca MV |
345 | */ |
346 | int (*gpio_request_enable)(struct udevice *dev, unsigned int selector); | |
347 | ||
348 | /** | |
5eee93e5 | 349 | * @gpio_disable_free: Free up GPIO muxing on a certain pin. |
ae59d7ca | 350 | * |
5eee93e5 SA |
351 | * @dev: Pinctrl device to use |
352 | * | |
353 | * @selector: Pin selector | |
354 | * | |
355 | * This function is the reverse of @gpio_request_enable. | |
356 | * | |
357 | * @Return: 0 if OK, or negative error code on failure | |
ae59d7ca MV |
358 | */ |
359 | int (*gpio_disable_free)(struct udevice *dev, unsigned int selector); | |
d90a5a30 MY |
360 | }; |
361 | ||
362 | #define pinctrl_get_ops(dev) ((struct pinctrl_ops *)(dev)->driver->ops) | |
363 | ||
364 | /** | |
5eee93e5 | 365 | * enum pin_config_param - Generic pin configuration parameters |
d90a5a30 | 366 | * |
5eee93e5 | 367 | * @PIN_CONFIG_BIAS_BUS_HOLD: The pin will be set to weakly latch so that it |
0fe4e418 PF |
368 | * weakly drives the last value on a tristate bus, also known as a "bus |
369 | * holder", "bus keeper" or "repeater". This allows another device on the | |
370 | * bus to change the value by driving the bus high or low and switching to | |
371 | * tristate. The argument is ignored. | |
5eee93e5 | 372 | * @PIN_CONFIG_BIAS_DISABLE: Disable any pin bias on the pin, a |
d90a5a30 MY |
373 | * transition from say pull-up to pull-down implies that you disable |
374 | * pull-up in the process, this setting disables all biasing. | |
5eee93e5 | 375 | * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: The pin will be set to a high impedance |
d90a5a30 MY |
376 | * mode, also know as "third-state" (tristate) or "high-Z" or "floating". |
377 | * On output pins this effectively disconnects the pin, which is useful | |
378 | * if for example some other pin is going to drive the signal connected | |
379 | * to it for a while. Pins used for input are usually always high | |
380 | * impedance. | |
5eee93e5 | 381 | * @PIN_CONFIG_BIAS_PULL_DOWN: The pin will be pulled down (usually with high |
d90a5a30 MY |
382 | * impedance to GROUND). If the argument is != 0 pull-down is enabled, |
383 | * if it is 0, pull-down is total, i.e. the pin is connected to GROUND. | |
5eee93e5 | 384 | * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: The pin will be pulled up or down based |
d90a5a30 MY |
385 | * on embedded knowledge of the controller hardware, like current mux |
386 | * function. The pull direction and possibly strength too will normally | |
387 | * be decided completely inside the hardware block and not be readable | |
388 | * from the kernel side. | |
389 | * If the argument is != 0 pull up/down is enabled, if it is 0, the | |
390 | * configuration is ignored. The proper way to disable it is to use | |
391 | * @PIN_CONFIG_BIAS_DISABLE. | |
5eee93e5 | 392 | * @PIN_CONFIG_BIAS_PULL_UP: The pin will be pulled up (usually with high |
0fe4e418 PF |
393 | * impedance to VDD). If the argument is != 0 pull-up is enabled, |
394 | * if it is 0, pull-up is total, i.e. the pin is connected to VDD. | |
5eee93e5 | 395 | * @PIN_CONFIG_DRIVE_OPEN_DRAIN: The pin will be driven with open drain (open |
d90a5a30 MY |
396 | * collector) which means it is usually wired with other output ports |
397 | * which are then pulled up with an external resistor. Setting this | |
398 | * config will enable open drain mode, the argument is ignored. | |
5eee93e5 | 399 | * @PIN_CONFIG_DRIVE_OPEN_SOURCE: The pin will be driven with open source |
d90a5a30 MY |
400 | * (open emitter). Setting this config will enable open source mode, the |
401 | * argument is ignored. | |
5eee93e5 | 402 | * @PIN_CONFIG_DRIVE_PUSH_PULL: The pin will be driven actively high and |
0fe4e418 PF |
403 | * low, this is the most typical case and is typically achieved with two |
404 | * active transistors on the output. Setting this config will enable | |
405 | * push-pull mode, the argument is ignored. | |
5eee93e5 | 406 | * @PIN_CONFIG_DRIVE_STRENGTH: The pin will sink or source at most the current |
d90a5a30 | 407 | * passed as argument. The argument is in mA. |
5eee93e5 SA |
408 | * @PIN_CONFIG_DRIVE_STRENGTH_UA: The pin will sink or source at most the |
409 | * current passed as argument. The argument is in uA. | |
410 | * @PIN_CONFIG_INPUT_DEBOUNCE: This will configure the pin to debounce mode, | |
0fe4e418 PF |
411 | * which means it will wait for signals to settle when reading inputs. The |
412 | * argument gives the debounce time in usecs. Setting the | |
413 | * argument to zero turns debouncing off. | |
5eee93e5 | 414 | * @PIN_CONFIG_INPUT_ENABLE: Enable the pin's input. Note that this does not |
d90a5a30 MY |
415 | * affect the pin's ability to drive output. 1 enables input, 0 disables |
416 | * input. | |
5eee93e5 | 417 | * @PIN_CONFIG_INPUT_SCHMITT: This will configure an input pin to run in |
d90a5a30 MY |
418 | * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis, |
419 | * the threshold value is given on a custom format as argument when | |
420 | * setting pins to this mode. | |
5eee93e5 | 421 | * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: Control schmitt-trigger mode on the pin. |
0fe4e418 PF |
422 | * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, |
423 | * schmitt-trigger mode is disabled. | |
5eee93e5 | 424 | * @PIN_CONFIG_LOW_POWER_MODE: This will configure the pin for low power |
0fe4e418 PF |
425 | * operation, if several modes of operation are supported these can be |
426 | * passed in the argument on a custom form, else just use argument 1 | |
427 | * to indicate low power mode, argument 0 turns low power mode off. | |
5eee93e5 | 428 | * @PIN_CONFIG_OUTPUT_ENABLE: This will enable the pin's output mode |
0fe4e418 PF |
429 | * without driving a value there. For most platforms this reduces to |
430 | * enable the output buffers and then let the pin controller current | |
431 | * configuration (eg. the currently selected mux function) drive values on | |
432 | * the line. Use argument 1 to enable output mode, argument 0 to disable | |
433 | * it. | |
5eee93e5 | 434 | * @PIN_CONFIG_OUTPUT: This will configure the pin as an output and drive a |
0fe4e418 PF |
435 | * value on the line. Use argument 1 to indicate high level, argument 0 to |
436 | * indicate low level. (Please see Documentation/driver-api/pinctl.rst, | |
437 | * section "GPIO mode pitfalls" for a discussion around this parameter.) | |
5eee93e5 | 438 | * @PIN_CONFIG_POWER_SOURCE: If the pin can select between different power |
d90a5a30 MY |
439 | * supplies, the argument to this parameter (on a custom format) tells |
440 | * the driver which alternative power source to use. | |
5eee93e5 SA |
441 | * @PIN_CONFIG_SLEEP_HARDWARE_STATE: Indicate this is sleep related state. |
442 | * @PIN_CONFIG_SLEW_RATE: If the pin can select slew rate, the argument to | |
d90a5a30 MY |
443 | * this parameter (on a custom format) tells the driver which alternative |
444 | * slew rate to use. | |
5eee93e5 | 445 | * @PIN_CONFIG_SKEW_DELAY: If the pin has programmable skew rate (on inputs) |
0fe4e418 PF |
446 | * or latch delay (on outputs) this parameter (in a custom format) |
447 | * specifies the clock skew or latch delay. It typically controls how | |
448 | * many double inverters are put in front of the line. | |
5eee93e5 | 449 | * @PIN_CONFIG_END: This is the last enumerator for pin configurations, if |
d90a5a30 MY |
450 | * you need to pass in custom configurations to the pin controller, use |
451 | * PIN_CONFIG_END+1 as the base offset. | |
5eee93e5 | 452 | * @PIN_CONFIG_MAX: This is the maximum configuration value that can be |
0fe4e418 | 453 | * presented using the packed format. |
d90a5a30 | 454 | */ |
0fe4e418 | 455 | enum pin_config_param { |
4173a426 ARS |
456 | PIN_CONFIG_BIAS_BUS_HOLD = 0, |
457 | PIN_CONFIG_BIAS_DISABLE = 1, | |
458 | PIN_CONFIG_BIAS_HIGH_IMPEDANCE = 2, | |
459 | PIN_CONFIG_BIAS_PULL_DOWN = 3, | |
460 | PIN_CONFIG_BIAS_PULL_PIN_DEFAULT = 4, | |
461 | PIN_CONFIG_BIAS_PULL_UP = 5, | |
462 | PIN_CONFIG_DRIVE_OPEN_DRAIN = 6, | |
463 | PIN_CONFIG_DRIVE_OPEN_SOURCE = 7, | |
464 | PIN_CONFIG_DRIVE_PUSH_PULL = 8, | |
465 | PIN_CONFIG_DRIVE_STRENGTH = 9, | |
466 | PIN_CONFIG_DRIVE_STRENGTH_UA = 10, | |
467 | PIN_CONFIG_INPUT_DEBOUNCE = 11, | |
468 | PIN_CONFIG_INPUT_ENABLE = 12, | |
469 | PIN_CONFIG_INPUT_SCHMITT = 13, | |
470 | PIN_CONFIG_INPUT_SCHMITT_ENABLE = 14, | |
471 | PIN_CONFIG_LOW_POWER_MODE = 15, | |
472 | PIN_CONFIG_OUTPUT_ENABLE = 16, | |
473 | PIN_CONFIG_OUTPUT = 17, | |
474 | PIN_CONFIG_POWER_SOURCE = 18, | |
475 | PIN_CONFIG_SLEEP_HARDWARE_STATE = 19, | |
476 | PIN_CONFIG_SLEW_RATE = 20, | |
477 | PIN_CONFIG_SKEW_DELAY = 21, | |
478 | PIN_CONFIG_END = 127, /* 0x7F */ | |
479 | PIN_CONFIG_MAX = 255, /* 0xFF */ | |
0fe4e418 | 480 | }; |
d90a5a30 MY |
481 | |
482 | #if CONFIG_IS_ENABLED(PINCTRL_GENERIC) | |
483 | /** | |
5eee93e5 SA |
484 | * pinctrl_generic_set_state() - Generic set_state operation |
485 | * @pctldev: Pinctrl device to use | |
486 | * @config: Config device (pseudo device), pointing a config node in DTS | |
487 | * | |
d90a5a30 MY |
488 | * Parse the DT node of @config and its children and handle generic properties |
489 | * such as "pins", "groups", "functions", and pin configuration parameters. | |
490 | * | |
5eee93e5 | 491 | * Return: 0 on success, or negative error code on failure |
d90a5a30 MY |
492 | */ |
493 | int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config); | |
92c4a95e T |
494 | int pinctrl_generic_set_state_prefix(struct udevice *pctldev, struct udevice *config, |
495 | const char *prefix); | |
d90a5a30 MY |
496 | #else |
497 | static inline int pinctrl_generic_set_state(struct udevice *pctldev, | |
498 | struct udevice *config) | |
499 | { | |
1c01712a | 500 | return -ENOSYS; |
d90a5a30 MY |
501 | } |
502 | #endif | |
503 | ||
504 | #if CONFIG_IS_ENABLED(PINCTRL) | |
505 | /** | |
5eee93e5 SA |
506 | * pinctrl_select_state() - Set a device to a given state |
507 | * @dev: Peripheral device | |
508 | * @statename: State name, like "default" | |
d90a5a30 | 509 | * |
5eee93e5 | 510 | * Return: 0 on success, or negative error code on failure |
d90a5a30 MY |
511 | */ |
512 | int pinctrl_select_state(struct udevice *dev, const char *statename); | |
513 | #else | |
514 | static inline int pinctrl_select_state(struct udevice *dev, | |
515 | const char *statename) | |
516 | { | |
1c01712a | 517 | return -ENOSYS; |
d90a5a30 MY |
518 | } |
519 | #endif | |
520 | ||
c5acf4a2 SG |
521 | /** |
522 | * pinctrl_request() - Request a particular pinctrl function | |
5eee93e5 | 523 | * @dev: Pinctrl device to use |
c5acf4a2 SG |
524 | * @func: Function number (driver-specific) |
525 | * @flags: Flags (driver-specific) | |
5eee93e5 SA |
526 | * |
527 | * Return: 0 if OK, or negative error code on failure | |
c5acf4a2 SG |
528 | */ |
529 | int pinctrl_request(struct udevice *dev, int func, int flags); | |
530 | ||
531 | /** | |
532 | * pinctrl_request_noflags() - Request a particular pinctrl function | |
5eee93e5 SA |
533 | * @dev: Pinctrl device to use |
534 | * @func: Function number (driver-specific) | |
c5acf4a2 SG |
535 | * |
536 | * This is similar to pinctrl_request() but uses 0 for @flags. | |
537 | * | |
5eee93e5 | 538 | * Return: 0 if OK, or negative error code on failure |
c5acf4a2 SG |
539 | */ |
540 | int pinctrl_request_noflags(struct udevice *dev, int func); | |
541 | ||
542 | /** | |
5eee93e5 SA |
543 | * pinctrl_get_periph_id() - Get the peripheral ID for a device |
544 | * @dev: Pinctrl device to use for decoding | |
545 | * @periph: Device to check | |
c5acf4a2 SG |
546 | * |
547 | * This generally looks at the peripheral's device tree node to work out the | |
548 | * peripheral ID. The return value is normally interpreted as enum periph_id. | |
549 | * so long as this is defined by the platform (which it should be). | |
550 | * | |
5eee93e5 | 551 | * Return: Peripheral ID of @periph, or -ENOENT on error |
c5acf4a2 SG |
552 | */ |
553 | int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph); | |
554 | ||
77eaa19e SG |
555 | /** |
556 | * pinctrl_get_gpio_mux() - get the mux value for a particular GPIO | |
5eee93e5 SA |
557 | * @dev: Pinctrl device to use |
558 | * @banknum: GPIO bank number | |
559 | * @index: GPIO index within the bank | |
77eaa19e SG |
560 | * |
561 | * This allows the raw mux value for a GPIO to be obtained. It is | |
562 | * useful for displaying the function being used by that GPIO, such | |
563 | * as with the 'gpio' command. This function is internal to the GPIO | |
564 | * subsystem and should not be used by generic code. Typically it is | |
565 | * used by a GPIO driver with knowledge of the SoC pinctrl setup. | |
566 | * | |
5eee93e5 | 567 | * Return: Mux value (SoC-specific, e.g. 0 for input, 1 for output) |
77eaa19e SG |
568 | */ |
569 | int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index); | |
570 | ||
f55a0c0a PC |
571 | /** |
572 | * pinctrl_get_pin_muxing() - Returns the muxing description | |
5eee93e5 SA |
573 | * @dev: Pinctrl device to use |
574 | * @selector: Pin index within pin-controller | |
575 | * @buf: Pin's muxing description | |
576 | * @size: Pin's muxing description length | |
f55a0c0a PC |
577 | * |
578 | * This allows to display the muxing description of the given pin for | |
579 | * debug purpose | |
580 | * | |
5eee93e5 | 581 | * Return: 0 if OK, or negative error code on failure |
f55a0c0a PC |
582 | */ |
583 | int pinctrl_get_pin_muxing(struct udevice *dev, int selector, char *buf, | |
584 | int size); | |
585 | ||
8bbb5b20 | 586 | /** |
5eee93e5 SA |
587 | * pinctrl_get_pins_count() - Display pin-controller pins number |
588 | * @dev: Pinctrl device to use | |
8bbb5b20 PC |
589 | * |
590 | * This allows to know the number of pins owned by a given pin-controller | |
591 | * | |
4c60fd99 | 592 | * Return: Number of pins if OK, or -ENOSYS when not supported |
8bbb5b20 PC |
593 | */ |
594 | int pinctrl_get_pins_count(struct udevice *dev); | |
595 | ||
596 | /** | |
597 | * pinctrl_get_pin_name() - Returns the pin's name | |
5eee93e5 SA |
598 | * @dev: Pinctrl device to use |
599 | * @selector: Pin index within pin-controller | |
600 | * @buf: Buffer to fill with the name of the pin | |
601 | * @size: Size of @buf | |
8bbb5b20 PC |
602 | * |
603 | * This allows to display the pin's name for debug purpose | |
604 | * | |
5eee93e5 | 605 | * Return: 0 if OK, or negative error code on failure |
8bbb5b20 PC |
606 | */ |
607 | int pinctrl_get_pin_name(struct udevice *dev, int selector, char *buf, | |
608 | int size); | |
ae59d7ca MV |
609 | |
610 | /** | |
5eee93e5 SA |
611 | * pinctrl_gpio_request() - Request a single pin to be used as GPIO |
612 | * @dev: GPIO peripheral device | |
613 | * @offset: GPIO pin offset from the GPIO controller | |
a1de1035 | 614 | * @label: GPIO label |
ae59d7ca | 615 | * |
5eee93e5 | 616 | * Return: 0 on success, or negative error code on failure |
ae59d7ca | 617 | */ |
a1de1035 | 618 | int pinctrl_gpio_request(struct udevice *dev, unsigned offset, const char *label); |
ae59d7ca MV |
619 | |
620 | /** | |
5eee93e5 SA |
621 | * pinctrl_gpio_free() - Free a single pin used as GPIO |
622 | * @dev: GPIO peripheral device | |
623 | * @offset: GPIO pin offset from the GPIO controller | |
ae59d7ca | 624 | * |
5eee93e5 | 625 | * Return: 0 on success, or negative error code on failure |
ae59d7ca MV |
626 | */ |
627 | int pinctrl_gpio_free(struct udevice *dev, unsigned offset); | |
628 | ||
d90a5a30 | 629 | #endif /* __PINCTRL_H */ |