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Commit | Line | Data |
---|---|---|
f417d71e SM |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_ROCKCHIP=y | |
3 | CONFIG_SYS_TEXT_BASE=0x00200000 | |
9aed2880 | 4 | CONFIG_SPL_GPIO_SUPPORT=y |
d4271fa2 JT |
5 | CONFIG_ENV_SIZE=0x8000 |
6 | CONFIG_ENV_OFFSET=0x3F8000 | |
e8848592 | 7 | CONFIG_ENV_SECT_SIZE=0x1000 |
f417d71e SM |
8 | CONFIG_ROCKCHIP_RK3399=y |
9 | CONFIG_TARGET_ROC_PC_RK3399=y | |
10 | CONFIG_NR_DRAM_BANKS=1 | |
11 | CONFIG_DEBUG_UART_BASE=0xFF1A0000 | |
12 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
1831191b JT |
13 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
14 | CONFIG_SPL_SPI_SUPPORT=y | |
f7d0ae9c | 15 | CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" |
f417d71e | 16 | CONFIG_DEBUG_UART=y |
cbb8189b | 17 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
f417d71e SM |
18 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" |
19 | CONFIG_DISPLAY_BOARDINFO_LATE=y | |
20 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | |
21 | CONFIG_SPL_STACK_R=y | |
6d06ea6c JT |
22 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 |
23 | CONFIG_SPL_ENV_SUPPORT=y | |
1831191b | 24 | CONFIG_SPL_SPI_LOAD=y |
f417d71e | 25 | CONFIG_TPL=y |
f417d71e SM |
26 | CONFIG_CMD_BOOTZ=y |
27 | CONFIG_CMD_GPT=y | |
28 | CONFIG_CMD_MMC=y | |
765a12d6 | 29 | CONFIG_CMD_PCI=y |
32a8f800 | 30 | CONFIG_CMD_USB=y |
f417d71e SM |
31 | # CONFIG_CMD_SETEXPR is not set |
32 | CONFIG_CMD_TIME=y | |
33 | CONFIG_SPL_OF_CONTROL=y | |
f417d71e | 34 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
e8848592 | 35 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
f417d71e | 36 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
6d06ea6c | 37 | CONFIG_SPL_DM_SEQ_ALIAS=y |
f417d71e SM |
38 | CONFIG_ROCKCHIP_GPIO=y |
39 | CONFIG_SYS_I2C_ROCKCHIP=y | |
2c7cff0d | 40 | CONFIG_MISC=y |
f417d71e SM |
41 | CONFIG_MMC_DW=y |
42 | CONFIG_MMC_DW_ROCKCHIP=y | |
43 | CONFIG_MMC_SDHCI=y | |
44 | CONFIG_MMC_SDHCI_ROCKCHIP=y | |
45 | CONFIG_SPI_FLASH_WINBOND=y | |
46 | CONFIG_DM_ETH=y | |
47 | CONFIG_ETH_DESIGNWARE=y | |
48 | CONFIG_GMAC_ROCKCHIP=y | |
765a12d6 JT |
49 | CONFIG_NVME=y |
50 | CONFIG_PCI=y | |
2c7cff0d JT |
51 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
52 | CONFIG_PHY_ROCKCHIP_TYPEC=y | |
f417d71e SM |
53 | CONFIG_PMIC_RK8XX=y |
54 | CONFIG_REGULATOR_PWM=y | |
55 | CONFIG_REGULATOR_RK8XX=y | |
56 | CONFIG_PWM_ROCKCHIP=y | |
80632e04 | 57 | # CONFIG_RAM_ROCKCHIP_DEBUG is not set |
f417d71e | 58 | CONFIG_RAM_RK3399_LPDDR4=y |
765a12d6 | 59 | CONFIG_DM_RESET=y |
f417d71e SM |
60 | CONFIG_BAUDRATE=1500000 |
61 | CONFIG_DEBUG_UART_SHIFT=2 | |
62 | CONFIG_ROCKCHIP_SPI=y | |
63 | CONFIG_SYSRESET=y | |
64 | CONFIG_USB=y | |
65 | CONFIG_USB_XHCI_HCD=y | |
66 | CONFIG_USB_XHCI_DWC3=y | |
67 | CONFIG_USB_EHCI_HCD=y | |
68 | CONFIG_USB_EHCI_GENERIC=y | |
2c7cff0d JT |
69 | CONFIG_USB_DWC3=y |
70 | CONFIG_USB_DWC3_GENERIC=y | |
cbb8189b | 71 | CONFIG_ROCKCHIP_USB2_PHY=y |
b11dc33e | 72 | CONFIG_USB_KEYBOARD=y |
cbb8189b | 73 | CONFIG_USB_GADGET=y |
f417d71e SM |
74 | CONFIG_USB_HOST_ETHER=y |
75 | CONFIG_USB_ETHER_ASIX=y | |
76 | CONFIG_USB_ETHER_ASIX88179=y | |
77 | CONFIG_USB_ETHER_MCS7830=y | |
78 | CONFIG_USB_ETHER_RTL8152=y | |
79 | CONFIG_USB_ETHER_SMSC95XX=y | |
f417d71e | 80 | CONFIG_DM_VIDEO=y |
f417d71e SM |
81 | CONFIG_DISPLAY=y |
82 | CONFIG_VIDEO_ROCKCHIP=y | |
83 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y | |
b11dc33e TR |
84 | CONFIG_SPL_TINY_MEMSET=y |
85 | CONFIG_ERRNO_STR=y |