projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| b24a8ec1 | 1 | CONFIG_ARM=y |
| a2ac2b96 TR |
2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| 3 | CONFIG_SPL_SKIP_LOWLEVEL_INIT=y | |
| 4 | CONFIG_TPL_SKIP_LOWLEVEL_INIT=y | |
| f76750d1 | 5 | CONFIG_SYS_ARCH_TIMER=y |
| b24a8ec1 | 6 | CONFIG_ARCH_ROCKCHIP=y |
| a5fd9a7e | 7 | CONFIG_SYS_TEXT_BASE=0x61000000 |
| 554e5514 | 8 | CONFIG_NR_DRAM_BANKS=2 |
| 052170c6 | 9 | CONFIG_ENV_OFFSET=0x3F8000 |
| 2bba7807 | 10 | CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" |
| c5a6e9f8 | 11 | CONFIG_SPL_TEXT_BASE=0x60000000 |
| b24a8ec1 | 12 | CONFIG_ROCKCHIP_RK322X=y |
| a5fd9a7e | 13 | CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 |
| df33f864 | 14 | CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds" |
| 32a238df | 15 | CONFIG_TARGET_EVB_RK3229=y |
| a5fd9a7e | 16 | CONFIG_SPL_STACK_R_ADDR=0x60600000 |
| 358b6a20 TR |
17 | CONFIG_DEBUG_UART_BASE=0x11030000 |
| 18 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| 556fd590 | 19 | CONFIG_DEBUG_UART=y |
| 49c8ef0e | 20 | CONFIG_SYS_LOAD_ADDR=0x61800800 |
| a5fd9a7e KY |
21 | CONFIG_FIT=y |
| 22 | CONFIG_FIT_VERBOSE=y | |
| 23 | CONFIG_SPL_LOAD_FIT=y | |
| c67ce8fd | 24 | # CONFIG_USE_SPL_FIT_GENERATOR is not set |
| 37304aaf | 25 | CONFIG_USE_PREBOOT=y |
| a2a5053a | 26 | CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb" |
| b24a8ec1 | 27 | # CONFIG_DISPLAY_CPUINFO is not set |
| 78eba69d | 28 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| a5fd9a7e | 29 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| b24a8ec1 | 30 | CONFIG_SPL_STACK_R=y |
| a5fd9a7e | 31 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
| 51827f9a | 32 | CONFIG_SPL_OPTEE_IMAGE=y |
| b24a8ec1 KY |
33 | CONFIG_CMD_GPT=y |
| 34 | CONFIG_CMD_MMC=y | |
| a186e8aa | 35 | CONFIG_CMD_USB_MASS_STORAGE=y |
| b24a8ec1 KY |
36 | # CONFIG_CMD_SETEXPR is not set |
| 37 | CONFIG_CMD_TIME=y | |
| 38 | CONFIG_SPL_OF_CONTROL=y | |
| a5fd9a7e | 39 | CONFIG_TPL_OF_CONTROL=y |
| b24a8ec1 | 40 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 5dc4dfd2 | 41 | CONFIG_ENV_IS_IN_MMC=y |
| 8d8ee47e | 42 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| a50e5c9e | 43 | CONFIG_NET_RANDOM_ETHADDR=y |
| b24a8ec1 KY |
44 | CONFIG_REGMAP=y |
| 45 | CONFIG_SPL_REGMAP=y | |
| a5fd9a7e | 46 | CONFIG_TPL_REGMAP=y |
| b24a8ec1 KY |
47 | CONFIG_SYSCON=y |
| 48 | CONFIG_SPL_SYSCON=y | |
| a5fd9a7e | 49 | CONFIG_TPL_SYSCON=y |
| b24a8ec1 KY |
50 | CONFIG_CLK=y |
| 51 | CONFIG_SPL_CLK=y | |
| a5fd9a7e KY |
52 | CONFIG_TPL_CLK=y |
| 53 | CONFIG_FASTBOOT_BUF_SIZE=0x04000000 | |
| 65c96757 | 54 | CONFIG_FASTBOOT_CMD_OEM_FORMAT=y |
| b24a8ec1 KY |
55 | CONFIG_ROCKCHIP_GPIO=y |
| 56 | CONFIG_SYS_I2C_ROCKCHIP=y | |
| 57 | CONFIG_MMC_DW=y | |
| 58 | CONFIG_MMC_DW_ROCKCHIP=y | |
| 888f184a | 59 | CONFIG_MTD=y |
| a50e5c9e DW |
60 | CONFIG_DM_ETH=y |
| 61 | CONFIG_ETH_DESIGNWARE=y | |
| 62 | CONFIG_GMAC_ROCKCHIP=y | |
| 63 | CONFIG_PHY=y | |
| b24a8ec1 | 64 | CONFIG_PINCTRL=y |
| b24a8ec1 KY |
65 | CONFIG_RAM=y |
| 66 | CONFIG_SPL_RAM=y | |
| a5fd9a7e | 67 | CONFIG_TPL_RAM=y |
| b24a8ec1 | 68 | CONFIG_BAUDRATE=1500000 |
| b24a8ec1 | 69 | CONFIG_DEBUG_UART_SHIFT=2 |
| b24a8ec1 | 70 | CONFIG_SYSRESET=y |
| ecad7051 TR |
71 | CONFIG_USB=y |
| 72 | CONFIG_USB_GADGET=y | |
| 73 | CONFIG_USB_GADGET_DWC2_OTG=y | |
| a5fd9a7e | 74 | CONFIG_TPL_TINY_MEMSET=y |
| b24a8ec1 | 75 | CONFIG_ERRNO_STR=y |