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Commit | Line | Data |
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717b5aad WD |
1 | /* |
2 | * NS16550 Serial Port | |
3 | * originally from linux source (arch/ppc/boot/ns16550.h) | |
4 | * modified slightly to | |
5 | * have addresses as offsets from CFG_ISA_BASE | |
6 | * added a few more definitions | |
7 | * added prototypes for ns16550.c | |
8 | * reduced no of com ports to 2 | |
9 | * modifications (c) Rob Taylor, Flying Pig Systems. 2000. | |
f5e0d039 HS |
10 | * |
11 | * added support for port on 64-bit bus | |
12 | * by Richard Danter ([email protected]), (C) 2005 Wind River Systems | |
717b5aad WD |
13 | */ |
14 | ||
15 | #if (CFG_NS16550_REG_SIZE == 1) | |
16 | struct NS16550 { | |
17 | unsigned char rbr; /* 0 */ | |
18 | unsigned char ier; /* 1 */ | |
19 | unsigned char fcr; /* 2 */ | |
20 | unsigned char lcr; /* 3 */ | |
21 | unsigned char mcr; /* 4 */ | |
22 | unsigned char lsr; /* 5 */ | |
23 | unsigned char msr; /* 6 */ | |
24 | unsigned char scr; /* 7 */ | |
a56bd922 WD |
25 | #if defined(CONFIG_OMAP730) |
26 | unsigned char mdr1; /* 8 */ | |
27 | unsigned char reg9; /* 9 */ | |
28 | unsigned char regA; /* A */ | |
29 | unsigned char regB; /* B */ | |
30 | unsigned char regC; /* C */ | |
31 | unsigned char regD; /* D */ | |
32 | unsigned char regE; /* E */ | |
33 | unsigned char regF; /* F */ | |
34 | unsigned char reg10; /* 10 */ | |
35 | unsigned char ssr; /* 11*/ | |
36 | #endif | |
717b5aad WD |
37 | } __attribute__ ((packed)); |
38 | #elif (CFG_NS16550_REG_SIZE == 2) | |
39 | struct NS16550 { | |
40 | unsigned short rbr; /* 0 */ | |
41 | unsigned short ier; /* 1 */ | |
42 | unsigned short fcr; /* 2 */ | |
43 | unsigned short lcr; /* 3 */ | |
44 | unsigned short mcr; /* 4 */ | |
45 | unsigned short lsr; /* 5 */ | |
46 | unsigned short msr; /* 6 */ | |
47 | unsigned short scr; /* 7 */ | |
48 | } __attribute__ ((packed)); | |
49 | #elif (CFG_NS16550_REG_SIZE == 4) | |
50 | struct NS16550 { | |
22814904 WD |
51 | unsigned long rbr; /* 0 r */ |
52 | unsigned long ier; /* 1 rw */ | |
53 | unsigned long fcr; /* 2 w */ | |
54 | unsigned long lcr; /* 3 rw */ | |
55 | unsigned long mcr; /* 4 rw */ | |
56 | unsigned long lsr; /* 5 r */ | |
57 | unsigned long msr; /* 6 r */ | |
58 | unsigned long scr; /* 7 rw */ | |
59 | }; /* No need to pack an already aligned struct */ | |
717b5aad WD |
60 | #elif (CFG_NS16550_REG_SIZE == -4) |
61 | struct NS16550 { | |
62 | unsigned char rbr; /* 0 */ | |
63 | int pad1:24; | |
64 | unsigned char ier; /* 1 */ | |
65 | int pad2:24; | |
66 | unsigned char fcr; /* 2 */ | |
67 | int pad3:24; | |
68 | unsigned char lcr; /* 3 */ | |
69 | int pad4:24; | |
70 | unsigned char mcr; /* 4 */ | |
71 | int pad5:24; | |
72 | unsigned char lsr; /* 5 */ | |
73 | int pad6:24; | |
74 | unsigned char msr; /* 6 */ | |
75 | int pad7:24; | |
76 | unsigned char scr; /* 7 */ | |
77 | int pad8:24; | |
8ed96046 | 78 | #if defined(CONFIG_OMAP) |
2e5983d2 | 79 | unsigned char mdr1; /* mode select reset TL16C750*/ |
6f21347d WD |
80 | #endif |
81 | #ifdef CONFIG_OMAP1510 | |
2e5983d2 WD |
82 | int pad9:24; |
83 | unsigned long pad[10]; | |
84 | unsigned char osc_12m_sel; | |
85 | int pad10:24; | |
86 | #endif | |
717b5aad | 87 | } __attribute__ ((packed)); |
f5e0d039 HS |
88 | #elif (CFG_NS16550_REG_SIZE == -8) |
89 | struct NS16550 { | |
90 | unsigned char rbr; /* 0 */ | |
91 | unsigned char pad0[7]; | |
92 | unsigned char ier; /* 1 */ | |
93 | unsigned char pad1[7]; | |
94 | unsigned char fcr; /* 2 */ | |
95 | unsigned char pad2[7]; | |
96 | unsigned char lcr; /* 3 */ | |
97 | unsigned char pad3[7]; | |
98 | unsigned char mcr; /* 4 */ | |
99 | unsigned char pad4[7]; | |
100 | unsigned char lsr; /* 5 */ | |
101 | unsigned char pad5[7]; | |
102 | unsigned char msr; /* 6 */ | |
103 | unsigned char pad6[7]; | |
104 | unsigned char scr; /* 7 */ | |
105 | unsigned char pad7[7]; | |
106 | } __attribute__ ((packed)); | |
717b5aad WD |
107 | #else |
108 | #error "Please define NS16550 registers size." | |
109 | #endif | |
110 | ||
111 | #define thr rbr | |
112 | #define iir fcr | |
113 | #define dll rbr | |
114 | #define dlm ier | |
115 | ||
116 | typedef volatile struct NS16550 *NS16550_t; | |
117 | ||
118 | #define FCR_FIFO_EN 0x01 /* Fifo enable */ | |
119 | #define FCR_RXSR 0x02 /* Receiver soft reset */ | |
120 | #define FCR_TXSR 0x04 /* Transmitter soft reset */ | |
121 | ||
122 | #define MCR_DTR 0x01 | |
123 | #define MCR_RTS 0x02 | |
124 | #define MCR_DMA_EN 0x04 | |
125 | #define MCR_TX_DFR 0x08 | |
126 | ||
22814904 | 127 | #define LCR_WLS_MSK 0x03 /* character length select mask */ |
717b5aad WD |
128 | #define LCR_WLS_5 0x00 /* 5 bit character length */ |
129 | #define LCR_WLS_6 0x01 /* 6 bit character length */ | |
130 | #define LCR_WLS_7 0x02 /* 7 bit character length */ | |
131 | #define LCR_WLS_8 0x03 /* 8 bit character length */ | |
132 | #define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ | |
133 | #define LCR_PEN 0x08 /* Parity eneble */ | |
134 | #define LCR_EPS 0x10 /* Even Parity Select */ | |
135 | #define LCR_STKP 0x20 /* Stick Parity */ | |
136 | #define LCR_SBRK 0x40 /* Set Break */ | |
137 | #define LCR_BKSE 0x80 /* Bank select enable */ | |
138 | ||
139 | #define LSR_DR 0x01 /* Data ready */ | |
140 | #define LSR_OE 0x02 /* Overrun */ | |
141 | #define LSR_PE 0x04 /* Parity error */ | |
142 | #define LSR_FE 0x08 /* Framing error */ | |
143 | #define LSR_BI 0x10 /* Break */ | |
144 | #define LSR_THRE 0x20 /* Xmit holding register empty */ | |
145 | #define LSR_TEMT 0x40 /* Xmitter empty */ | |
146 | #define LSR_ERR 0x80 /* Error */ | |
147 | ||
2e5983d2 WD |
148 | #ifdef CONFIG_OMAP1510 |
149 | #define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */ | |
150 | #endif | |
151 | ||
717b5aad WD |
152 | /* useful defaults for LCR */ |
153 | #define LCR_8N1 0x03 | |
154 | ||
155 | void NS16550_init (NS16550_t com_port, int baud_divisor); | |
156 | void NS16550_putc (NS16550_t com_port, char c); | |
157 | char NS16550_getc (NS16550_t com_port); | |
158 | int NS16550_tstc (NS16550_t com_port); | |
159 | void NS16550_reinit (NS16550_t com_port, int baud_divisor); |