[u-boot.git] / include / configs / m53menlo.h

/* SPDX-License-Identifier: GPL-2.0+ */

/*
 * Menlosystems M53Menlo configuration
 * Copyright (C) 2012-2017 Marek Vasut <[email protected]>
 * Copyright (C) 2014-2017 Olaf Mandel <[email protected]>
 */

#ifndef __M53MENLO_CONFIG_H__
#define __M53MENLO_CONFIG_H__

#include <asm/arch/imx-regs.h>

/*
 * Memory configurations
 */
#define PHYS_SDRAM_1			CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
#define PHYS_SDRAM_2			CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
#define PHYS_SDRAM_SIZE			(gd->ram_size)

#define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/*
 * U-Boot general configurations
 */
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
						/* Boot argument buffer size */

/*
 * Serial Driver
 */
#define CONFIG_MXC_UART_BASE		UART1_BASE

/*
 * MMC Driver
 */
#ifdef CONFIG_CMD_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1
#endif

/*
 * NAND
 */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MXC_NAND_HWECC

/* Environment is in NAND */
#define CONFIG_ENV_RANGE		(0x00080000) /* 512 KiB */
#endif

/*
 * Ethernet on SOC (FEC)
 */
#ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE			FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR		0x0
#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE		RMII
#define CONFIG_ETHPRIME			"FEC0"
#endif

#define CONFIG_SYS_RTC_BUS_NUM		1 /* I2C2 */

/*
 * RTC
 */
#ifdef CONFIG_CMD_DATE
#define CONFIG_SYS_I2C_RTC_ADDR		0x68
#define CONFIG_SYS_M41T11_BASE_YEAR	2000
#endif

/*
 * USB
 */
#ifdef CONFIG_CMD_USB
#define CONFIG_MXC_USB_PORT		1
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#endif

/*
 * SATA
 */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_BASE_ADDR
#define CONFIG_LBA48
#endif

/*
 * LCD
 */
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(2 << 20)

/* LVDS display */
#define CONFIG_SYS_LDB_CLOCK			33260000
#define CONFIG_IMX_VIDEO_SKIP

/* IIM Fuses */
#define CONFIG_FSL_IIM

/* Watchdog */

/*
 * Boot Linux
 */
#define CONFIG_BOOTFILE		"boot/fitImage"

/*
 * NAND SPL
 */
#define CONFIG_SPL_TARGET		"u-boot-with-nand-spl.imx"
#define CONFIG_SPL_PAD_TO		0x8000
#define CONFIG_SPL_STACK		0x70004000

#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)

/*
 * Extra Environments
 */
#define CONFIG_HOSTNAME		"m53menlo"

#define CONFIG_EXTRA_ENV_SETTINGS					\
	"consdev=ttymxc0\0"						\
	"baudrate=115200\0"						\
	"bootscript=boot.scr\0"						\
	"mmcdev=0\0"							\
	"mmcpart=1\0"							\
	"rootpath=/srv/\0"						\
	"kernel_addr_r=0x72000000\0"					\
	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"				\
	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"			\
	"netdev=eth0\0"							\
	"splashsource=mmc_fs\0"						\
	"splashfile=boot/usplash.bmp.gz\0"				\
	"splashimage=0x88000000\0"					\
	"splashpos=m,m\0"						\
	"altbootcmd="							\
		"if test ${mmcpart} -eq 1 ; then "			\
			"setenv mmcpart 2 ; "				\
		"else "							\
			"setenv mmcpart 1 ; "				\
		"fi ; "							\
		"boot\0"						\
	"stdout=serial,vidconsole\0"					\
	"stderr=serial,vidconsole\0"					\
	"addcons="							\
		"setenv bootargs ${bootargs} "				\
		"console=${consdev},${baudrate}\0"			\
	"addip="							\
		"setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off\0"				\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addmisc="							\
		"setenv bootargs ${bootargs} ${miscargs}\0"		\
	"addargs=run addcons addmisc addmtd\0"				\
	"mmcload="							\
		"mmc rescan || reset ; load mmc ${mmcdev}:${mmcpart} "	\
		"${kernel_addr_r} ${bootfile} || reset\0"		\
	"miscargs=nohlt panic=1\0"					\
	"mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw "	\
		"rootwait\0"						\
	"mmc_mmc="							\
		"run mmcload mmcargs addargs || reset ; "		\
		"bootm ${kernel_addr_r} ; reset\0"			\
	"netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"	\
	"net_nfs="							\
		"run netload nfsargs addip addargs ; "			\
		"bootm ${kernel_addr_r}\0"				\
	"nfsargs="							\
		"setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0"	\
	"try_bootscript="						\
		"mmc rescan;"						\
		"if test -e mmc 0:1 ${bootscript} ; then "		\
		"if load mmc 0:1 ${kernel_addr_r} ${bootscript};"	\
		"then ; "						\
			"echo Running bootscript... ; "			\
			"source ${kernel_addr_r} ; "			\
		"fi ; "							\
		"fi\0"

#endif	/* __M53MENLO_CONFIG_H__ */
Commit	Line	Data
39cb4f3c MV	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2
	3	/*
	4	* Menlosystems M53Menlo configuration
	5	* Copyright (C) 2012-2017 Marek Vasut <[email protected]>
	6	* Copyright (C) 2014-2017 Olaf Mandel <[email protected]>
	7	*/
	8
	9	#ifndef __M53MENLO_CONFIG_H__
	10	#define __M53MENLO_CONFIG_H__
	11
	12	#include <asm/arch/imx-regs.h>
	13
39cb4f3c MV	14	/*
	15	* Memory configurations
	16	*/
	17	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
	18	#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
	19	#define PHYS_SDRAM_2 CSD1_BASE_ADDR
	20	#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
	21	#define PHYS_SDRAM_SIZE (gd->ram_size)
39cb4f3c MV	22
	23	#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
	24	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
	25	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
	26
	27	#define CONFIG_SYS_INIT_SP_OFFSET \
	28	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	29	#define CONFIG_SYS_INIT_SP_ADDR \
	30	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	31
	32	/*
	33	* U-Boot general configurations
	34	*/
	35	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
	36	#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
	37	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	38	/* Boot argument buffer size */
	39
	40	/*
	41	* Serial Driver
	42	*/
39cb4f3c MV	43	#define CONFIG_MXC_UART_BASE UART1_BASE
	44
	45	/*
	46	* MMC Driver
	47	*/
	48	#ifdef CONFIG_CMD_MMC
	49	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	50	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	51	#endif
	52
	53	/*
	54	* NAND
	55	*/
39cb4f3c MV	56	#ifdef CONFIG_CMD_NAND
	57	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	58	#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
	59	#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
	60	#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
	61	#define CONFIG_SYS_NAND_LARGEPAGE
	62	#define CONFIG_MXC_NAND_HWECC
39cb4f3c MV	63
39cb4f3c MV	64	/* Environment is in NAND */
a09fea1d	65	#define CONFIG_ENV_RANGE (0x00080000) /* 512 KiB */
39cb4f3c MV	66	#endif
	67
	68	/*
	69	* Ethernet on SOC (FEC)
	70	*/
	71	#ifdef CONFIG_CMD_NET
39cb4f3c MV	72	#define IMX_FEC_BASE FEC_BASE_ADDR
39cb4f3c MV	73	#define CONFIG_FEC_MXC_PHYADDR 0x0
39cb4f3c MV	74	#define CONFIG_DISCOVER_PHY
	75	#define CONFIG_FEC_XCV_TYPE RMII
	76	#define CONFIG_ETHPRIME "FEC0"
	77	#endif
	78
39cb4f3c	79	#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
39cb4f3c MV	80
	81	/*
	82	* RTC
	83	*/
	84	#ifdef CONFIG_CMD_DATE
39cb4f3c MV	85	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
	86	#define CONFIG_SYS_M41T11_BASE_YEAR 2000
	87	#endif
	88
	89	/*
	90	* USB
	91	*/
	92	#ifdef CONFIG_CMD_USB
39cb4f3c MV	93	#define CONFIG_MXC_USB_PORT 1
	94	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	95	#define CONFIG_MXC_USB_FLAGS 0
	96	#endif
	97
	98	/*
	99	* SATA
	100	*/
	101	#ifdef CONFIG_CMD_SATA
39cb4f3c MV	102	#define CONFIG_DWC_AHSATA_PORT_ID 0
	103	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
	104	#define CONFIG_LBA48
	105	#endif
	106
	107	/*
	108	* LCD
	109	*/
39cb4f3c	110	#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
39cb4f3c MV	111
	112	/* LVDS display */
	113	#define CONFIG_SYS_LDB_CLOCK 33260000
	114	#define CONFIG_IMX_VIDEO_SKIP
39cb4f3c MV	115
	116	/* IIM Fuses */
	117	#define CONFIG_FSL_IIM
	118
bf413781	119	/* Watchdog */
bf413781	120
39cb4f3c MV	121	/*
	122	* Boot Linux
	123	*/
39cb4f3c	124	#define CONFIG_BOOTFILE "boot/fitImage"
39cb4f3c MV	125
	126	/*
	127	* NAND SPL
	128	*/
	129	#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
39cb4f3c MV	130	#define CONFIG_SPL_PAD_TO 0x8000
	131	#define CONFIG_SPL_STACK 0x70004000
	132
39cb4f3c	133	#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
39cb4f3c MV	134
	135	/*
	136	* Extra Environments
	137	*/
39cb4f3c MV	138	#define CONFIG_HOSTNAME "m53menlo"
	139
	140	#define CONFIG_EXTRA_ENV_SETTINGS \
	141	"consdev=ttymxc0\0" \
	142	"baudrate=115200\0" \
	143	"bootscript=boot.scr\0" \
	144	"mmcdev=0\0" \
	145	"mmcpart=1\0" \
	146	"rootpath=/srv/\0" \
	147	"kernel_addr_r=0x72000000\0" \
	148	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
	149	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
	150	"netdev=eth0\0" \
	151	"splashsource=mmc_fs\0" \
de5def1c	152	"splashfile=boot/usplash.bmp.gz\0" \
39cb4f3c MV	153	"splashimage=0x88000000\0" \
39cb4f3c MV	154	"splashpos=m,m\0" \
abc6eee0 MV	155	"altbootcmd=" \
	156	"if test ${mmcpart} -eq 1 ; then " \
	157	"setenv mmcpart 2 ; " \
	158	"else " \
	159	"setenv mmcpart 1 ; " \
	160	"fi ; " \
	161	"boot\0" \
f0be8ff4 MV	162	"stdout=serial,vidconsole\0" \
f0be8ff4 MV	163	"stderr=serial,vidconsole\0" \
39cb4f3c MV	164	"addcons=" \
	165	"setenv bootargs ${bootargs} " \
	166	"console=${consdev},${baudrate}\0" \
	167	"addip=" \
	168	"setenv bootargs ${bootargs} " \
	169	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	170	":${hostname}:${netdev}:off\0" \
88b5002b	171	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
39cb4f3c MV	172	"addmisc=" \
	173	"setenv bootargs ${bootargs} ${miscargs}\0" \
	174	"addargs=run addcons addmisc addmtd\0" \
	175	"mmcload=" \
abc6eee0 MV	176	"mmc rescan \|\| reset ; load mmc ${mmcdev}:${mmcpart} " \
abc6eee0 MV	177	"${kernel_addr_r} ${bootfile} \|\| reset\0" \
39cb4f3c MV	178	"miscargs=nohlt panic=1\0" \
	179	"mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw " \
	180	"rootwait\0" \
	181	"mmc_mmc=" \
abc6eee0 MV	182	"run mmcload mmcargs addargs \|\| reset ; " \
abc6eee0 MV	183	"bootm ${kernel_addr_r} ; reset\0" \
39cb4f3c MV	184	"netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
	185	"net_nfs=" \
	186	"run netload nfsargs addip addargs ; " \
	187	"bootm ${kernel_addr_r}\0" \
	188	"nfsargs=" \
	189	"setenv bootargs root=/dev/nfs rw " \
	190	"nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0" \
	191	"try_bootscript=" \
	192	"mmc rescan;" \
	193	"if test -e mmc 0:1 ${bootscript} ; then " \
	194	"if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
	195	"then ; " \
	196	"echo Running bootscript... ; " \
	197	"source ${kernel_addr_r} ; " \
	198	"fi ; " \
	199	"fi\0"
	200
	201	#endif /* __M53MENLO_CONFIG_H__ */