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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
8bc4ee9e MK |
2 | /* |
3 | * (C) Copyright 2009 Samsung Electronics | |
4 | * Minkyu Kang <[email protected]> | |
5 | * HeungJun Kim <[email protected]> | |
6 | * Inki Dae <[email protected]> | |
7 | * | |
8 | * Configuation settings for the SAMSUNG SMDKC100 board. | |
8bc4ee9e MK |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
14 | /* | |
15 | * High Level Configuration Options | |
16 | * (easy to change) | |
17 | */ | |
8bc4ee9e | 18 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
889a275d | 19 | #define CONFIG_S5P 1 /* which is in a S5P Family */ |
8bc4ee9e | 20 | #define CONFIG_S5PC100 1 /* which is in a S5PC100 */ |
8bc4ee9e MK |
21 | |
22 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
23 | ||
8bc4ee9e MK |
24 | /* input clock of PLL: SMDKC100 has 12MHz input clock */ |
25 | #define CONFIG_SYS_CLK_FREQ 12000000 | |
26 | ||
27 | /* DRAM Base */ | |
28 | #define CONFIG_SYS_SDRAM_BASE 0x30000000 | |
29 | ||
08bcbc4a | 30 | /* Text Base */ |
08bcbc4a | 31 | |
8bc4ee9e MK |
32 | #define CONFIG_SETUP_MEMORY_TAGS |
33 | #define CONFIG_CMDLINE_TAG | |
34 | #define CONFIG_INITRD_TAG | |
8bc4ee9e MK |
35 | |
36 | /* | |
37 | * Size of malloc() pool | |
38 | * 1MB = 0x100000, 0x100000 = 1024 * 1024 | |
39 | */ | |
40 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) | |
2ecd7797 | 41 | |
8bc4ee9e MK |
42 | /* |
43 | * select serial console configuration | |
44 | */ | |
8bc4ee9e | 45 | |
dc795a88 MK |
46 | /* PWM */ |
47 | #define CONFIG_PWM 1 | |
48 | ||
8bc4ee9e MK |
49 | #define CONFIG_BOOTCOMMAND "run ubifsboot" |
50 | ||
51 | #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \ | |
52 | " console=ttySAC0,115200n8" \ | |
53 | " mem=128M" | |
54 | ||
55 | #define CONFIG_COMMON_BOOT "console=ttySAC0,115200n8" \ | |
56 | " mem=128M " \ | |
43ede0bc | 57 | " " CONFIG_MTDPARTS_DEFAULT |
8bc4ee9e | 58 | |
8bc4ee9e MK |
59 | #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x40000;" \ |
60 | " onenand write 0x32008000 0x0 0x40000\0" | |
61 | ||
8bc4ee9e MK |
62 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
63 | CONFIG_UPDATEB \ | |
64 | "updatek=" \ | |
65 | "onenand erase 0x60000 0x300000;" \ | |
66 | "onenand write 0x31008000 0x60000 0x300000\0" \ | |
67 | "updateu=" \ | |
68 | "onenand erase block 147-4095;" \ | |
69 | "onenand write 0x32000000 0x1260000 0x8C0000\0" \ | |
70 | "bootk=" \ | |
71 | "onenand read 0x30007FC0 0x60000 0x300000;" \ | |
72 | "bootm 0x30007FC0\0" \ | |
73 | "flashboot=" \ | |
74 | "set bootargs root=/dev/mtdblock${bootblock} " \ | |
75 | "rootfstype=${rootfstype} " \ | |
76 | "ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT ";" \ | |
77 | "run bootk\0" \ | |
78 | "ubifsboot=" \ | |
79 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
80 | " ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT "; " \ | |
81 | "run bootk\0" \ | |
82 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
83 | "android=" \ | |
84 | "set bootargs root=ubi0!ramdisk ubi.mtd=${ubiblock} " \ | |
85 | "rootfstype=ubifs init=/init.sh " CONFIG_COMMON_BOOT "; " \ | |
86 | "run bootk\0" \ | |
87 | "nfsboot=" \ | |
88 | "set bootargs root=/dev/nfs ubi.mtd=${ubiblock} " \ | |
89 | "nfsroot=${nfsroot},nolock " \ | |
90 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
91 | "${netmask}:nowplus:usb0:off " CONFIG_COMMON_BOOT "; " \ | |
92 | "run bootk\0" \ | |
93 | "ramboot=" \ | |
94 | "set bootargs " CONFIG_RAMDISK_BOOT \ | |
95 | " initrd=0x33000000,8M ramdisk=8192\0" \ | |
96 | "rootfstype=cramfs\0" \ | |
43ede0bc | 97 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
8bc4ee9e MK |
98 | "meminfo=mem=128M\0" \ |
99 | "nfsroot=/nfsroot/arm\0" \ | |
100 | "bootblock=5\0" \ | |
101 | "ubiblock=4\0" \ | |
102 | "ubi=enabled" | |
103 | ||
104 | /* | |
105 | * Miscellaneous configurable options | |
106 | */ | |
8bc4ee9e | 107 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ |
8bc4ee9e | 108 | /* memtest works on */ |
8bc4ee9e MK |
109 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE |
110 | ||
8bc4ee9e | 111 | /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ |
8bc4ee9e MK |
112 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ |
113 | #define PHYS_SDRAM_1_SIZE (128 << 20) /* 0x8000000, 128 MB Bank #1 */ | |
114 | ||
115 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
116 | ||
117 | /*----------------------------------------------------------------------- | |
118 | * FLASH and environment organization | |
119 | */ | |
8bc4ee9e MK |
120 | |
121 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ | |
8bc4ee9e | 122 | |
14d0a02a | 123 | #if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) |
8bc4ee9e MK |
124 | #define CONFIG_ENABLE_MMU |
125 | #endif | |
126 | ||
127 | #ifdef CONFIG_ENABLE_MMU | |
128 | #define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 | |
129 | #else | |
130 | #define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE | |
131 | #endif | |
132 | ||
133 | /*----------------------------------------------------------------------- | |
134 | * Boot configuration | |
135 | */ | |
8bc4ee9e MK |
136 | |
137 | #define CONFIG_USE_ONENAND_BOARD_INIT | |
138 | #define CONFIG_SAMSUNG_ONENAND 1 | |
139 | #define CONFIG_SYS_ONENAND_BASE 0xE7100000 | |
140 | ||
98877c3c MK |
141 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) |
142 | ||
2528dc52 NKC |
143 | /* |
144 | * Ethernet Contoller driver | |
145 | */ | |
146 | #ifdef CONFIG_CMD_NET | |
2528dc52 NKC |
147 | #define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ |
148 | #endif /* CONFIG_CMD_NET */ | |
149 | ||
8bc4ee9e | 150 | #endif /* __CONFIG_H */ |