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c3f9d493 WD |
1 | IBM Ocotea Board |
2 | ||
3 | Last Update: March 2, 2004 | |
4 | ======================================================================= | |
5 | ||
6 | This file contains some handy info regarding U-Boot and the IBM | |
7 | Ocotea 440gx evalutation board. See the README.ppc440 for additional | |
8 | information. | |
9 | ||
10 | ||
11 | SWITCH SETTINGS & JUMPERS | |
12 | ========================== | |
13 | ||
14 | Here's what I've been using successfully. If you feel inclined to | |
15 | change things ... please read the docs! | |
16 | ||
17 | DIPSW U46 U80 | |
18 | ------------------------ | |
19 | SW 1 off off | |
20 | SW 2 on off | |
21 | SW 3 off off | |
22 | SW 4 off off | |
23 | SW 5 off off | |
24 | SW 6 on on | |
25 | SW 7 on off | |
26 | SW 8 on off | |
27 | ||
28 | J41: strapped | |
29 | J42: open | |
30 | ||
31 | All others are factory default. | |
32 | ||
33 | ||
34 | I2C Information | |
35 | ===================== | |
36 | ||
37 | See README.ebony for information. | |
38 | ||
39 | PCI | |
40 | =========================== | |
41 | ||
42 | Untested at the time of writing. | |
43 | ||
44 | PPC440GX Ethernet EMACs | |
45 | =========================== | |
46 | ||
47 | All EMAC ports have been tested and are known to work | |
48 | with EPS Group 4. | |
49 | ||
50 | Special note about the Cicada CIS8201: | |
51 | The CIS8201 Gigabit PHY comes up in GMII mode by default. | |
52 | One must hit an extended register to allow use of RGMII mode. | |
53 | This has been done in the 440gx_enet.c file with a #ifdef/endif | |
54 | pair. | |
55 | ||
56 | IBM does not store the EMAC ethernet addresses within their PIBS bootloader. | |
57 | The addresses contained in the config header file are from my particular | |
58 | board and you _*should*_ change them to reflect your board either in the | |
59 | config file and/or in your environment variables. I found the addresses on | |
60 | labels on the bottom side of the board. | |
61 | ||
62 | ||
63 | BDI2k or JTAG Debugging | |
64 | =========================== | |
65 | ||
66 | For ease of debugging you can swap the small boot flash and external SRAM | |
67 | by changing U46:3 to on. You can then use the sram as your boot flash by | |
68 | loading the sram via the jtag debugger. | |
69 | ||
70 | ||
71 | Regards, | |
72 | --Travis | |
73 | <[email protected]> |