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rockchip: add basic support for fennec-rk3288 board
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1#
2# Copyright (C) 2015 Google. Inc
3# Written by Simon Glass <[email protected]>
4#
5# SPDX-License-Identifier: GPL-2.0+
6#
7
8U-Boot on Rockchip
9==================
10
11There are several repositories available with versions of U-Boot that support
12many Rockchip devices [1] [2].
13
14The current mainline support is experimental only and is not useful for
15anything. It should provide a base on which to build.
16
f1387130 17So far only support for the RK3288 and RK3036 is provided.
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18
19
20Prerequisites
21=============
22
23You will need:
24
f1387130 25 - Firefly RK3288 board or something else with a supported RockChip SoC
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26 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
29 - rkflashtool [3]
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
34
35
36Building
37========
38
d7ca67b7 39At present five RK3288 boards are supported:
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40
41 - Firefly RK3288 - use firefly-rk3288 configuration
7c1058fa 42 - Radxa Rock 2 - use rock2 configuration
f1387130 43 - Hisense Chromebook - use chromebook_jerry configuration
744368d6 44 - EVB RK3288 - use evb-rk3288 configuration
d7ca67b7 45 - Fennec RK3288 - use fennec-rk3288 configuration
adfb2bfe 46
f1387130 47Two RK3036 board are supported:
1d5a6968 48
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49 - EVB RK3036 - use evb-rk3036 configuration
50 - Kylin - use kylin_rk3036 configuration
1d5a6968 51
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52For example:
53
54 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
55
56(or you can use another cross compiler if you prefer)
57
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58
59Writing to the board with USB
60=============================
61
62For USB to work you must get your board into ROM boot mode, either by erasing
63your MMC or (perhaps) holding the recovery button when you boot the board.
64To erase your MMC, you can boot into Linux and type (as root)
65
66 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
67
68Connect your board's OTG port to your computer.
69
70To create a suitable image and write it to the board:
71
717f8845 72 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
f2acc55e 73 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
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74 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
75
76If all goes well you should something like:
77
78 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
79 Card did not respond to voltage select!
80 spl: mmc init failed with error: -17
81 ### ERROR ### Please RESET the board ###
82
83You will need to reset the board before each time you try. Yes, that's all
84it does so far. If support for the Rockchip USB protocol or DFU were added
85in SPL then we could in principle load U-Boot and boot to a prompt from USB
86as several other platforms do. However it does not seem to be possible to
87use the existing boot ROM code from SPL.
88
89
90Booting from an SD card
91=======================
92
93To write an image that boots from an SD card (assumed to be /dev/sdc):
94
717f8845 95 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
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96 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
97 sudo dd if=out of=/dev/sdc seek=64 && \
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98 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
99
100This puts the Rockchip header and SPL image first and then places the U-Boot
101image at block 256 (i.e. 128KB from the start of the SD card). This
102corresponds with this setting in U-Boot:
103
104 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
105
106Put this SD (or micro-SD) card into your board and reset it. You should see
107something like:
108
f1387130 109 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
adfb2bfe 110
f1387130 111 Model: Radxa Rock 2 Square
adfb2bfe 112 DRAM: 2 GiB
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113 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
114 *** Warning - bad CRC, using default environment
115
116 In: serial
117 Out: [email protected]
118 Err: serial
119 Net: Net Initialization Skipped
120 No ethernet found.
121 Hit any key to stop autoboot: 0
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122 =>
123
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124The rockchip bootrom can load and boot an initial spl, then continue to
125load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
126Therefore RK3288 has another loading sequence like RK3036. The option of
127U-Boot is controlled with this setting in U-Boot:
128
129 #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
130
131You can create the image via the following operations:
132
133 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
134 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
135 cat firefly-rk3288/u-boot-dtb.bin >> out && \
136 sudo dd if=out of=/dev/sdc seek=64
137
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138If you have an HDMI cable attached you should see a video console.
139
1d5a6968 140For evb_rk3036 board:
717f8845 141 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
1d5a6968 142 cat evb-rk3036/u-boot-dtb.bin >> out && \
143 sudo dd if=out of=/dev/sdc seek=64
144
145Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
146 debug uart must be disabled
adfb2bfe 147
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148Using fastboot on rk3288
149========================
150- Define GPT partition layout like kylin_rk3036(see include/configs/kylin_rk3036.h)
151- Write GPT partition layout to mmc device which fastboot want to use it to
152store the image
153
154 => gpt write mmc 1 $partitions
155
156- Invoke fastboot command to prepare
157
158 => fastboot 1
159
160- Start fastboot request on PC
161
162 fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
163
164You should see something like:
165
166 => fastboot 1
167 WARNING: unknown variable: partition-type:loader
168 Starting download of 357796 bytes
169 ..
170 downloading of 357796 bytes finished
171 Flashing Raw Image
172 ........ wrote 357888 bytes to 'loader'
173
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174Booting from SPI
175================
176
177To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
178
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179 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
180 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
181 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
182 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
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183 dd if=out.bin of=out.bin.pad bs=4M conv=sync
184
185This converts the SPL image to the required SPI format by adding the Rockchip
186header and skipping every 2KB block. Then the U-Boot image is written at
187offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
188The position of U-Boot is controlled with this setting in U-Boot:
189
190 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
191
192If you have a Dediprog em100pro connected then you can write the image with:
193
194 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
195
196When booting you should see something like:
197
198 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
199
200
201 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
202
203 Model: Google Jerry
204 DRAM: 2 GiB
205 MMC:
206 Using default environment
207
208 In: serial@ff690000
209 Out: serial@ff690000
210 Err: serial@ff690000
211 =>
212
213
214Future work
215===========
216
217Immediate priorities are:
218
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219- USB host
220- USB device
f1387130 221- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
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222- Ethernet
223- NAND flash
224- Support for other Rockchip parts
225- Boot U-Boot proper over USB OTG (at present only SPL works)
226
227
228Development Notes
229=================
230
231There are plenty of patches in the links below to help with this work.
232
233[1] https://github.com/rkchrome/uboot.git
234[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
235[3] https://github.com/linux-rockchip/rkflashtool.git
236[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
237
238rkimage
239-------
240
241rkimage.c produces an SPL image suitable for sending directly to the boot ROM
242over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
243followed by u-boot-spl-dtb.bin.
244
245The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
246starts at 0xff700000 and extends to 0xff718000 where we put the stack.
247
248rksd
249----
250
251rksd.c produces an image consisting of 32KB of empty space, a header and
252u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
253most of the fields are unused by U-Boot. We just need to specify the
254signature, a flag and the block offset and size of the SPL image.
255
256The header occupies a single block but we pad it out to 4 blocks. The header
257is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
258image can be encoded too but we don't do that.
259
260The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
261or 0x40 blocks. This is a severe and annoying limitation. There may be a way
262around this limitation, since there is plenty of SRAM, but at present the
263board refuses to boot if this limit is exceeded.
264
265The image produced is padded up to a block boundary (512 bytes). It should be
266written to the start of an SD card using dd.
267
268Since this image is set to load U-Boot from the SD card at block offset,
269CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
270u-boot-dtb.img to the SD card at that offset. See above for instructions.
271
272rkspi
273-----
274
275rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
276resulting image is then spread out so that only the first 2KB of each 4KB
277sector is used. The header is the same as with rksd and the maximum size is
278also 32KB (before spreading). The image should be written to the start of
279SPI flash.
280
281See above for instructions on how to write a SPI image.
282
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283rkmux.py
284--------
285
286You can use this script to create #defines for SoC register access. See the
287script for usage.
288
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289
290Device tree and driver model
291----------------------------
292
293Where possible driver model is used to provide a structure to the
294functionality. Device tree is used for configuration. However these have an
295overhead and in SPL with a 32KB size limit some shortcuts have been taken.
296In general all Rockchip drivers should use these features, with SPL-specific
297modifications where required.
298
299
300--
301Simon Glass <[email protected]>
30224 June 2015
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