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Commit | Line | Data |
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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
3863585b WD |
2 | /* |
3 | * (C) Copyright 2000 | |
4 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
3863585b WD |
5 | */ |
6 | ||
7 | /* | |
8 | * Cache support: switch on or off, get status | |
9 | */ | |
d678a59d | 10 | #include <common.h> |
3863585b | 11 | #include <command.h> |
9edefc27 | 12 | #include <cpu_func.h> |
d0c4c338 | 13 | #include <linux/compiler.h> |
3863585b | 14 | |
d0c4c338 MM |
15 | static int parse_argv(const char *); |
16 | ||
23498935 | 17 | void __weak invalidate_icache_all(void) |
d0c4c338 | 18 | { |
23498935 SK |
19 | /* please define arch specific invalidate_icache_all */ |
20 | puts("No arch specific invalidate_icache_all available!\n"); | |
d0c4c338 | 21 | } |
3863585b | 22 | |
c2a2123e PC |
23 | __weak void noncached_set_region(void) |
24 | { | |
25 | } | |
26 | ||
09140113 SG |
27 | static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc, |
28 | char *const argv[]) | |
3863585b WD |
29 | { |
30 | switch (argc) { | |
f043dc28 | 31 | case 2: /* on / off / flush */ |
d0c4c338 | 32 | switch (parse_argv(argv[1])) { |
e9455fcc JH |
33 | case 0: |
34 | icache_disable(); | |
3863585b | 35 | break; |
e9455fcc JH |
36 | case 1: |
37 | icache_enable(); | |
3863585b | 38 | break; |
e9455fcc JH |
39 | case 2: |
40 | invalidate_icache_all(); | |
d0c4c338 | 41 | break; |
f043dc28 EP |
42 | default: |
43 | return CMD_RET_USAGE; | |
3863585b | 44 | } |
36180d96 | 45 | break; |
3863585b | 46 | case 1: /* get status */ |
e9455fcc | 47 | printf("Instruction Cache is %s\n", |
3863585b WD |
48 | icache_status() ? "ON" : "OFF"); |
49 | return 0; | |
50 | default: | |
4c12eeb8 | 51 | return CMD_RET_USAGE; |
3863585b WD |
52 | } |
53 | return 0; | |
54 | } | |
55 | ||
23498935 | 56 | void __weak flush_dcache_all(void) |
d0c4c338 | 57 | { |
23498935 SK |
58 | puts("No arch specific flush_dcache_all available!\n"); |
59 | /* please define arch specific flush_dcache_all */ | |
d0c4c338 MM |
60 | } |
61 | ||
09140113 SG |
62 | static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc, |
63 | char *const argv[]) | |
3863585b WD |
64 | { |
65 | switch (argc) { | |
f043dc28 | 66 | case 2: /* on / off / flush */ |
d0c4c338 | 67 | switch (parse_argv(argv[1])) { |
e9455fcc JH |
68 | case 0: |
69 | dcache_disable(); | |
3863585b | 70 | break; |
e9455fcc JH |
71 | case 1: |
72 | dcache_enable(); | |
c2a2123e | 73 | noncached_set_region(); |
3863585b | 74 | break; |
e9455fcc JH |
75 | case 2: |
76 | flush_dcache_all(); | |
d0c4c338 | 77 | break; |
f043dc28 EP |
78 | default: |
79 | return CMD_RET_USAGE; | |
3863585b | 80 | } |
e9455fcc | 81 | break; |
3863585b | 82 | case 1: /* get status */ |
e9455fcc | 83 | printf("Data (writethrough) Cache is %s\n", |
3863585b WD |
84 | dcache_status() ? "ON" : "OFF"); |
85 | return 0; | |
86 | default: | |
4c12eeb8 | 87 | return CMD_RET_USAGE; |
3863585b WD |
88 | } |
89 | return 0; | |
3863585b WD |
90 | } |
91 | ||
d0c4c338 | 92 | static int parse_argv(const char *s) |
3863585b | 93 | { |
e9455fcc JH |
94 | if (strcmp(s, "flush") == 0) |
95 | return 2; | |
96 | else if (strcmp(s, "on") == 0) | |
97 | return 1; | |
98 | else if (strcmp(s, "off") == 0) | |
99 | return 0; | |
100 | ||
101 | return -1; | |
3863585b WD |
102 | } |
103 | ||
8bde7f77 | 104 | |
0d498393 WD |
105 | U_BOOT_CMD( |
106 | icache, 2, 1, do_icache, | |
2fb2604d | 107 | "enable or disable instruction cache", |
d0c4c338 MM |
108 | "[on, off, flush]\n" |
109 | " - enable, disable, or flush instruction cache" | |
8bde7f77 WD |
110 | ); |
111 | ||
0d498393 WD |
112 | U_BOOT_CMD( |
113 | dcache, 2, 1, do_dcache, | |
2fb2604d | 114 | "enable or disable data cache", |
d0c4c338 MM |
115 | "[on, off, flush]\n" |
116 | " - enable, disable, or flush data (writethrough) cache" | |
8bde7f77 | 117 | ); |