projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 0176d43e SP |
2 | /* |
| 3 | * (C) Copyright 2007-2008 | |
| c9e798d3 | 4 | * Stelian Pop <[email protected]> |
| 0176d43e | 5 | * Lead Tech Design <www.leadtechdesign.com> |
| 0176d43e SP |
6 | */ |
| 7 | ||
| d678a59d | 8 | #include <common.h> |
| 2510be1d | 9 | #include <debug_uart.h> |
| 9b4a205f | 10 | #include <init.h> |
| 5e6267af | 11 | #include <net.h> |
| 401d1c4f | 12 | #include <asm/global_data.h> |
| 8c6407fc | 13 | #include <asm/io.h> |
| 0176d43e | 14 | #include <asm/arch/at91sam9260_matrix.h> |
| 9606b3c8 | 15 | #include <asm/arch/at91sam9_smc.h> |
| 1332a2a0 | 16 | #include <asm/arch/at91_common.h> |
| 70341e2e | 17 | #include <asm/arch/clk.h> |
| 0176d43e | 18 | #include <asm/arch/gpio.h> |
| 0176d43e SP |
19 | |
| 20 | DECLARE_GLOBAL_DATA_PTR; | |
| 21 | ||
| 22 | /* ------------------------------------------------------------------------- */ | |
| 23 | /* | |
| 24 | * Miscelaneous platform dependent initialisations | |
| 25 | */ | |
| 26 | ||
| 0176d43e SP |
27 | #ifdef CONFIG_CMD_NAND |
| 28 | static void at91sam9260ek_nand_hw_init(void) | |
| 29 | { | |
| 8c6407fc RM |
30 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
| 31 | struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; | |
| 0176d43e SP |
32 | unsigned long csa; |
| 33 | ||
| 8c6407fc RM |
34 | /* Assign CS3 to NAND/SmartMedia Interface */ |
| 35 | csa = readl(&matrix->ebicsa); | |
| 36 | csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; | |
| 37 | writel(csa, &matrix->ebicsa); | |
| 0176d43e SP |
38 | |
| 39 | /* Configure SMC CS3 for NAND/SmartMedia */ | |
| 8c6407fc RM |
40 | writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
| 41 | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), | |
| 42 | &smc->cs[3].setup); | |
| 43 | writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | | |
| 44 | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), | |
| 45 | &smc->cs[3].pulse); | |
| 46 | writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), | |
| 47 | &smc->cs[3].cycle); | |
| 48 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | | |
| 49 | AT91_SMC_MODE_EXNW_DISABLE | | |
| 6d0f6bcf | 50 | #ifdef CONFIG_SYS_NAND_DBW_16 |
| 8c6407fc | 51 | AT91_SMC_MODE_DBW_16 | |
| 6d0f6bcf | 52 | #else /* CONFIG_SYS_NAND_DBW_8 */ |
| 8c6407fc | 53 | AT91_SMC_MODE_DBW_8 | |
| c1212b2f | 54 | #endif |
| 8c6407fc RM |
55 | AT91_SMC_MODE_TDF_CYCLE(2), |
| 56 | &smc->cs[3].mode); | |
| 0176d43e SP |
57 | |
| 58 | /* Configure RDY/BSY */ | |
| 4e590945 | 59 | at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1); |
| 0176d43e SP |
60 | |
| 61 | /* Enable NandFlash */ | |
| 4e590945 | 62 | at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1); |
| 8c6407fc | 63 | |
| 0176d43e SP |
64 | } |
| 65 | #endif | |
| 66 | ||
| 2510be1d WY |
67 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
| 68 | void board_debug_uart_init(void) | |
| 69 | { | |
| 70 | at91_seriald_hw_init(); | |
| 71 | } | |
| 72 | #endif | |
| 73 | ||
| 74 | #ifdef CONFIG_BOARD_EARLY_INIT_F | |
| 8c6407fc | 75 | int board_early_init_f(void) |
| 0176d43e | 76 | { |
| 8c6407fc RM |
77 | return 0; |
| 78 | } | |
| 2510be1d | 79 | #endif |
| 8c6407fc RM |
80 | |
| 81 | int board_init(void) | |
| 82 | { | |
| 0176d43e | 83 | /* adress of boot parameters */ |
| aa6e94de | 84 | gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; |
| 0176d43e | 85 | |
| 0176d43e SP |
86 | #ifdef CONFIG_CMD_NAND |
| 87 | at91sam9260ek_nand_hw_init(); | |
| 88 | #endif | |
| 0176d43e SP |
89 | return 0; |
| 90 | } | |
| 91 | ||
| 92 | int dram_init(void) | |
| 93 | { | |
| 8c6407fc | 94 | gd->ram_size = get_ram_size( |
| aa6e94de TR |
95 | (void *)CFG_SYS_SDRAM_BASE, |
| 96 | CFG_SYS_SDRAM_SIZE); | |
| 0176d43e SP |
97 | return 0; |
| 98 | } | |
| 99 | ||
| 100 | #ifdef CONFIG_RESET_PHY_R | |
| 101 | void reset_phy(void) | |
| 102 | { | |
| 0176d43e SP |
103 | } |
| 104 | #endif |