Commit | Line | Data |
---|---|---|
e70408c0 SG |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_ROCKCHIP=y | |
3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | |
e70408c0 | 4 | CONFIG_ROCKCHIP_RK3288=y |
8728c97e | 5 | # CONFIG_SPL_MMC_SUPPORT is not set |
e70408c0 SG |
6 | CONFIG_TARGET_CHROMEBIT_MICKEY=y |
7 | CONFIG_SPL_SPI_FLASH_SUPPORT=y | |
8 | CONFIG_SPL_SPI_SUPPORT=y | |
9 | CONFIG_SPL_STACK_R_ADDR=0x80000 | |
e70408c0 | 10 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" |
fb82fe38 | 11 | CONFIG_DEBUG_UART=y |
2be29653 | 12 | CONFIG_ENV_IS_NOWHERE=y |
e70408c0 SG |
13 | # CONFIG_DISPLAY_CPUINFO is not set |
14 | CONFIG_SPL_STACK_R=y | |
15 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 | |
e70408c0 | 16 | # CONFIG_CMD_IMLS is not set |
88663126 | 17 | CONFIG_CMD_GPIO=y |
b331cd62 | 18 | CONFIG_CMD_GPT=y |
88663126 | 19 | CONFIG_CMD_I2C=y |
e70408c0 SG |
20 | CONFIG_CMD_MMC=y |
21 | CONFIG_CMD_SF=y | |
719d36ee | 22 | CONFIG_CMD_SF_TEST=y |
88663126 | 23 | CONFIG_CMD_SPI=y |
e70408c0 | 24 | # CONFIG_CMD_SETEXPR is not set |
e70408c0 SG |
25 | CONFIG_CMD_CACHE=y |
26 | CONFIG_CMD_TIME=y | |
27 | CONFIG_CMD_PMIC=y | |
28 | CONFIG_CMD_REGULATOR=y | |
b0cf7339 | 29 | # CONFIG_SPL_DOS_PARTITION is not set |
1acc0087 | 30 | # CONFIG_SPL_ISO_PARTITION is not set |
bd42a942 | 31 | # CONFIG_SPL_EFI_PARTITION is not set |
b331cd62 | 32 | CONFIG_SPL_PARTITION_UUIDS=y |
e70408c0 SG |
33 | CONFIG_SPL_OF_CONTROL=y |
34 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | |
18780951 | 35 | CONFIG_SPL_OF_PLATDATA=y |
e70408c0 SG |
36 | CONFIG_REGMAP=y |
37 | CONFIG_SPL_REGMAP=y | |
38 | CONFIG_SYSCON=y | |
39 | CONFIG_SPL_SYSCON=y | |
40 | # CONFIG_SPL_SIMPLE_BUS is not set | |
41 | CONFIG_CLK=y | |
42 | CONFIG_SPL_CLK=y | |
43 | CONFIG_ROCKCHIP_GPIO=y | |
44 | CONFIG_I2C_CROS_EC_TUNNEL=y | |
45 | CONFIG_SYS_I2C_ROCKCHIP=y | |
46 | CONFIG_I2C_MUX=y | |
18780951 | 47 | CONFIG_DM_KEYBOARD=y |
e70408c0 | 48 | CONFIG_CROS_EC_KEYB=y |
e70408c0 SG |
49 | CONFIG_CROS_EC=y |
50 | CONFIG_CROS_EC_SPI=y | |
51 | CONFIG_PWRSEQ=y | |
55ed3b46 | 52 | CONFIG_MMC_DW=y |
fed44087 | 53 | CONFIG_MMC_DW_ROCKCHIP=y |
e70408c0 SG |
54 | CONFIG_PINCTRL=y |
55 | CONFIG_SPL_PINCTRL=y | |
56 | # CONFIG_SPL_PINCTRL_FULL is not set | |
51c7f348 | 57 | CONFIG_PINCTRL_ROCKCHIP_RK3288=y |
e70408c0 SG |
58 | CONFIG_DM_PMIC=y |
59 | # CONFIG_SPL_PMIC_CHILDREN is not set | |
453c5a92 | 60 | CONFIG_PMIC_RK8XX=y |
e70408c0 SG |
61 | CONFIG_SPL_DM_REGULATOR=y |
62 | CONFIG_DM_REGULATOR_FIXED=y | |
453c5a92 | 63 | CONFIG_REGULATOR_RK8XX=y |
e70408c0 SG |
64 | CONFIG_PWM_ROCKCHIP=y |
65 | CONFIG_RAM=y | |
66 | CONFIG_SPL_RAM=y | |
e70408c0 SG |
67 | CONFIG_DEBUG_UART_BASE=0xff690000 |
68 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
69 | CONFIG_DEBUG_UART_SHIFT=2 | |
70 | CONFIG_SYS_NS16550=y | |
71 | CONFIG_ROCKCHIP_SERIAL=y | |
72 | CONFIG_ROCKCHIP_SPI=y | |
73 | CONFIG_SYSRESET=y | |
74 | CONFIG_DM_VIDEO=y | |
75 | CONFIG_DISPLAY=y | |
76 | CONFIG_VIDEO_ROCKCHIP=y | |
b98f0a3d | 77 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y |
e70408c0 SG |
78 | CONFIG_USE_TINY_PRINTF=y |
79 | CONFIG_CMD_DHRYSTONE=y | |
80 | CONFIG_ERRNO_STR=y | |
e70408c0 | 81 | # CONFIG_SPL_OF_LIBFDT is not set |