projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 50e2d41f RB |
1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_LS1046AQDS=y | |
| df33f864 | 3 | CONFIG_TFABOOT=y |
| 50e2d41f | 4 | CONFIG_SYS_TEXT_BASE=0x82000000 |
| 554e5514 | 5 | CONFIG_NR_DRAM_BANKS=2 |
| a09fea1d | 6 | CONFIG_ENV_SIZE=0x2000 |
| 556fd590 TR |
7 | CONFIG_NXP_ESBC=y |
| 8 | CONFIG_DM_GPIO=y | |
| 1bac199e TR |
9 | CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y |
| 10 | CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y | |
| f7d0ae9c | 11 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" |
| 1bac199e | 12 | CONFIG_AHCI=y |
| 50e2d41f | 13 | CONFIG_DISTRO_DEFAULTS=y |
| 50e2d41f RB |
14 | CONFIG_FIT_VERBOSE=y |
| 15 | CONFIG_OF_BOARD_SETUP=y | |
| 50e2d41f RB |
16 | CONFIG_BOOTDELAY=10 |
| 17 | CONFIG_USE_BOOTARGS=y | |
| 18 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" | |
| 19 | # CONFIG_USE_BOOTCOMMAND is not set | |
| 20 | CONFIG_MISC_INIT_R=y | |
| 21 | CONFIG_CMD_BOOTZ=y | |
| 22 | CONFIG_CMD_IMLS=y | |
| 23 | CONFIG_CMD_GREPENV=y | |
| 24 | CONFIG_CMD_MEMINFO=y | |
| 25 | CONFIG_CMD_MEMTEST=y | |
| 702de89c ARS |
26 | CONFIG_SYS_MEMTEST_START=0x80000000 |
| 27 | CONFIG_SYS_MEMTEST_END=0x9fffffff | |
| 50e2d41f RB |
28 | CONFIG_CMD_GPT=y |
| 29 | CONFIG_CMD_I2C=y | |
| 30 | CONFIG_CMD_MMC=y | |
| 31 | CONFIG_CMD_NAND=y | |
| 32 | CONFIG_CMD_PCI=y | |
| 50e2d41f RB |
33 | CONFIG_CMD_USB=y |
| 34 | CONFIG_CMD_CACHE=y | |
| 35 | CONFIG_MP=y | |
| 36 | CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" | |
| 37 | CONFIG_OF_CONTROL=y | |
| 7679afbf | 38 | CONFIG_ENV_OVERWRITE=y |
| 50e2d41f | 39 | CONFIG_DM=y |
| 1bac199e | 40 | CONFIG_SATA_CEVA=y |
| 556fd590 | 41 | CONFIG_DM_I2C=y |
| 50e2d41f RB |
42 | CONFIG_DM_MMC=y |
| 43 | CONFIG_FSL_ESDHC=y | |
| 0cfccb54 | 44 | CONFIG_MTD=y |
| 50e2d41f RB |
45 | CONFIG_MTD_NOR_FLASH=y |
| 46 | CONFIG_FLASH_CFI_DRIVER=y | |
| 47 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| 48 | CONFIG_SYS_FLASH_CFI=y | |
| 0cfccb54 | 49 | CONFIG_MTD_RAW_NAND=y |
| 14453fbf | 50 | CONFIG_SF_DEFAULT_BUS=1 |
| 160e3b38 | 51 | CONFIG_SPI_FLASH_SPANSION=y |
| 50e2d41f | 52 | CONFIG_PHYLIB=y |
| 306881a0 TR |
53 | CONFIG_PHYLIB_10G=y |
| 54 | CONFIG_PHY_REALTEK=y | |
| 55 | CONFIG_PHY_VITESSE=y | |
| 50e2d41f | 56 | CONFIG_E1000=y |
| cc1e98b5 | 57 | CONFIG_FMAN_ENET=y |
| cdeb7b8f | 58 | CONFIG_NVME=y |
| 50e2d41f RB |
59 | CONFIG_PCI=y |
| 60 | CONFIG_DM_PCI=y | |
| 61 | CONFIG_DM_PCI_COMPAT=y | |
| ed188aa8 HZ |
62 | CONFIG_PCIE_LAYERSCAPE_RC=y |
| 63 | CONFIG_PCIE_LAYERSCAPE_EP=y | |
| 1bac199e | 64 | CONFIG_DM_SCSI=y |
| 50e2d41f RB |
65 | CONFIG_SYS_NS16550=y |
| 66 | CONFIG_SPI=y | |
| 67 | CONFIG_DM_SPI=y | |
| 68 | CONFIG_FSL_DSPI=y | |
| 69 | CONFIG_USB=y | |
| 70 | CONFIG_DM_USB=y | |
| 71 | CONFIG_USB_XHCI_HCD=y | |
| 72 | CONFIG_USB_XHCI_DWC3=y | |
| 50e2d41f | 73 | CONFIG_RSA=y |
| 1eb41fca | 74 | CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |