[u-boot.git] / drivers / phy / sti_usb_phy.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
 * Author(s): Patrice Chotard, <[email protected]> for STMicroelectronics.
 */

#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <bitfield.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
#include <generic-phy.h>
#include <linux/libfdt.h>
#include <regmap.h>
#include <reset-uclass.h>
#include <syscon.h>
#include <wait_bit.h>

#include <linux/bitops.h>
#include <linux/compat.h>

DECLARE_GLOBAL_DATA_PTR;

/* Default PHY_SEL and REFCLKSEL configuration */
#define STIH407_USB_PICOPHY_CTRL_PORT_CONF	0x6

/* ports parameters overriding */
#define STIH407_USB_PICOPHY_PARAM_DEF		0x39a4dc

#define PHYPARAM_REG	1
#define PHYCTRL_REG	2
#define PHYPARAM_NB	3

struct sti_usb_phy {
	struct regmap *regmap;
	struct reset_ctl global_ctl;
	struct reset_ctl port_ctl;
	int param;
	int ctrl;
};

static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
{
	int ret;

	ret = reset_deassert(&phy->global_ctl);
	if (ret < 0) {
		pr_err("PHY global deassert failed: %d", ret);
		return ret;
	}

	ret = reset_deassert(&phy->port_ctl);
	if (ret < 0)
		pr_err("PHY port deassert failed: %d", ret);

	return ret;
}

static int sti_usb_phy_init(struct phy *usb_phy)
{
	struct udevice *dev = usb_phy->dev;
	struct sti_usb_phy *phy = dev_get_priv(dev);
	void __iomem *reg;

	/* set ctrl picophy value */
	reg = (void __iomem *)phy->regmap->ranges[0].start + phy->ctrl;
	/* CTRL_PORT mask is 0x1f */
	clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);

	/* set ports parameters overriding */
	reg = (void __iomem *)phy->regmap->ranges[0].start + phy->param;
	/* PARAM_DEF mask is 0xffffffff */
	clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF);

	return sti_usb_phy_deassert(phy);
}

static int sti_usb_phy_exit(struct phy *usb_phy)
{
	struct udevice *dev = usb_phy->dev;
	struct sti_usb_phy *phy = dev_get_priv(dev);
	int ret;

	ret = reset_assert(&phy->port_ctl);
	if (ret < 0) {
		pr_err("PHY port assert failed: %d", ret);
		return ret;
	}

	ret = reset_assert(&phy->global_ctl);
	if (ret < 0)
		pr_err("PHY global assert failed: %d", ret);

	return ret;
}

struct phy_ops sti_usb_phy_ops = {
	.init = sti_usb_phy_init,
	.exit = sti_usb_phy_exit,
};

int sti_usb_phy_probe(struct udevice *dev)
{
	struct sti_usb_phy *priv = dev_get_priv(dev);
	struct udevice *syscon;
	struct ofnode_phandle_args syscfg_phandle;
	u32 cells[PHYPARAM_NB];
	int ret, count;

	/* get corresponding syscon phandle */
	ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
					 &syscfg_phandle);

	if (ret < 0) {
		pr_err("Can't get syscfg phandle: %d\n", ret);
		return ret;
	}

	ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node,
					  &syscon);
	if (ret) {
		pr_err("unable to find syscon device (%d)\n", ret);
		return ret;
	}

	priv->regmap = syscon_get_regmap(syscon);
	if (!priv->regmap) {
		pr_err("unable to find regmap\n");
		return -ENODEV;
	}

	/* get phy param offset */
	count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
					   "st,syscfg", cells,
					   ARRAY_SIZE(cells));

	if (count < 0) {
		pr_err("Bad PHY st,syscfg property %d\n", count);
		return -EINVAL;
	}

	if (count > PHYPARAM_NB) {
		pr_err("Unsupported PHY param count %d\n", count);
		return -EINVAL;
	}

	priv->param = cells[PHYPARAM_REG];
	priv->ctrl = cells[PHYCTRL_REG];

	/* get global reset control */
	ret = reset_get_by_name(dev, "global", &priv->global_ctl);
	if (ret) {
		pr_err("can't get global reset for %s (%d)", dev->name, ret);
		return ret;
	}

	/* get port reset control */
	ret = reset_get_by_name(dev, "port", &priv->port_ctl);
	if (ret) {
		pr_err("can't get port reset for %s (%d)", dev->name, ret);
		return ret;
	}

	return 0;
}

static const struct udevice_id sti_usb_phy_ids[] = {
	{ .compatible = "st,stih407-usb2-phy" },
	{ }
};

U_BOOT_DRIVER(sti_usb_phy) = {
	.name = "sti_usb_phy",
	.id = UCLASS_PHY,
	.of_match = sti_usb_phy_ids,
	.probe = sti_usb_phy_probe,
	.ops = &sti_usb_phy_ops,
	.priv_auto	= sizeof(struct sti_usb_phy),
};
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
b7ca56dc	2	/*
fb48bc44	3	* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
0f8106f8	4	* Author(s): Patrice Chotard, <[email protected]> for STMicroelectronics.
b7ca56dc PC	5	*/
	6
	7	#include <common.h>
f7ae49fc	8	#include <log.h>
401d1c4f	9	#include <asm/global_data.h>
b7ca56dc PC	10	#include <asm/io.h>
	11	#include <bitfield.h>
	12	#include <dm.h>
	13	#include <errno.h>
	14	#include <fdtdec.h>
	15	#include <generic-phy.h>
b08c8c48	16	#include <linux/libfdt.h>
b7ca56dc PC	17	#include <regmap.h>
	18	#include <reset-uclass.h>
	19	#include <syscon.h>
	20	#include <wait_bit.h>
	21
	22	#include <linux/bitops.h>
	23	#include <linux/compat.h>
	24
	25	DECLARE_GLOBAL_DATA_PTR;
	26
	27	/* Default PHY_SEL and REFCLKSEL configuration */
	28	#define STIH407_USB_PICOPHY_CTRL_PORT_CONF 0x6
	29
	30	/* ports parameters overriding */
	31	#define STIH407_USB_PICOPHY_PARAM_DEF 0x39a4dc
	32
	33	#define PHYPARAM_REG 1
	34	#define PHYCTRL_REG 2
	35	#define PHYPARAM_NB 3
	36
	37	struct sti_usb_phy {
	38	struct regmap *regmap;
	39	struct reset_ctl global_ctl;
	40	struct reset_ctl port_ctl;
	41	int param;
	42	int ctrl;
	43	};
	44
	45	static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
	46	{
	47	int ret;
	48
	49	ret = reset_deassert(&phy->global_ctl);
	50	if (ret < 0) {
9b643e31	51	pr_err("PHY global deassert failed: %d", ret);
b7ca56dc PC	52	return ret;
	53	}
	54
	55	ret = reset_deassert(&phy->port_ctl);
	56	if (ret < 0)
9b643e31	57	pr_err("PHY port deassert failed: %d", ret);
b7ca56dc PC	58
	59	return ret;
	60	}
	61
	62	static int sti_usb_phy_init(struct phy *usb_phy)
	63	{
	64	struct udevice *dev = usb_phy->dev;
	65	struct sti_usb_phy *phy = dev_get_priv(dev);
	66	void __iomem *reg;
	67
	68	/* set ctrl picophy value */
8c1de5e0	69	reg = (void __iomem *)phy->regmap->ranges[0].start + phy->ctrl;
b7ca56dc PC	70	/* CTRL_PORT mask is 0x1f */
	71	clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
	72
	73	/* set ports parameters overriding */
8c1de5e0	74	reg = (void __iomem *)phy->regmap->ranges[0].start + phy->param;
b7ca56dc PC	75	/* PARAM_DEF mask is 0xffffffff */
	76	clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF);
	77
	78	return sti_usb_phy_deassert(phy);
	79	}
	80
	81	static int sti_usb_phy_exit(struct phy *usb_phy)
	82	{
	83	struct udevice *dev = usb_phy->dev;
	84	struct sti_usb_phy *phy = dev_get_priv(dev);
	85	int ret;
	86
	87	ret = reset_assert(&phy->port_ctl);
	88	if (ret < 0) {
9b643e31	89	pr_err("PHY port assert failed: %d", ret);
b7ca56dc PC	90	return ret;
	91	}
	92
	93	ret = reset_assert(&phy->global_ctl);
	94	if (ret < 0)
9b643e31	95	pr_err("PHY global assert failed: %d", ret);
b7ca56dc PC	96
	97	return ret;
	98	}
	99
	100	struct phy_ops sti_usb_phy_ops = {
	101	.init = sti_usb_phy_init,
	102	.exit = sti_usb_phy_exit,
	103	};
	104
	105	int sti_usb_phy_probe(struct udevice *dev)
	106	{
	107	struct sti_usb_phy *priv = dev_get_priv(dev);
	108	struct udevice *syscon;
	109	struct ofnode_phandle_args syscfg_phandle;
	110	u32 cells[PHYPARAM_NB];
	111	int ret, count;
	112
	113	/* get corresponding syscon phandle */
	114	ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
	115	&syscfg_phandle);
	116
	117	if (ret < 0) {
9b643e31	118	pr_err("Can't get syscfg phandle: %d\n", ret);
b7ca56dc PC	119	return ret;
	120	}
	121
	122	ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node,
	123	&syscon);
	124	if (ret) {
9b643e31	125	pr_err("unable to find syscon device (%d)\n", ret);
b7ca56dc PC	126	return ret;
	127	}
	128
	129	priv->regmap = syscon_get_regmap(syscon);
	130	if (!priv->regmap) {
9b643e31	131	pr_err("unable to find regmap\n");
b7ca56dc PC	132	return -ENODEV;
	133	}
	134
	135	/* get phy param offset */
	136	count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
	137	"st,syscfg", cells,
	138	ARRAY_SIZE(cells));
	139
	140	if (count < 0) {
9b643e31	141	pr_err("Bad PHY st,syscfg property %d\n", count);
b7ca56dc PC	142	return -EINVAL;
	143	}
	144
	145	if (count > PHYPARAM_NB) {
9b643e31	146	pr_err("Unsupported PHY param count %d\n", count);
b7ca56dc PC	147	return -EINVAL;
	148	}
	149
	150	priv->param = cells[PHYPARAM_REG];
	151	priv->ctrl = cells[PHYCTRL_REG];
	152
	153	/* get global reset control */
	154	ret = reset_get_by_name(dev, "global", &priv->global_ctl);
	155	if (ret) {
9b643e31	156	pr_err("can't get global reset for %s (%d)", dev->name, ret);
b7ca56dc PC	157	return ret;
	158	}
	159
	160	/* get port reset control */
	161	ret = reset_get_by_name(dev, "port", &priv->port_ctl);
	162	if (ret) {
9b643e31	163	pr_err("can't get port reset for %s (%d)", dev->name, ret);
b7ca56dc PC	164	return ret;
	165	}
	166
	167	return 0;
	168	}
	169
	170	static const struct udevice_id sti_usb_phy_ids[] = {
	171	{ .compatible = "st,stih407-usb2-phy" },
	172	{ }
	173	};
	174
	175	U_BOOT_DRIVER(sti_usb_phy) = {
	176	.name = "sti_usb_phy",
	177	.id = UCLASS_PHY,
	178	.of_match = sti_usb_phy_ids,
	179	.probe = sti_usb_phy_probe,
	180	.ops = &sti_usb_phy_ops,
41575d8e	181	.priv_auto = sizeof(struct sti_usb_phy),
b7ca56dc	182	};