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83d290c5 1# SPDX-License-Identifier: GPL-2.0+
c609719b 2#
eca3aeb3 3# (C) Copyright 2000 - 2013
c609719b 4# Wolfgang Denk, DENX Software Engineering, [email protected].
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5
6Summary:
7========
8
24ee89b9 9This directory contains the source code for U-Boot, a boot loader for
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10Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
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14
15The development of U-Boot is closely related to Linux: some parts of
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16the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
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18support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
24ee89b9 32Makefile have been tested to some extent and can be considered
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33"working". In fact, many of them are used in production systems.
34
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35In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
c609719b 39
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40Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
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43
44 make CHANGELOG
45
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46
47Where to get help:
48==================
49
24ee89b9 50In case you have questions about, problems with or contributions for
7207b366 51U-Boot, you should send a message to the U-Boot mailing list at
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52<[email protected]>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
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54Please see https://lists.denx.de/pipermail/u-boot and
55https://marc.info/?l=u-boot
c609719b 56
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57Where to get source code:
58=========================
59
7207b366 60The U-Boot source code is maintained in the Git repository at
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61https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
62https://source.denx.de/u-boot/u-boot
218ca724 63
c4bd51e2 64The "Tags" links on this page allow you to download tarballs of
11ccc33f 65any version you might be interested in. Official releases are also
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66available from the DENX file server through HTTPS or FTP.
67https://ftp.denx.de/pub/u-boot/
68ftp://ftp.denx.de/pub/u-boot/
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69
70
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71Where we come from:
72===================
73
74- start from 8xxrom sources
047f6ec0 75- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
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76- clean up code
77- make it easier to add custom boards
78- make it possible to add other [PowerPC] CPUs
79- extend functions, especially:
80 * Provide extended interface to Linux boot loader
81 * S-Record download
82 * network boot
9e5616de 83 * ATA disk / SCSI ... boot
047f6ec0 84- create ARMBoot project (https://sourceforge.net/projects/armboot)
c609719b 85- add other CPU families (starting with ARM)
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86- create U-Boot project (https://sourceforge.net/projects/u-boot)
87- current project page: see https://www.denx.de/wiki/U-Boot
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88
89
90Names and Spelling:
91===================
92
93The "official" name of this project is "Das U-Boot". The spelling
94"U-Boot" shall be used in all written text (documentation, comments
95in source files etc.). Example:
96
97 This is the README file for the U-Boot project.
98
99File names etc. shall be based on the string "u-boot". Examples:
100
101 include/asm-ppc/u-boot.h
102
103 #include <asm/u-boot.h>
104
105Variable names, preprocessor constants etc. shall be either based on
106the string "u_boot" or on "U_BOOT". Example:
107
108 U_BOOT_VERSION u_boot_logo
109 IH_OS_U_BOOT u_boot_hush_start
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110
111
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112Versioning:
113===========
114
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115Starting with the release in October 2008, the names of the releases
116were changed from numerical release numbers without deeper meaning
117into a time stamp based numbering. Regular releases are identified by
118names consisting of the calendar year and month of the release date.
119Additional fields (if present) indicate release candidates or bug fix
120releases in "stable" maintenance trees.
121
122Examples:
c0f40859 123 U-Boot v2009.11 - Release November 2009
360d883a 124 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
0de21ecb 125 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
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126
127
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128Directory Hierarchy:
129====================
130
6e73ed00 131/arch Architecture-specific files
6eae68e4 132 /arc Files generic to ARC architecture
8d321b81 133 /arm Files generic to ARM architecture
8d321b81 134 /m68k Files generic to m68k architecture
8d321b81 135 /microblaze Files generic to microblaze architecture
8d321b81 136 /mips Files generic to MIPS architecture
8d321b81 137 /nios2 Files generic to Altera NIOS2 architecture
a47a12be 138 /powerpc Files generic to PowerPC architecture
3fafced7 139 /riscv Files generic to RISC-V architecture
7207b366 140 /sandbox Files generic to HW-independent "sandbox"
8d321b81 141 /sh Files generic to SH architecture
33c7731b 142 /x86 Files generic to x86 architecture
e4eb313a 143 /xtensa Files generic to Xtensa architecture
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144/api Machine/arch-independent API for external apps
145/board Board-dependent files
19a91f24 146/boot Support for images and booting
740f7e5c 147/cmd U-Boot commands functions
6e73ed00 148/common Misc architecture-independent functions
7207b366 149/configs Board default configuration files
8d321b81 150/disk Code for disk drive partition handling
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151/doc Documentation (a mix of ReST and READMEs)
152/drivers Device drivers
153/dts Makefile for building internal U-Boot fdt.
154/env Environment support
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155/examples Example code for standalone applications, etc.
156/fs Filesystem code (cramfs, ext2, jffs2, etc.)
157/include Header Files
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158/lib Library routines generic to all architectures
159/Licenses Various license files
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160/net Networking code
161/post Power On Self Test
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162/scripts Various build scripts and Makefiles
163/test Various unit test files
6e73ed00 164/tools Tools to build and sign FIT images, etc.
c609719b 165
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166Software Configuration:
167=======================
168
169Configuration is usually done using C preprocessor defines; the
170rationale behind that is to avoid dead code whenever possible.
171
172There are two classes of configuration variables:
173
174* Configuration _OPTIONS_:
175 These are selectable by the user and have names beginning with
176 "CONFIG_".
177
178* Configuration _SETTINGS_:
179 These depend on the hardware etc. and should not be meddled with if
180 you don't know what you're doing; they have names beginning with
6d0f6bcf 181 "CONFIG_SYS_".
c609719b 182
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183Previously, all configuration was done by hand, which involved creating
184symbolic links and editing configuration files manually. More recently,
185U-Boot has added the Kbuild infrastructure used by the Linux kernel,
186allowing you to use the "make menuconfig" command to configure your
187build.
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188
189
190Selection of Processor Architecture and Board Type:
191---------------------------------------------------
192
193For all supported boards there are ready-to-use default
ab584d67 194configurations available; just type "make <board_name>_defconfig".
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195
196Example: For a TQM823L module type:
197
198 cd u-boot
ab584d67 199 make TQM823L_defconfig
c609719b 200
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201Note: If you're looking for the default configuration file for a board
202you're sure used to be there but is now missing, check the file
203doc/README.scrapyard for a list of no longer supported boards.
c609719b 204
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205Sandbox Environment:
206--------------------
207
208U-Boot can be built natively to run on a Linux host using the 'sandbox'
209board. This allows feature development which is not board- or architecture-
210specific to be undertaken on a native platform. The sandbox is also used to
211run some of U-Boot's tests.
212
bbb140ed 213See doc/arch/sandbox.rst for more details.
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214
215
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216Board Initialisation Flow:
217--------------------------
218
219This is the intended start-up flow for boards. This should apply for both
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220SPL and U-Boot proper (i.e. they both follow the same rules).
221
222Note: "SPL" stands for "Secondary Program Loader," which is explained in
223more detail later in this file.
224
225At present, SPL mostly uses a separate code path, but the function names
226and roles of each function are the same. Some boards or architectures
227may not conform to this. At least most ARM boards which use
228CONFIG_SPL_FRAMEWORK conform to this.
229
230Execution typically starts with an architecture-specific (and possibly
231CPU-specific) start.S file, such as:
232
233 - arch/arm/cpu/armv7/start.S
234 - arch/powerpc/cpu/mpc83xx/start.S
235 - arch/mips/cpu/start.S
db910353 236
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237and so on. From there, three functions are called; the purpose and
238limitations of each of these functions are described below.
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239
240lowlevel_init():
241 - purpose: essential init to permit execution to reach board_init_f()
242 - no global_data or BSS
243 - there is no stack (ARMv7 may have one but it will soon be removed)
244 - must not set up SDRAM or use console
245 - must only do the bare minimum to allow execution to continue to
246 board_init_f()
247 - this is almost never needed
248 - return normally from this function
249
250board_init_f():
251 - purpose: set up the machine ready for running board_init_r():
252 i.e. SDRAM and serial UART
253 - global_data is available
254 - stack is in SRAM
255 - BSS is not available, so you cannot use global/static variables,
256 only stack variables and global_data
257
258 Non-SPL-specific notes:
259 - dram_init() is called to set up DRAM. If already done in SPL this
260 can do nothing
261
262 SPL-specific notes:
263 - you can override the entire board_init_f() function with your own
264 version as needed.
265 - preloader_console_init() can be called here in extremis
266 - should set up SDRAM, and anything needed to make the UART work
499696e4 267 - there is no need to clear BSS, it will be done by crt0.S
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268 - for specific scenarios on certain architectures an early BSS *can*
269 be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
270 of BSS prior to entering board_init_f()) but doing so is discouraged.
271 Instead it is strongly recommended to architect any code changes
272 or additions such to not depend on the availability of BSS during
273 board_init_f() as indicated in other sections of this README to
274 maintain compatibility and consistency across the entire code base.
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275 - must return normally from this function (don't call board_init_r()
276 directly)
277
278Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
279this point the stack and global_data are relocated to below
280CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
281memory.
282
283board_init_r():
284 - purpose: main execution, common code
285 - global_data is available
286 - SDRAM is available
287 - BSS is available, all static/global variables can be used
288 - execution eventually continues to main_loop()
289
290 Non-SPL-specific notes:
291 - U-Boot is relocated to the top of memory and is now running from
292 there.
293
294 SPL-specific notes:
295 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
296 CONFIG_SPL_STACK_R_ADDR points into SDRAM
297 - preloader_console_init() can be called here - typically this is
0680f1b1 298 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
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299 spl_board_init() function containing this call
300 - loads U-Boot or (in falcon mode) Linux
301
302
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303Configuration Options:
304----------------------
305
306Configuration depends on the combination of board and CPU type; all
307such information is kept in a configuration file
308"include/configs/<board_name>.h".
309
310Example: For a TQM823L module, all configuration settings are in
311"include/configs/TQM823L.h".
312
313
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314Many of the options are named exactly as the corresponding Linux
315kernel configuration options. The intention is to make it easier to
316build a config tool - later.
317
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318- ARM Platform Bus Type(CCI):
319 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
320 provides full cache coherency between two clusters of multi-core
321 CPUs and I/O coherency for devices and I/O masters
322
323 CONFIG_SYS_FSL_HAS_CCI400
324
325 Defined For SoC that has cache coherent interconnect
326 CCN-400
7f6c2cbc 327
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328 CONFIG_SYS_FSL_HAS_CCN504
329
330 Defined for SoC that has cache coherent interconnect CCN-504
331
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332The following options need to be configured:
333
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334- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
335
336- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
6ccec449 337
66412c63 338- 85xx CPU Options:
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339 CONFIG_SYS_PPC64
340
341 Specifies that the core is a 64-bit PowerPC implementation (implements
342 the "64" category of the Power ISA). This is necessary for ePAPR
343 compliance, among other possible reasons.
344
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345 CONFIG_SYS_FSL_TBCLK_DIV
346
347 Defines the core time base clock divider ratio compared to the
348 system clock. On most PQ3 devices this is 8, on newer QorIQ
349 devices it can be 16 or 32. The ratio varies from SoC to Soc.
350
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351 CONFIG_SYS_FSL_PCIE_COMPAT
352
353 Defines the string to utilize when trying to match PCIe device
354 tree nodes for the given platform.
355
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356 CONFIG_SYS_FSL_ERRATUM_A004510
357
358 Enables a workaround for erratum A004510. If set,
359 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
360 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
361
362 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
363 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
364
365 Defines one or two SoC revisions (low 8 bits of SVR)
366 for which the A004510 workaround should be applied.
367
368 The rest of SVR is either not relevant to the decision
369 of whether the erratum is present (e.g. p2040 versus
370 p2041) or is implied by the build target, which controls
371 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
372
373 See Freescale App Note 4493 for more information about
374 this erratum.
375
376 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
377
378 This is the value to write into CCSR offset 0x18600
379 according to the A004510 workaround.
380
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381 CONFIG_SYS_FSL_DSP_DDR_ADDR
382 This value denotes start offset of DDR memory which is
383 connected exclusively to the DSP cores.
384
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385 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
386 This value denotes start offset of M2 memory
387 which is directly connected to the DSP core.
388
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389 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
390 This value denotes start offset of M3 memory which is directly
391 connected to the DSP core.
392
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393 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
394 This value denotes start offset of DSP CCSR space.
395
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396 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
397 Single Source Clock is clocking mode present in some of FSL SoC's.
398 In this mode, a single differential clock is used to supply
399 clocks to the sysclock, ddrclock and usbclock.
400
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401 CONFIG_SYS_CPC_REINIT_F
402 This CONFIG is defined when the CPC is configured as SRAM at the
a187559e 403 time of U-Boot entry and is required to be re-initialized.
fb4a2409 404
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405- Generic CPU options:
406 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
407
408 Defines the endianess of the CPU. Implementation of those
409 values is arch specific.
410
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411 CONFIG_SYS_FSL_DDR
412 Freescale DDR driver in use. This type of DDR controller is
1c58857a 413 found in mpc83xx, mpc85xx as well as some ARM core SoCs.
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414
415 CONFIG_SYS_FSL_DDR_ADDR
416 Freescale DDR memory-mapped register base.
417
418 CONFIG_SYS_FSL_DDR_EMU
419 Specify emulator support for DDR. Some DDR features such as
420 deskew training are not available.
421
422 CONFIG_SYS_FSL_DDRC_GEN1
423 Freescale DDR1 controller.
424
425 CONFIG_SYS_FSL_DDRC_GEN2
426 Freescale DDR2 controller.
427
428 CONFIG_SYS_FSL_DDRC_GEN3
429 Freescale DDR3 controller.
430
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431 CONFIG_SYS_FSL_DDRC_GEN4
432 Freescale DDR4 controller.
433
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434 CONFIG_SYS_FSL_DDRC_ARM_GEN3
435 Freescale DDR3 controller for ARM-based SoCs.
436
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437 CONFIG_SYS_FSL_DDR1
438 Board config to use DDR1. It can be enabled for SoCs with
439 Freescale DDR1 or DDR2 controllers, depending on the board
440 implemetation.
441
442 CONFIG_SYS_FSL_DDR2
62a3b7dd 443 Board config to use DDR2. It can be enabled for SoCs with
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444 Freescale DDR2 or DDR3 controllers, depending on the board
445 implementation.
446
447 CONFIG_SYS_FSL_DDR3
448 Board config to use DDR3. It can be enabled for SoCs with
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449 Freescale DDR3 or DDR3L controllers.
450
451 CONFIG_SYS_FSL_DDR3L
452 Board config to use DDR3L. It can be enabled for SoCs with
453 DDR3L controllers.
5614e71b 454
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455 CONFIG_SYS_FSL_IFC_BE
456 Defines the IFC controller register space as Big Endian
457
458 CONFIG_SYS_FSL_IFC_LE
459 Defines the IFC controller register space as Little Endian
460
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461 CONFIG_SYS_FSL_IFC_CLK_DIV
462 Defines divider of platform clock(clock input to IFC controller).
463
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464 CONFIG_SYS_FSL_LBC_CLK_DIV
465 Defines divider of platform clock(clock input to eLBC controller).
466
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467 CONFIG_SYS_FSL_DDR_BE
468 Defines the DDR controller register space as Big Endian
469
470 CONFIG_SYS_FSL_DDR_LE
471 Defines the DDR controller register space as Little Endian
472
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473 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
474 Physical address from the view of DDR controllers. It is the
475 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
476 it could be different for ARM SoCs.
477
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478 CONFIG_SYS_FSL_DDR_INTLV_256B
479 DDR controller interleaving on 256-byte. This is a special
480 interleaving mode, handled by Dickens for Freescale layerscape
481 SoCs with ARM core.
482
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483 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
484 Number of controllers used as main memory.
485
486 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
487 Number of controllers used for other than main memory.
488
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489 CONFIG_SYS_FSL_SEC_BE
490 Defines the SEC controller register space as Big Endian
491
492 CONFIG_SYS_FSL_SEC_LE
493 Defines the SEC controller register space as Little Endian
494
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495- MIPS CPU options:
496 CONFIG_SYS_INIT_SP_OFFSET
497
498 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
499 pointer. This is needed for the temporary stack before
500 relocation.
501
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502 CONFIG_XWAY_SWAP_BYTES
503
504 Enable compilation of tools/xway-swap-bytes needed for Lantiq
505 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
506 be swapped if a flash programmer is used.
507
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508- ARM options:
509 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
510
511 Select high exception vectors of the ARM core, e.g., do not
512 clear the V bit of the c1 register of CP15.
513
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514 COUNTER_FREQUENCY
515 Generic timer clock source frequency.
516
517 COUNTER_FREQUENCY_REAL
518 Generic timer clock source frequency if the real clock is
519 different from COUNTER_FREQUENCY, and can only be determined
520 at run time.
521
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522- Tegra SoC options:
523 CONFIG_TEGRA_SUPPORT_NON_SECURE
524
525 Support executing U-Boot in non-secure (NS) mode. Certain
526 impossible actions will be skipped if the CPU is in NS mode,
527 such as ARM architectural timer initialization.
528
5da627a4 529- Linux Kernel Interface:
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530 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
531
b445bbb4 532 When transferring memsize parameter to Linux, some versions
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533 expect it to be in bytes, others in MB.
534 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
535
fec6d9ee 536 CONFIG_OF_LIBFDT
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537
538 New kernel versions are expecting firmware settings to be
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539 passed using flattened device trees (based on open firmware
540 concepts).
541
542 CONFIG_OF_LIBFDT
543 * New libfdt-based support
544 * Adds the "fdt" command
3bb342fc 545 * The bootm command automatically updates the fdt
213bf8c8 546
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547 OF_TBCLK - The timebase frequency.
548
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549 boards with QUICC Engines require OF_QE to set UCC MAC
550 addresses
3bb342fc 551
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552 CONFIG_OF_IDE_FIXUP
553
554 U-Boot can detect if an IDE device is present or not.
555 If not, and this new config option is activated, U-Boot
556 removes the ATA node from the DTS before booting Linux,
557 so the Linux IDE driver does not probe the device and
558 crash. This is needed for buggy hardware (uc101) where
559 no pull down resistor is connected to the signal IDE5V_DD7.
560
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561- vxWorks boot parameters:
562
563 bootvx constructs a valid bootline using the following
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564 environments variables: bootdev, bootfile, ipaddr, netmask,
565 serverip, gatewayip, hostname, othbootargs.
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566 It loads the vxWorks image pointed bootfile.
567
81a05d9b 568 Note: If a "bootargs" environment is defined, it will override
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569 the defaults discussed just above.
570
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571- Cache Configuration for ARM:
572 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
573 controller
574 CONFIG_SYS_PL310_BASE - Physical base address of PL310
575 controller register space
576
6705d81e 577- Serial Ports:
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578 CONFIG_PL011_CLOCK
579
580 If you have Amba PrimeCell PL011 UARTs, set this variable to
581 the clock speed of the UARTs.
582
583 CONFIG_PL01x_PORTS
584
585 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
586 define this to a list of base addresses for each (supported)
587 port. See e.g. include/configs/versatile.h
588
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589 CONFIG_SERIAL_HW_FLOW_CONTROL
590
591 Define this variable to enable hw flow control in serial driver.
592 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 593
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594- Serial Download Echo Mode:
595 CONFIG_LOADS_ECHO
596 If defined to 1, all characters received during a
597 serial download (using the "loads" command) are
598 echoed back. This might be needed by some terminal
599 emulations (like "cu"), but may as well just take
600 time on others. This setting #define's the initial
601 value of the "loads_echo" environment variable.
602
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603- Removal of commands
604 If no commands are needed to boot, you can disable
605 CONFIG_CMDLINE to remove them. In this case, the command line
606 will not be available, and when U-Boot wants to execute the
607 boot command (on start-up) it will call board_run_command()
608 instead. This can reduce image size significantly for very
609 simple boot procedures.
610
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611- Regular expression support:
612 CONFIG_REGEX
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613 If this variable is defined, U-Boot is linked against
614 the SLRE (Super Light Regular Expression) library,
615 which adds regex support to some commands, as for
616 example "env grep" and "setexpr".
a5ecbe62 617
c609719b 618- Watchdog:
933ada56
RV
619 CONFIG_SYS_WATCHDOG_FREQ
620 Some platforms automatically call WATCHDOG_RESET()
621 from the timer interrupt handler every
622 CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the
623 board configuration file, a default of CONFIG_SYS_HZ/2
624 (i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ
625 to 0 disables calling WATCHDOG_RESET() from the timer
626 interrupt.
627
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628- Real-Time Clock:
629
602ad3b3 630 When CONFIG_CMD_DATE is selected, the type of the RTC
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631 has to be selected, too. Define exactly one of the
632 following options:
633
c609719b 634 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
4e8b7544 635 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
c609719b 636 CONFIG_RTC_MC146818 - use MC146818 RTC
1cb8e980 637 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
c609719b 638 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
7f70e853 639 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
412921d2 640 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
3bac3513 641 CONFIG_RTC_DS164x - use Dallas DS164x RTC
9536dfcc 642 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
4c0d4c3b 643 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
2bd3cab3 644 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
71d19f30
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645 CONFIG_SYS_RV3029_TCR - enable trickle charger on
646 RV3029 RTC.
c609719b 647
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648 Note that if the RTC uses I2C, then the I2C interface
649 must also be configured. See I2C Support, below.
650
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651- GPIO Support:
652 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
e92739d3 653
5dec49ca
CP
654 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
655 chip-ngpio pairs that tell the PCA953X driver the number of
656 pins supported by a particular chip.
657
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PT
658 Note that if the GPIO device uses I2C, then the I2C interface
659 must also be configured. See I2C Support, below.
660
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SG
661- I/O tracing:
662 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
663 accesses and can checksum them or write a list of them out
664 to memory. See the 'iotrace' command for details. This is
665 useful for testing device drivers since it can confirm that
666 the driver behaves the same way before and after a code
667 change. Currently this is supported on sandbox and arm. To
668 add support for your architecture, add '#include <iotrace.h>'
669 to the bottom of arch/<arch>/include/asm/io.h and test.
670
671 Example output from the 'iotrace stats' command is below.
672 Note that if the trace buffer is exhausted, the checksum will
673 still continue to operate.
674
675 iotrace is enabled
676 Start: 10000000 (buffer start address)
677 Size: 00010000 (buffer size)
678 Offset: 00000120 (current buffer offset)
679 Output: 10000120 (start + offset)
680 Count: 00000018 (number of trace records)
681 CRC32: 9526fb66 (CRC32 of all trace records)
682
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683- Timestamp Support:
684
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685 When CONFIG_TIMESTAMP is selected, the timestamp
686 (date and time) of an image is printed by image
687 commands like bootm or iminfo. This option is
602ad3b3 688 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 689
923c46f9
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690- Partition Labels (disklabels) Supported:
691 Zero or more of the following:
692 CONFIG_MAC_PARTITION Apple's MacOS partition table.
923c46f9
KP
693 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
694 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
695 bootloader. Note 2TB partition limit; see
696 disk/part_efi.c
c649e3c9 697 CONFIG_SCSI) you must configure support for at
923c46f9 698 least one non-MTD partition type as well.
c609719b 699
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700- LBA48 Support
701 CONFIG_LBA48
702
703 Set this to enable support for disks larger than 137GB
4b142feb 704 Also look at CONFIG_SYS_64BIT_LBA.
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705 Whithout these , LBA48 support uses 32bit variables and will 'only'
706 support disks up to 2.1TB.
707
6d0f6bcf 708 CONFIG_SYS_64BIT_LBA:
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709 When enabled, makes the IDE subsystem use 64bit sector addresses.
710 Default is 32bit.
711
c609719b 712- NETWORK Support (PCI):
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713 CONFIG_E1000_SPI
714 Utility code for direct access to the SPI bus on Intel 8257x.
715 This does not do anything useful unless you set at least one
716 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
717
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718 CONFIG_NATSEMI
719 Support for National dp83815 chips.
720
721 CONFIG_NS8382X
722 Support for National dp8382[01] gigabit chips.
723
45219c46 724- NETWORK Support (other):
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RH
725 CONFIG_CALXEDA_XGMAC
726 Support for the Calxeda XGMAC device
727
3bb46d23 728 CONFIG_LAN91C96
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729 Support for SMSC's LAN91C96 chips.
730
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731 CONFIG_LAN91C96_USE_32_BIT
732 Define this to enable 32 bit addressing
733
3bb46d23 734 CONFIG_SMC91111
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735 Support for SMSC's LAN91C111 chip
736
737 CONFIG_SMC91111_BASE
738 Define this to hold the physical address
739 of the device (I/O space)
740
741 CONFIG_SMC_USE_32_BIT
742 Define this if data bus is 32 bits
743
744 CONFIG_SMC_USE_IOFUNCS
745 Define this to use i/o functions instead of macros
746 (some hardware wont work with macros)
747
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HS
748 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
749 Define this if you have more then 3 PHYs.
750
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ML
751 CONFIG_FTGMAC100
752 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
753
754 CONFIG_FTGMAC100_EGIGA
755 Define this to use GE link update with gigabit PHY.
756 Define this if FTGMAC100 is connected to gigabit PHY.
757 If your system has 10/100 PHY only, it might not occur
758 wrong behavior. Because PHY usually return timeout or
759 useless data when polling gigabit status and gigabit
760 control registers. This behavior won't affect the
761 correctnessof 10/100 link speed update.
762
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763 CONFIG_SH_ETHER
764 Support for Renesas on-chip Ethernet controller
765
766 CONFIG_SH_ETHER_USE_PORT
767 Define the number of ports to be used
768
769 CONFIG_SH_ETHER_PHY_ADDR
770 Define the ETH PHY's address
771
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772 CONFIG_SH_ETHER_CACHE_WRITEBACK
773 If this option is set, the driver enables cache flush.
774
5e124724 775- TPM Support:
90899cc0
CC
776 CONFIG_TPM
777 Support TPM devices.
778
0766ad2f
CR
779 CONFIG_TPM_TIS_INFINEON
780 Support for Infineon i2c bus TPM devices. Only one device
1b393db5
TWHT
781 per system is supported at this time.
782
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TWHT
783 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
784 Define the burst count bytes upper limit
785
3aa74088
CR
786 CONFIG_TPM_ST33ZP24
787 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
788
789 CONFIG_TPM_ST33ZP24_I2C
790 Support for STMicroelectronics ST33ZP24 I2C devices.
791 Requires TPM_ST33ZP24 and I2C.
792
b75fdc11
CR
793 CONFIG_TPM_ST33ZP24_SPI
794 Support for STMicroelectronics ST33ZP24 SPI devices.
795 Requires TPM_ST33ZP24 and SPI.
796
c01939c7
DE
797 CONFIG_TPM_ATMEL_TWI
798 Support for Atmel TWI TPM device. Requires I2C support.
799
90899cc0 800 CONFIG_TPM_TIS_LPC
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VB
801 Support for generic parallel port TPM devices. Only one device
802 per system is supported at this time.
803
804 CONFIG_TPM_TIS_BASE_ADDRESS
805 Base address where the generic TPM device is mapped
806 to. Contemporary x86 systems usually map it at
807 0xfed40000.
808
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RP
809 CONFIG_TPM
810 Define this to enable the TPM support library which provides
811 functional interfaces to some TPM commands.
812 Requires support for a TPM device.
813
814 CONFIG_TPM_AUTH_SESSIONS
815 Define this to enable authorized functions in the TPM library.
816 Requires CONFIG_TPM and CONFIG_SHA1.
817
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818- USB Support:
819 At the moment only the UHCI host controller is
064b55cf 820 supported (PIP405, MIP405); define
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821 CONFIG_USB_UHCI to enable it.
822 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 823 and define CONFIG_USB_STORAGE to enable the USB
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WD
824 storage devices.
825 Note:
826 Supported are USB Keyboards and USB Floppy drives
827 (TEAC FD-05PUB).
4d13cbad 828
9ab4ce22
SG
829 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
830 txfilltuning field in the EHCI controller on reset.
831
6e9e0626
OT
832 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
833 HW module registers.
834
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835- USB Device:
836 Define the below if you wish to use the USB console.
837 Once firmware is rebuilt from a serial console issue the
838 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 839 attach your USB cable. The Unix command "dmesg" should print
16c8d5e7
WD
840 it has found a new device. The environment variable usbtty
841 can be set to gserial or cdc_acm to enable your device to
386eda02 842 appear to a USB host as a Linux gserial device or a
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WD
843 Common Device Class Abstract Control Model serial device.
844 If you select usbtty = gserial you should be able to enumerate
845 a Linux host by
846 # modprobe usbserial vendor=0xVendorID product=0xProductID
847 else if using cdc_acm, simply setting the environment
848 variable usbtty to be cdc_acm should suffice. The following
849 might be defined in YourBoardName.h
386eda02 850
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WD
851 CONFIG_USB_DEVICE
852 Define this to build a UDC device
853
854 CONFIG_USB_TTY
855 Define this to have a tty type of device available to
856 talk to the UDC device
386eda02 857
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VK
858 CONFIG_USBD_HS
859 Define this to enable the high speed support for usb
860 device and usbtty. If this feature is enabled, a routine
861 int is_usbd_high_speed(void)
862 also needs to be defined by the driver to dynamically poll
863 whether the enumeration has succeded at high speed or full
864 speed.
865
386eda02 866 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 867 define your own vendor specific values either in BoardName.h
386eda02 868 or directly in usbd_vendor_info.h. If you don't define
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WD
869 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
870 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
871 should pretend to be a Linux device to it's target host.
872
873 CONFIG_USBD_MANUFACTURER
874 Define this string as the name of your company for
875 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 876
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WD
877 CONFIG_USBD_PRODUCT_NAME
878 Define this string as the name of your product
879 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
880
881 CONFIG_USBD_VENDORID
882 Define this as your assigned Vendor ID from the USB
883 Implementors Forum. This *must* be a genuine Vendor ID
884 to avoid polluting the USB namespace.
885 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 886
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WD
887 CONFIG_USBD_PRODUCTID
888 Define this as the unique Product ID
889 for your device
890 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 891
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IG
892- ULPI Layer Support:
893 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
894 the generic ULPI layer. The generic layer accesses the ULPI PHY
895 via the platform viewport, so you need both the genric layer and
896 the viewport enabled. Currently only Chipidea/ARC based
897 viewport is supported.
898 To enable the ULPI layer support, define CONFIG_USB_ULPI and
899 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0
LS
900 If your ULPI phy needs a different reference clock than the
901 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
902 the appropriate value in Hz.
c609719b 903
71f95118 904- MMC Support:
8bde7f77
WD
905 The MMC controller on the Intel PXA is supported. To
906 enable this define CONFIG_MMC. The MMC can be
907 accessed from the boot prompt by mapping the device
71f95118 908 to physical memory similar to flash. Command line is
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JL
909 enabled with CONFIG_CMD_MMC. The MMC driver also works with
910 the FAT fs. This is enabled with CONFIG_CMD_FAT.
71f95118 911
afb35666
YS
912 CONFIG_SH_MMCIF
913 Support for Renesas on-chip MMCIF controller
914
915 CONFIG_SH_MMCIF_ADDR
916 Define the base address of MMCIF registers
917
918 CONFIG_SH_MMCIF_CLK
919 Define the clock frequency for MMCIF
920
b3ba6e94 921- USB Device Firmware Update (DFU) class support:
bb4059a5 922 CONFIG_DFU_OVER_USB
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TR
923 This enables the USB portion of the DFU USB class
924
c6631764
PA
925 CONFIG_DFU_NAND
926 This enables support for exposing NAND devices via DFU.
927
a9479f04
AM
928 CONFIG_DFU_RAM
929 This enables support for exposing RAM via DFU.
930 Note: DFU spec refer to non-volatile memory usage, but
931 allow usages beyond the scope of spec - here RAM usage,
932 one that would help mostly the developer.
933
e7e75c70
HS
934 CONFIG_SYS_DFU_DATA_BUF_SIZE
935 Dfu transfer uses a buffer before writing data to the
936 raw storage device. Make the size (in bytes) of this buffer
937 configurable. The size of this buffer is also configurable
938 through the "dfu_bufsiz" environment variable.
939
ea2453d5
PA
940 CONFIG_SYS_DFU_MAX_FILE_SIZE
941 When updating files rather than the raw storage device,
942 we use a static buffer to copy the file into and then write
943 the buffer once we've been given the whole file. Define
944 this to the maximum filesize (in bytes) for the buffer.
945 Default is 4 MiB if undefined.
946
001a8319
HS
947 DFU_DEFAULT_POLL_TIMEOUT
948 Poll timeout [ms], is the timeout a device can send to the
949 host. The host must wait for this timeout before sending
950 a subsequent DFU_GET_STATUS request to the device.
951
952 DFU_MANIFEST_POLL_TIMEOUT
953 Poll timeout [ms], which the device sends to the host when
954 entering dfuMANIFEST state. Host waits this timeout, before
955 sending again an USB request to the device.
956
6705d81e 957- Journaling Flash filesystem support:
6d0f6bcf
JCPV
958 CONFIG_SYS_JFFS2_FIRST_SECTOR,
959 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
6705d81e
WD
960 Define these for a default partition on a NOR device
961
c609719b 962- Keyboard Support:
39f615ed
SG
963 See Kconfig help for available keyboard drivers.
964
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WD
965- LCD Support: CONFIG_LCD
966
967 Define this to enable LCD support (for output to LCD
968 display); also select one of the supported displays
969 by defining one of these:
970
fd3103bb 971 CONFIG_NEC_NL6448AC33:
c609719b 972
fd3103bb 973 NEC NL6448AC33-18. Active, color, single scan.
c609719b 974
fd3103bb 975 CONFIG_NEC_NL6448BC20
c609719b 976
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WD
977 NEC NL6448BC20-08. 6.5", 640x480.
978 Active, color, single scan.
979
980 CONFIG_NEC_NL6448BC33_54
981
982 NEC NL6448BC33-54. 10.4", 640x480.
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WD
983 Active, color, single scan.
984
985 CONFIG_SHARP_16x9
986
987 Sharp 320x240. Active, color, single scan.
988 It isn't 16x9, and I am not sure what it is.
989
990 CONFIG_SHARP_LQ64D341
991
992 Sharp LQ64D341 display, 640x480.
993 Active, color, single scan.
994
995 CONFIG_HLD1045
996
997 HLD1045 display, 640x480.
998 Active, color, single scan.
999
1000 CONFIG_OPTREX_BW
1001
1002 Optrex CBL50840-2 NF-FW 99 22 M5
1003 or
1004 Hitachi LMG6912RPFC-00T
1005 or
1006 Hitachi SP14Q002
1007
1008 320x240. Black & white.
1009
676d319e
SG
1010 CONFIG_LCD_ALIGNMENT
1011
b445bbb4 1012 Normally the LCD is page-aligned (typically 4KB). If this is
676d319e
SG
1013 defined then the LCD will be aligned to this value instead.
1014 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1015 here, since it is cheaper to change data cache settings on
1016 a per-section basis.
1017
1018
604c7d4a
HP
1019 CONFIG_LCD_ROTATION
1020
1021 Sometimes, for example if the display is mounted in portrait
1022 mode or even if it's mounted landscape but rotated by 180degree,
1023 we need to rotate our content of the display relative to the
1024 framebuffer, so that user can read the messages which are
1025 printed out.
1026 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1027 initialized with a given rotation from "vl_rot" out of
1028 "vidinfo_t" which is provided by the board specific code.
1029 The value for vl_rot is coded as following (matching to
1030 fbcon=rotate:<n> linux-kernel commandline):
1031 0 = no rotation respectively 0 degree
1032 1 = 90 degree rotation
1033 2 = 180 degree rotation
1034 3 = 270 degree rotation
1035
1036 If CONFIG_LCD_ROTATION is not defined, the console will be
1037 initialized with 0degree rotation.
1038
17ea1177 1039- MII/PHY support:
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WD
1040 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1041
1042 The clock frequency of the MII bus
1043
17ea1177
WD
1044 CONFIG_PHY_CMD_DELAY (ppc4xx)
1045
1046 Some PHY like Intel LXT971A need extra delay after
1047 command issued before MII status register can be read
1048
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WD
1049- IP address:
1050 CONFIG_IPADDR
1051
1052 Define a default value for the IP address to use for
11ccc33f 1053 the default Ethernet interface, in case this is not
c609719b 1054 determined through e.g. bootp.
1ebcd654 1055 (Environment variable "ipaddr")
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1056
1057- Server IP address:
1058 CONFIG_SERVERIP
1059
11ccc33f 1060 Defines a default value for the IP address of a TFTP
c609719b 1061 server to contact when using the "tftboot" command.
1ebcd654 1062 (Environment variable "serverip")
c609719b 1063
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WD
1064- Gateway IP address:
1065 CONFIG_GATEWAYIP
1066
1067 Defines a default value for the IP address of the
1068 default router where packets to other networks are
1069 sent to.
1070 (Environment variable "gatewayip")
1071
1072- Subnet mask:
1073 CONFIG_NETMASK
1074
1075 Defines a default value for the subnet mask (or
1076 routing prefix) which is used to determine if an IP
1077 address belongs to the local subnet or needs to be
1078 forwarded through a router.
1079 (Environment variable "netmask")
1080
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1081- BOOTP Recovery Mode:
1082 CONFIG_BOOTP_RANDOM_DELAY
1083
1084 If you have many targets in a network that try to
1085 boot using BOOTP, you may want to avoid that all
1086 systems send out BOOTP requests at precisely the same
1087 moment (which would happen for instance at recovery
1088 from a power failure, when all systems will try to
1089 boot, thus flooding the BOOTP server. Defining
1090 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1091 inserted before sending out BOOTP requests. The
6c33c785 1092 following delays are inserted then:
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WD
1093
1094 1st BOOTP request: delay 0 ... 1 sec
1095 2nd BOOTP request: delay 0 ... 2 sec
1096 3rd BOOTP request: delay 0 ... 4 sec
1097 4th and following
1098 BOOTP requests: delay 0 ... 8 sec
1099
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TR
1100 CONFIG_BOOTP_ID_CACHE_SIZE
1101
1102 BOOTP packets are uniquely identified using a 32-bit ID. The
1103 server will copy the ID from client requests to responses and
1104 U-Boot will use this to determine if it is the destination of
1105 an incoming response. Some servers will check that addresses
1106 aren't in use before handing them out (usually using an ARP
1107 ping) and therefore take up to a few hundred milliseconds to
1108 respond. Network congestion may also influence the time it
1109 takes for a response to make it back to the client. If that
1110 time is too long, U-Boot will retransmit requests. In order
1111 to allow earlier responses to still be accepted after these
1112 retransmissions, U-Boot's BOOTP client keeps a small cache of
1113 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1114 cache. The default is to keep IDs for up to four outstanding
1115 requests. Increasing this will allow U-Boot to accept offers
1116 from a BOOTP client in networks with unusually high latency.
1117
fe389a82 1118- DHCP Advanced Options:
2c00e099 1119
d22c338e
JH
1120 - Link-local IP address negotiation:
1121 Negotiate with other link-local clients on the local network
1122 for an address that doesn't require explicit configuration.
1123 This is especially useful if a DHCP server cannot be guaranteed
1124 to exist in all environments that the device must operate.
1125
1126 See doc/README.link-local for more information.
1127
24acb83d
PK
1128 - MAC address from environment variables
1129
1130 FDT_SEQ_MACADDR_FROM_ENV
1131
1132 Fix-up device tree with MAC addresses fetched sequentially from
1133 environment variables. This config work on assumption that
1134 non-usable ethernet node of device-tree are either not present
1135 or their status has been marked as "disabled".
1136
a3d991bd 1137 - CDP Options:
6e592385 1138 CONFIG_CDP_DEVICE_ID
a3d991bd
WD
1139
1140 The device id used in CDP trigger frames.
1141
1142 CONFIG_CDP_DEVICE_ID_PREFIX
1143
1144 A two character string which is prefixed to the MAC address
1145 of the device.
1146
1147 CONFIG_CDP_PORT_ID
1148
1149 A printf format string which contains the ascii name of
1150 the port. Normally is set to "eth%d" which sets
11ccc33f 1151 eth0 for the first Ethernet, eth1 for the second etc.
a3d991bd
WD
1152
1153 CONFIG_CDP_CAPABILITIES
1154
1155 A 32bit integer which indicates the device capabilities;
1156 0x00000010 for a normal host which does not forwards.
1157
1158 CONFIG_CDP_VERSION
1159
1160 An ascii string containing the version of the software.
1161
1162 CONFIG_CDP_PLATFORM
1163
1164 An ascii string containing the name of the platform.
1165
1166 CONFIG_CDP_TRIGGER
1167
1168 A 32bit integer sent on the trigger.
1169
1170 CONFIG_CDP_POWER_CONSUMPTION
1171
1172 A 16bit integer containing the power consumption of the
1173 device in .1 of milliwatts.
1174
1175 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1176
1177 A byte containing the id of the VLAN.
1178
79267edd 1179- Status LED: CONFIG_LED_STATUS
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WD
1180
1181 Several configurations allow to display the current
1182 status using a LED. For instance, the LED will blink
1183 fast while running U-Boot code, stop blinking as
1184 soon as a reply to a BOOTP request was received, and
1185 start blinking slow once the Linux kernel is running
1186 (supported by a status LED driver in the Linux
79267edd 1187 kernel). Defining CONFIG_LED_STATUS enables this
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WD
1188 feature in U-Boot.
1189
1df7bbba
IG
1190 Additional options:
1191
79267edd 1192 CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1193 The status LED can be connected to a GPIO pin.
1194 In such cases, the gpio_led driver can be used as a
79267edd 1195 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1196 to include the gpio_led driver in the U-Boot binary.
1197
9dfdcdfe
IG
1198 CONFIG_GPIO_LED_INVERTED_TABLE
1199 Some GPIO connected LEDs may have inverted polarity in which
1200 case the GPIO high value corresponds to LED off state and
1201 GPIO low value corresponds to LED on state.
1202 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1203 with a list of GPIO LEDs that have inverted polarity.
1204
55dabcc8 1205- I2C Support:
3f4978c7 1206 CONFIG_SYS_NUM_I2C_BUSES
945a18e6 1207 Hold the number of i2c buses you want to use.
3f4978c7
HS
1208
1209 CONFIG_SYS_I2C_DIRECT_BUS
1210 define this, if you don't use i2c muxes on your hardware.
1211 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1212 omit this define.
1213
1214 CONFIG_SYS_I2C_MAX_HOPS
1215 define how many muxes are maximal consecutively connected
1216 on one i2c bus. If you not use i2c muxes, omit this
1217 define.
1218
1219 CONFIG_SYS_I2C_BUSES
b445bbb4 1220 hold a list of buses you want to use, only used if
3f4978c7
HS
1221 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1222 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1223 CONFIG_SYS_NUM_I2C_BUSES = 9:
1224
1225 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1226 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1227 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1228 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1229 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1230 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1231 {1, {I2C_NULL_HOP}}, \
1232 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1233 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1234 }
1235
1236 which defines
1237 bus 0 on adapter 0 without a mux
ea818dbb
HS
1238 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1239 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1240 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1241 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1242 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 1243 bus 6 on adapter 1 without a mux
ea818dbb
HS
1244 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1245 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
1246
1247 If you do not have i2c muxes on your board, omit this define.
1248
ce3b5d69 1249- Legacy I2C Support:
ea818dbb 1250 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
1251 then the following macros need to be defined (examples are
1252 from include/configs/lwmon.h):
c609719b
WD
1253
1254 I2C_INIT
1255
b37c7e5e 1256 (Optional). Any commands necessary to enable the I2C
43d9616c 1257 controller or configure ports.
c609719b 1258
ba56f625 1259 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 1260
c609719b
WD
1261 I2C_ACTIVE
1262
1263 The code necessary to make the I2C data line active
1264 (driven). If the data line is open collector, this
1265 define can be null.
1266
b37c7e5e
WD
1267 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1268
c609719b
WD
1269 I2C_TRISTATE
1270
1271 The code necessary to make the I2C data line tri-stated
1272 (inactive). If the data line is open collector, this
1273 define can be null.
1274
b37c7e5e
WD
1275 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1276
c609719b
WD
1277 I2C_READ
1278
472d5460
YS
1279 Code that returns true if the I2C data line is high,
1280 false if it is low.
c609719b 1281
b37c7e5e
WD
1282 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1283
c609719b
WD
1284 I2C_SDA(bit)
1285
472d5460
YS
1286 If <bit> is true, sets the I2C data line high. If it
1287 is false, it clears it (low).
c609719b 1288
b37c7e5e 1289 eg: #define I2C_SDA(bit) \
2535d602 1290 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 1291 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 1292
c609719b
WD
1293 I2C_SCL(bit)
1294
472d5460
YS
1295 If <bit> is true, sets the I2C clock line high. If it
1296 is false, it clears it (low).
c609719b 1297
b37c7e5e 1298 eg: #define I2C_SCL(bit) \
2535d602 1299 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 1300 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 1301
c609719b
WD
1302 I2C_DELAY
1303
1304 This delay is invoked four times per clock cycle so this
1305 controls the rate of data transfer. The data rate thus
b37c7e5e 1306 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
1307 like:
1308
b37c7e5e 1309 #define I2C_DELAY udelay(2)
c609719b 1310
793b5726
MF
1311 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1312
1313 If your arch supports the generic GPIO framework (asm/gpio.h),
1314 then you may alternatively define the two GPIOs that are to be
1315 used as SCL / SDA. Any of the previous I2C_xxx macros will
1316 have GPIO-based defaults assigned to them as appropriate.
1317
1318 You should define these to the GPIO value as given directly to
1319 the generic GPIO functions.
1320
6d0f6bcf 1321 CONFIG_SYS_I2C_INIT_BOARD
47cd00fa 1322
8bde7f77
WD
1323 When a board is reset during an i2c bus transfer
1324 chips might think that the current transfer is still
1325 in progress. On some boards it is possible to access
1326 the i2c SCLK line directly, either by using the
1327 processor pin as a GPIO or by having a second pin
1328 connected to the bus. If this option is defined a
1329 custom i2c_init_board() routine in boards/xxx/board.c
1330 is run early in the boot sequence.
47cd00fa 1331
bb99ad6d
BW
1332 CONFIG_I2C_MULTI_BUS
1333
1334 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
1335 must have a controller. At any point in time, only one bus is
1336 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
1337 Note that bus numbering is zero-based.
1338
6d0f6bcf 1339 CONFIG_SYS_I2C_NOPROBES
bb99ad6d
BW
1340
1341 This option specifies a list of I2C devices that will be skipped
c0f40859 1342 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
0f89c54b
PT
1343 is set, specify a list of bus-device pairs. Otherwise, specify
1344 a 1D array of device addresses
bb99ad6d
BW
1345
1346 e.g.
1347 #undef CONFIG_I2C_MULTI_BUS
c0f40859 1348 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
1349
1350 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1351
c0f40859 1352 #define CONFIG_I2C_MULTI_BUS
945a18e6 1353 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
bb99ad6d
BW
1354
1355 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1356
6d0f6bcf 1357 CONFIG_SYS_SPD_BUS_NUM
be5e6181
TT
1358
1359 If defined, then this indicates the I2C bus number for DDR SPD.
1360 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1361
6d0f6bcf 1362 CONFIG_SYS_RTC_BUS_NUM
0dc018ec
SR
1363
1364 If defined, then this indicates the I2C bus number for the RTC.
1365 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1366
2ac6985a
AD
1367 CONFIG_SOFT_I2C_READ_REPEATED_START
1368
1369 defining this will force the i2c_read() function in
1370 the soft_i2c driver to perform an I2C repeated start
1371 between writing the address pointer and reading the
1372 data. If this define is omitted the default behaviour
1373 of doing a stop-start sequence will be used. Most I2C
1374 devices can use either method, but some require one or
1375 the other.
be5e6181 1376
c609719b
WD
1377- SPI Support: CONFIG_SPI
1378
1379 Enables SPI driver (so far only tested with
1380 SPI EEPROM, also an instance works with Crystal A/D and
1381 D/As on the SACSng board)
1382
f659b573
HS
1383 CONFIG_SYS_SPI_MXC_WAIT
1384 Timeout for waiting until spi transfer completed.
1385 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1386
0133502e 1387- FPGA Support: CONFIG_FPGA
c609719b 1388
0133502e
MF
1389 Enables FPGA subsystem.
1390
1391 CONFIG_FPGA_<vendor>
1392
1393 Enables support for specific chip vendors.
1394 (ALTERA, XILINX)
c609719b 1395
0133502e 1396 CONFIG_FPGA_<family>
c609719b 1397
0133502e
MF
1398 Enables support for FPGA family.
1399 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1400
1401 CONFIG_FPGA_COUNT
1402
1403 Specify the number of FPGA devices to support.
c609719b 1404
6d0f6bcf 1405 CONFIG_SYS_FPGA_PROG_FEEDBACK
c609719b 1406
8bde7f77 1407 Enable printing of hash marks during FPGA configuration.
c609719b 1408
6d0f6bcf 1409 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 1410
43d9616c
WD
1411 Enable checks on FPGA configuration interface busy
1412 status by the configuration function. This option
1413 will require a board or device specific function to
1414 be written.
c609719b
WD
1415
1416 CONFIG_FPGA_DELAY
1417
1418 If defined, a function that provides delays in the FPGA
1419 configuration driver.
1420
6d0f6bcf 1421 CONFIG_SYS_FPGA_CHECK_CTRLC
c609719b
WD
1422 Allow Control-C to interrupt FPGA configuration
1423
6d0f6bcf 1424 CONFIG_SYS_FPGA_CHECK_ERROR
c609719b 1425
43d9616c
WD
1426 Check for configuration errors during FPGA bitfile
1427 loading. For example, abort during Virtex II
1428 configuration if the INIT_B line goes low (which
1429 indicated a CRC error).
c609719b 1430
6d0f6bcf 1431 CONFIG_SYS_FPGA_WAIT_INIT
c609719b 1432
b445bbb4
JM
1433 Maximum time to wait for the INIT_B line to de-assert
1434 after PROB_B has been de-asserted during a Virtex II
43d9616c 1435 FPGA configuration sequence. The default time is 500
11ccc33f 1436 ms.
c609719b 1437
6d0f6bcf 1438 CONFIG_SYS_FPGA_WAIT_BUSY
c609719b 1439
b445bbb4 1440 Maximum time to wait for BUSY to de-assert during
11ccc33f 1441 Virtex II FPGA configuration. The default is 5 ms.
c609719b 1442
6d0f6bcf 1443 CONFIG_SYS_FPGA_WAIT_CONFIG
c609719b 1444
43d9616c 1445 Time to wait after FPGA configuration. The default is
11ccc33f 1446 200 ms.
c609719b 1447
c609719b
WD
1448- Vendor Parameter Protection:
1449
43d9616c
WD
1450 U-Boot considers the values of the environment
1451 variables "serial#" (Board Serial Number) and
7152b1d0 1452 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
1453 are set once by the board vendor / manufacturer, and
1454 protects these variables from casual modification by
1455 the user. Once set, these variables are read-only,
1456 and write or delete attempts are rejected. You can
11ccc33f 1457 change this behaviour:
c609719b
WD
1458
1459 If CONFIG_ENV_OVERWRITE is #defined in your config
1460 file, the write protection for vendor parameters is
47cd00fa 1461 completely disabled. Anybody can change or delete
c609719b
WD
1462 these parameters.
1463
92ac5208
JH
1464 Alternatively, if you define _both_ an ethaddr in the
1465 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
11ccc33f 1466 Ethernet address is installed in the environment,
c609719b
WD
1467 which can be changed exactly ONCE by the user. [The
1468 serial# is unaffected by this, i. e. it remains
1469 read-only.]
1470
2598090b
JH
1471 The same can be accomplished in a more flexible way
1472 for any variable by configuring the type of access
1473 to allow for those variables in the ".flags" variable
1474 or define CONFIG_ENV_FLAGS_LIST_STATIC.
1475
c609719b
WD
1476- Protected RAM:
1477 CONFIG_PRAM
1478
1479 Define this variable to enable the reservation of
1480 "protected RAM", i. e. RAM which is not overwritten
1481 by U-Boot. Define CONFIG_PRAM to hold the number of
1482 kB you want to reserve for pRAM. You can overwrite
1483 this default value by defining an environment
1484 variable "pram" to the number of kB you want to
1485 reserve. Note that the board info structure will
1486 still show the full amount of RAM. If pRAM is
1487 reserved, a new environment variable "mem" will
1488 automatically be defined to hold the amount of
1489 remaining RAM in a form that can be passed as boot
1490 argument to Linux, for instance like that:
1491
fe126d8b 1492 setenv bootargs ... mem=\${mem}
c609719b
WD
1493 saveenv
1494
1495 This way you can tell Linux not to use this memory,
1496 either, which results in a memory region that will
1497 not be affected by reboots.
1498
1499 *WARNING* If your board configuration uses automatic
1500 detection of the RAM size, you must make sure that
1501 this memory test is non-destructive. So far, the
1502 following board configurations are known to be
1503 "pRAM-clean":
1504
5b8e76c3 1505 IVMS8, IVML24, SPD8xx,
1b0757ec 1506 HERMES, IP860, RPXlite, LWMON,
2eb48ff7 1507 FLAGADM
c609719b
WD
1508
1509- Error Recovery:
c609719b
WD
1510 Note:
1511
8bde7f77
WD
1512 In the current implementation, the local variables
1513 space and global environment variables space are
1514 separated. Local variables are those you define by
1515 simply typing `name=value'. To access a local
1516 variable later on, you have write `$name' or
1517 `${name}'; to execute the contents of a variable
1518 directly type `$name' at the command prompt.
c609719b 1519
43d9616c
WD
1520 Global environment variables are those you use
1521 setenv/printenv to work with. To run a command stored
1522 in such a variable, you need to use the run command,
1523 and you must not use the '$' sign to access them.
c609719b
WD
1524
1525 To store commands and special characters in a
1526 variable, please use double quotation marks
1527 surrounding the whole text of the variable, instead
1528 of the backslashes before semicolons and special
1529 symbols.
1530
a8c7c708 1531- Default Environment:
c609719b
WD
1532 CONFIG_EXTRA_ENV_SETTINGS
1533
43d9616c
WD
1534 Define this to contain any number of null terminated
1535 strings (variable = value pairs) that will be part of
7152b1d0 1536 the default environment compiled into the boot image.
2262cfee 1537
43d9616c
WD
1538 For example, place something like this in your
1539 board's config file:
c609719b
WD
1540
1541 #define CONFIG_EXTRA_ENV_SETTINGS \
1542 "myvar1=value1\0" \
1543 "myvar2=value2\0"
1544
43d9616c
WD
1545 Warning: This method is based on knowledge about the
1546 internal format how the environment is stored by the
1547 U-Boot code. This is NOT an official, exported
1548 interface! Although it is unlikely that this format
7152b1d0 1549 will change soon, there is no guarantee either.
c609719b
WD
1550 You better know what you are doing here.
1551
43d9616c
WD
1552 Note: overly (ab)use of the default environment is
1553 discouraged. Make sure to check other ways to preset
74de7aef 1554 the environment like the "source" command or the
43d9616c 1555 boot command first.
c609719b 1556
06fd8538
SG
1557 CONFIG_DELAY_ENVIRONMENT
1558
1559 Normally the environment is loaded when the board is
b445bbb4 1560 initialised so that it is available to U-Boot. This inhibits
06fd8538
SG
1561 that so that the environment is not available until
1562 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
1563 this is instead controlled by the value of
1564 /config/load-environment.
1565
4cf2609b
WD
1566 CONFIG_STANDALONE_LOAD_ADDR
1567
6feff899
WD
1568 This option defines a board specific value for the
1569 address where standalone program gets loaded, thus
1570 overwriting the architecture dependent default
4cf2609b
WD
1571 settings.
1572
1573- Frame Buffer Address:
1574 CONFIG_FB_ADDR
1575
1576 Define CONFIG_FB_ADDR if you want to use specific
44a53b57
WD
1577 address for frame buffer. This is typically the case
1578 when using a graphics controller has separate video
1579 memory. U-Boot will then place the frame buffer at
1580 the given address instead of dynamically reserving it
1581 in system RAM by calling lcd_setmem(), which grabs
1582 the memory for the frame buffer depending on the
1583 configured panel size.
4cf2609b
WD
1584
1585 Please see board_init_f function.
1586
cccfc2ab
DZ
1587- Automatic software updates via TFTP server
1588 CONFIG_UPDATE_TFTP
1589 CONFIG_UPDATE_TFTP_CNT_MAX
1590 CONFIG_UPDATE_TFTP_MSEC_MAX
1591
1592 These options enable and control the auto-update feature;
1593 for a more detailed description refer to doc/README.update.
1594
1595- MTD Support (mtdparts command, UBI support)
ff94bc40
HS
1596 CONFIG_MTD_UBI_WL_THRESHOLD
1597 This parameter defines the maximum difference between the highest
1598 erase counter value and the lowest erase counter value of eraseblocks
1599 of UBI devices. When this threshold is exceeded, UBI starts performing
1600 wear leveling by means of moving data from eraseblock with low erase
1601 counter to eraseblocks with high erase counter.
1602
1603 The default value should be OK for SLC NAND flashes, NOR flashes and
1604 other flashes which have eraseblock life-cycle 100000 or more.
1605 However, in case of MLC NAND flashes which typically have eraseblock
1606 life-cycle less than 10000, the threshold should be lessened (e.g.,
1607 to 128 or 256, although it does not have to be power of 2).
1608
1609 default: 4096
c654b517 1610
ff94bc40
HS
1611 CONFIG_MTD_UBI_BEB_LIMIT
1612 This option specifies the maximum bad physical eraseblocks UBI
1613 expects on the MTD device (per 1024 eraseblocks). If the
1614 underlying flash does not admit of bad eraseblocks (e.g. NOR
1615 flash), this value is ignored.
1616
1617 NAND datasheets often specify the minimum and maximum NVM
1618 (Number of Valid Blocks) for the flashes' endurance lifetime.
1619 The maximum expected bad eraseblocks per 1024 eraseblocks
1620 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
1621 which gives 20 for most NANDs (MaxNVB is basically the total
1622 count of eraseblocks on the chip).
1623
1624 To put it differently, if this value is 20, UBI will try to
1625 reserve about 1.9% of physical eraseblocks for bad blocks
1626 handling. And that will be 1.9% of eraseblocks on the entire
1627 NAND chip, not just the MTD partition UBI attaches. This means
1628 that if you have, say, a NAND flash chip admits maximum 40 bad
1629 eraseblocks, and it is split on two MTD partitions of the same
1630 size, UBI will reserve 40 eraseblocks when attaching a
1631 partition.
1632
1633 default: 20
1634
1635 CONFIG_MTD_UBI_FASTMAP
1636 Fastmap is a mechanism which allows attaching an UBI device
1637 in nearly constant time. Instead of scanning the whole MTD device it
1638 only has to locate a checkpoint (called fastmap) on the device.
1639 The on-flash fastmap contains all information needed to attach
1640 the device. Using fastmap makes only sense on large devices where
1641 attaching by scanning takes long. UBI will not automatically install
1642 a fastmap on old images, but you can set the UBI parameter
1643 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
1644 that fastmap-enabled images are still usable with UBI implementations
1645 without fastmap support. On typical flash devices the whole fastmap
1646 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
1647
1648 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
1649 Set this parameter to enable fastmap automatically on images
1650 without a fastmap.
1651 default: 0
1652
0195a7bb
HS
1653 CONFIG_MTD_UBI_FM_DEBUG
1654 Enable UBI fastmap debug
1655 default: 0
1656
6a11cf48 1657- SPL framework
04e5ae79
WD
1658 CONFIG_SPL
1659 Enable building of SPL globally.
6a11cf48 1660
6ebc3461
AA
1661 CONFIG_SPL_MAX_FOOTPRINT
1662 Maximum size in memory allocated to the SPL, BSS included.
1663 When defined, the linker checks that the actual memory
1664 used by SPL from _start to __bss_end does not exceed it.
8960af8b 1665 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1666 must not be both defined at the same time.
1667
95579793 1668 CONFIG_SPL_MAX_SIZE
6ebc3461
AA
1669 Maximum size of the SPL image (text, data, rodata, and
1670 linker lists sections), BSS excluded.
1671 When defined, the linker checks that the actual size does
1672 not exceed it.
95579793 1673
94a45bb1
SW
1674 CONFIG_SPL_RELOC_TEXT_BASE
1675 Address to relocate to. If unspecified, this is equal to
1676 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
1677
95579793
TR
1678 CONFIG_SPL_BSS_START_ADDR
1679 Link address for the BSS within the SPL binary.
1680
1681 CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1682 Maximum size in memory allocated to the SPL BSS.
1683 When defined, the linker checks that the actual memory used
1684 by SPL from __bss_start to __bss_end does not exceed it.
8960af8b 1685 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461 1686 must not be both defined at the same time.
95579793
TR
1687
1688 CONFIG_SPL_STACK
1689 Adress of the start of the stack SPL will use
1690
8c80eb3b
AA
1691 CONFIG_SPL_PANIC_ON_RAW_IMAGE
1692 When defined, SPL will panic() if the image it has
1693 loaded does not have a signature.
1694 Defining this is useful when code which loads images
1695 in SPL cannot guarantee that absolutely all read errors
1696 will be caught.
1697 An example is the LPC32XX MLC NAND driver, which will
1698 consider that a completely unreadable NAND block is bad,
1699 and thus should be skipped silently.
1700
94a45bb1
SW
1701 CONFIG_SPL_RELOC_STACK
1702 Adress of the start of the stack SPL will use after
1703 relocation. If unspecified, this is equal to
1704 CONFIG_SPL_STACK.
1705
95579793
TR
1706 CONFIG_SYS_SPL_MALLOC_START
1707 Starting address of the malloc pool used in SPL.
9ac4fc82
FE
1708 When this option is set the full malloc is used in SPL and
1709 it is set up by spl_init() and before that, the simple malloc()
1710 can be used if CONFIG_SYS_MALLOC_F is defined.
95579793
TR
1711
1712 CONFIG_SYS_SPL_MALLOC_SIZE
1713 The size of the malloc pool used in SPL.
6a11cf48 1714
861a86f4
TR
1715 CONFIG_SPL_DISPLAY_PRINT
1716 For ARM, enable an optional function to print more information
1717 about the running system.
1718
4b919725
SW
1719 CONFIG_SPL_INIT_MINIMAL
1720 Arch init code should be built for a very small image
1721
2b75b0ad
PK
1722 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
1723 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
1724 Sector and number of sectors to load kernel argument
1725 parameters from when MMC is being used in raw mode
1726 (for falcon mode)
1727
fae81c72
GG
1728 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
1729 Filename to read to load U-Boot when reading from filesystem
1730
1731 CONFIG_SPL_FS_LOAD_KERNEL_NAME
7ad2cc79 1732 Filename to read to load kernel uImage when reading
fae81c72 1733 from filesystem (for Falcon mode)
7ad2cc79 1734
fae81c72 1735 CONFIG_SPL_FS_LOAD_ARGS_NAME
7ad2cc79 1736 Filename to read to load kernel argument parameters
fae81c72 1737 when reading from filesystem (for Falcon mode)
7ad2cc79 1738
06f60ae3
SW
1739 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
1740 Set this for NAND SPL on PPC mpc83xx targets, so that
1741 start.S waits for the rest of the SPL to load before
1742 continuing (the hardware starts execution after just
1743 loading the first page rather than the full 4K).
1744
651fcf60
PK
1745 CONFIG_SPL_SKIP_RELOCATE
1746 Avoid SPL relocation
1747
6f4e7d3c
TG
1748 CONFIG_SPL_UBI
1749 Support for a lightweight UBI (fastmap) scanner and
1750 loader
1751
0c3117b1
HS
1752 CONFIG_SPL_NAND_RAW_ONLY
1753 Support to boot only raw u-boot.bin images. Use this only
1754 if you need to save space.
1755
7c8eea59
YZ
1756 CONFIG_SPL_COMMON_INIT_DDR
1757 Set for common ddr init with serial presence detect in
1758 SPL binary.
1759
95579793
TR
1760 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
1761 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
1762 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
1763 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
1764 CONFIG_SYS_NAND_ECCBYTES
1765 Defines the size and behavior of the NAND that SPL uses
7d4b7955 1766 to read U-Boot
95579793 1767
7d4b7955
SW
1768 CONFIG_SYS_NAND_U_BOOT_DST
1769 Location in memory to load U-Boot to
1770
1771 CONFIG_SYS_NAND_U_BOOT_SIZE
1772 Size of image to load
95579793
TR
1773
1774 CONFIG_SYS_NAND_U_BOOT_START
7d4b7955 1775 Entry point in loaded image to jump to
95579793
TR
1776
1777 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
1778 Define this if you need to first read the OOB and then the
b445bbb4 1779 data. This is used, for example, on davinci platforms.
95579793 1780
c57b953d
PM
1781 CONFIG_SPL_RAM_DEVICE
1782 Support for running image already present in ram, in SPL binary
6a11cf48 1783
74752baa 1784 CONFIG_SPL_PAD_TO
6113d3f2
BT
1785 Image offset to which the SPL should be padded before appending
1786 the SPL payload. By default, this is defined as
1787 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1788 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1789 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
74752baa 1790
ca2fca22
SW
1791 CONFIG_SPL_TARGET
1792 Final target image containing SPL and payload. Some SPLs
1793 use an arch-specific makefile fragment instead, for
1794 example if more than one image needs to be produced.
1795
b527b9c6 1796 CONFIG_SPL_FIT_PRINT
87ebee39
SG
1797 Printing information about a FIT image adds quite a bit of
1798 code to SPL. So this is normally disabled in SPL. Use this
1799 option to re-enable it. This will affect the output of the
1800 bootm command when booting a FIT image.
1801
3aa29de0
YZ
1802- TPL framework
1803 CONFIG_TPL
1804 Enable building of TPL globally.
1805
1806 CONFIG_TPL_PAD_TO
1807 Image offset to which the TPL should be padded before appending
1808 the TPL payload. By default, this is defined as
93e14596
WD
1809 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
1810 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
1811 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
3aa29de0 1812
a8c7c708
WD
1813- Interrupt support (PPC):
1814
d4ca31c4
WD
1815 There are common interrupt_init() and timer_interrupt()
1816 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 1817 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 1818 should set decrementer_count to appropriate value. If
11ccc33f 1819 CPU resets decrementer automatically after interrupt
d4ca31c4 1820 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 1821 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
1822 specific handling. If board has watchdog / status_led
1823 / other_activity_monitor it works automatically from
1824 general timer_interrupt().
a8c7c708 1825
c609719b 1826
9660e442
HR
1827Board initialization settings:
1828------------------------------
1829
1830During Initialization u-boot calls a number of board specific functions
1831to allow the preparation of board specific prerequisites, e.g. pin setup
1832before drivers are initialized. To enable these callbacks the
1833following configuration macros have to be defined. Currently this is
1834architecture specific, so please check arch/your_architecture/lib/board.c
1835typically in board_init_f() and board_init_r().
1836
1837- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
1838- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
1839- CONFIG_BOARD_LATE_INIT: Call board_late_init()
c609719b 1840
c609719b
WD
1841Configuration Settings:
1842-----------------------
1843
4d979bfd 1844- MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
4d1fd7f1
YS
1845 Optionally it can be defined to support 64-bit memory commands.
1846
6d0f6bcf 1847- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
1848 undefine this when you're short of memory.
1849
2fb2604d
PT
1850- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
1851 width of the commands listed in the 'help' command output.
1852
6d0f6bcf 1853- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
1854 prompt for user input.
1855
6d0f6bcf 1856- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
c609719b 1857
6d0f6bcf 1858- CONFIG_SYS_PBSIZE: Buffer size for Console output
c609719b 1859
6d0f6bcf 1860- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
c609719b 1861
6d0f6bcf 1862- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
c609719b
WD
1863 the application (usually a Linux kernel) when it is
1864 booted
1865
6d0f6bcf 1866- CONFIG_SYS_BAUDRATE_TABLE:
c609719b
WD
1867 List of legal baudrate settings for this board.
1868
e8149522 1869- CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 1870 Only implemented for ARMv8 for now.
e8149522
YS
1871 If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
1872 is substracted from total RAM and won't be reported to OS.
1873 This memory can be used as secure memory. A variable
e61a7534 1874 gd->arch.secure_ram is used to track the location. In systems
e8149522
YS
1875 the RAM base is not zero, or RAM is divided into banks,
1876 this variable needs to be recalcuated to get the address.
1877
6d0f6bcf 1878- CONFIG_SYS_LOADS_BAUD_CHANGE:
c609719b
WD
1879 Enable temporary baudrate change while serial download
1880
6d0f6bcf 1881- CONFIG_SYS_SDRAM_BASE:
c609719b
WD
1882 Physical start address of SDRAM. _Must_ be 0 here.
1883
6d0f6bcf 1884- CONFIG_SYS_FLASH_BASE:
c609719b
WD
1885 Physical start address of Flash memory.
1886
6d0f6bcf 1887- CONFIG_SYS_MONITOR_LEN:
8bde7f77
WD
1888 Size of memory reserved for monitor code, used to
1889 determine _at_compile_time_ (!) if the environment is
1890 embedded within the U-Boot image, or in a separate
1891 flash sector.
c609719b 1892
6d0f6bcf 1893- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
1894 Size of DRAM reserved for malloc() use.
1895
d59476b6
SG
1896- CONFIG_SYS_MALLOC_F_LEN
1897 Size of the malloc() pool for use before relocation. If
1898 this is defined, then a very simple malloc() implementation
1899 will become available before relocation. The address is just
1900 below the global data, and the stack is moved down to make
1901 space.
1902
1903 This feature allocates regions with increasing addresses
1904 within the region. calloc() is supported, but realloc()
1905 is not available. free() is supported but does nothing.
b445bbb4 1906 The memory will be freed (or in fact just forgotten) when
d59476b6
SG
1907 U-Boot relocates itself.
1908
38687ae6
SG
1909- CONFIG_SYS_MALLOC_SIMPLE
1910 Provides a simple and small malloc() and calloc() for those
1911 boards which do not use the full malloc in SPL (which is
1912 enabled with CONFIG_SYS_SPL_MALLOC_START).
1913
1dfdd9ba
TR
1914- CONFIG_SYS_NONCACHED_MEMORY:
1915 Size of non-cached memory area. This area of memory will be
1916 typically located right below the malloc() area and mapped
1917 uncached in the MMU. This is useful for drivers that would
1918 otherwise require a lot of explicit cache maintenance. For
1919 some drivers it's also impossible to properly maintain the
1920 cache. For example if the regions that need to be flushed
1921 are not a multiple of the cache-line size, *and* padding
1922 cannot be allocated between the regions to align them (i.e.
1923 if the HW requires a contiguous array of regions, and the
1924 size of each region is not cache-aligned), then a flush of
1925 one region may result in overwriting data that hardware has
1926 written to another region in the same cache-line. This can
1927 happen for example in network drivers where descriptors for
1928 buffers are typically smaller than the CPU cache-line (e.g.
1929 16 bytes vs. 32 or 64 bytes).
1930
1931 Non-cached memory is only supported on 32-bit ARM at present.
1932
6d0f6bcf 1933- CONFIG_SYS_BOOTM_LEN:
15940c9a
SR
1934 Normally compressed uImages are limited to an
1935 uncompressed size of 8 MBytes. If this is not enough,
6d0f6bcf 1936 you can define CONFIG_SYS_BOOTM_LEN in your board config file
15940c9a
SR
1937 to adjust this setting to your needs.
1938
6d0f6bcf 1939- CONFIG_SYS_BOOTMAPSZ:
c609719b
WD
1940 Maximum size of memory mapped by the startup code of
1941 the Linux kernel; all data that must be processed by
7d721e34
BS
1942 the Linux kernel (bd_info, boot arguments, FDT blob if
1943 used) must be put below this limit, unless "bootm_low"
1bce2aeb 1944 environment variable is defined and non-zero. In such case
7d721e34 1945 all data for the Linux kernel must be between "bootm_low"
c0f40859 1946 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
c3624e6e
GL
1947 variable "bootm_mapsize" will override the value of
1948 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
1949 then the value in "bootm_size" will be used instead.
c609719b 1950
fca43cc8
JR
1951- CONFIG_SYS_BOOT_RAMDISK_HIGH:
1952 Enable initrd_high functionality. If defined then the
1953 initrd_high feature is enabled and the bootm ramdisk subcommand
1954 is enabled.
1955
1956- CONFIG_SYS_BOOT_GET_CMDLINE:
1957 Enables allocating and saving kernel cmdline in space between
1958 "bootm_low" and "bootm_low" + BOOTMAPSZ.
1959
1960- CONFIG_SYS_BOOT_GET_KBD:
1961 Enables allocating and saving a kernel copy of the bd_info in
1962 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
1963
6d0f6bcf 1964- CONFIG_SYS_MAX_FLASH_SECT:
c609719b
WD
1965 Max number of sectors on a Flash chip
1966
6d0f6bcf 1967- CONFIG_SYS_FLASH_ERASE_TOUT:
c609719b
WD
1968 Timeout for Flash erase operations (in ms)
1969
6d0f6bcf 1970- CONFIG_SYS_FLASH_WRITE_TOUT:
c609719b
WD
1971 Timeout for Flash write operations (in ms)
1972
6d0f6bcf 1973- CONFIG_SYS_FLASH_LOCK_TOUT
8564acf9
WD
1974 Timeout for Flash set sector lock bit operation (in ms)
1975
6d0f6bcf 1976- CONFIG_SYS_FLASH_UNLOCK_TOUT
8564acf9
WD
1977 Timeout for Flash clear lock bits operation (in ms)
1978
6d0f6bcf 1979- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
1980 If defined, hardware flash sectors protection is used
1981 instead of U-Boot software protection.
1982
6d0f6bcf 1983- CONFIG_SYS_DIRECT_FLASH_TFTP:
c609719b
WD
1984
1985 Enable TFTP transfers directly to flash memory;
1986 without this option such a download has to be
1987 performed in two steps: (1) download to RAM, and (2)
1988 copy from RAM to flash.
1989
1990 The two-step approach is usually more reliable, since
1991 you can check if the download worked before you erase
11ccc33f
MZ
1992 the flash, but in some situations (when system RAM is
1993 too limited to allow for a temporary copy of the
c609719b
WD
1994 downloaded image) this option may be very useful.
1995
6d0f6bcf 1996- CONFIG_SYS_FLASH_CFI:
43d9616c 1997 Define if the flash driver uses extra elements in the
5653fc33
WD
1998 common flash structure for storing flash geometry.
1999
00b1883a 2000- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
2001 This option also enables the building of the cfi_flash driver
2002 in the drivers directory
c609719b 2003
91809ed5
PZ
2004- CONFIG_FLASH_CFI_MTD
2005 This option enables the building of the cfi_mtd driver
2006 in the drivers directory. The driver exports CFI flash
2007 to the MTD layer.
2008
6d0f6bcf 2009- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
2010 Use buffered writes to flash.
2011
2012- CONFIG_FLASH_SPANSION_S29WS_N
2013 s29ws-n MirrorBit flash has non-standard addresses for buffered
2014 write commands.
2015
6d0f6bcf 2016- CONFIG_SYS_FLASH_QUIET_TEST
5568e613
SR
2017 If this option is defined, the common CFI flash doesn't
2018 print it's warning upon not recognized FLASH banks. This
2019 is useful, if some of the configured banks are only
2020 optionally available.
2021
9a042e9c
JVB
2022- CONFIG_FLASH_SHOW_PROGRESS
2023 If defined (must be an integer), print out countdown
2024 digits and dots. Recommended value: 45 (9..1) for 80
2025 column displays, 15 (3..1) for 40 column displays.
2026
352ef3f1
SR
2027- CONFIG_FLASH_VERIFY
2028 If defined, the content of the flash (destination) is compared
2029 against the source after the write operation. An error message
2030 will be printed when the contents are not identical.
2031 Please note that this option is useless in nearly all cases,
2032 since such flash programming errors usually are detected earlier
2033 while unprotecting/erasing/programming. Please only enable
2034 this option if you really know what you are doing.
2035
ea882baf
WD
2036- CONFIG_ENV_MAX_ENTRIES
2037
071bc923
WD
2038 Maximum number of entries in the hash table that is used
2039 internally to store the environment settings. The default
2040 setting is supposed to be generous and should work in most
2041 cases. This setting can be used to tune behaviour; see
2042 lib/hashtable.c for details.
ea882baf 2043
2598090b
JH
2044- CONFIG_ENV_FLAGS_LIST_DEFAULT
2045- CONFIG_ENV_FLAGS_LIST_STATIC
1bce2aeb 2046 Enable validation of the values given to environment variables when
2598090b
JH
2047 calling env set. Variables can be restricted to only decimal,
2048 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
2049 the variables can also be restricted to IP address or MAC address.
2050
2051 The format of the list is:
2052 type_attribute = [s|d|x|b|i|m]
b445bbb4
JM
2053 access_attribute = [a|r|o|c]
2054 attributes = type_attribute[access_attribute]
2598090b
JH
2055 entry = variable_name[:attributes]
2056 list = entry[,list]
2057
2058 The type attributes are:
2059 s - String (default)
2060 d - Decimal
2061 x - Hexadecimal
2062 b - Boolean ([1yYtT|0nNfF])
2063 i - IP address
2064 m - MAC address
2065
267541f7
JH
2066 The access attributes are:
2067 a - Any (default)
2068 r - Read-only
2069 o - Write-once
2070 c - Change-default
2071
2598090b
JH
2072 - CONFIG_ENV_FLAGS_LIST_DEFAULT
2073 Define this to a list (string) to define the ".flags"
b445bbb4 2074 environment variable in the default or embedded environment.
2598090b
JH
2075
2076 - CONFIG_ENV_FLAGS_LIST_STATIC
2077 Define this to a list (string) to define validation that
2078 should be done if an entry is not found in the ".flags"
2079 environment variable. To override a setting in the static
2080 list, simply add an entry for the same variable name to the
2081 ".flags" variable.
2082
bdf1fe4e
JH
2083 If CONFIG_REGEX is defined, the variable_name above is evaluated as a
2084 regular expression. This allows multiple variables to define the same
2085 flags without explicitly listing them for each variable.
2086
c609719b
WD
2087The following definitions that deal with the placement and management
2088of environment data (variable area); in general, we support the
2089following configurations:
2090
c3eb3fe4
MF
2091- CONFIG_BUILD_ENVCRC:
2092
2093 Builds up envcrc with the target environment so that external utils
2094 may easily extract it and embed it in final U-Boot images.
2095
c609719b 2096BE CAREFUL! The first access to the environment happens quite early
b445bbb4 2097in U-Boot initialization (when we try to get the setting of for the
11ccc33f 2098console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
2099U-Boot will hang.
2100
2101Please note that even with NVRAM we still use a copy of the
2102environment in RAM: we could work on NVRAM directly, but we want to
2103keep settings there always unmodified except somebody uses "saveenv"
2104to save the current settings.
2105
0a85a9e7
LG
2106BE CAREFUL! For some special cases, the local device can not use
2107"saveenv" command. For example, the local device will get the
fc54c7fa
LG
2108environment stored in a remote NOR flash by SRIO or PCIE link,
2109but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 2110
b74ab737
GL
2111- CONFIG_NAND_ENV_DST
2112
2113 Defines address in RAM to which the nand_spl code should copy the
2114 environment. If redundant environment is used, it will be copied to
2115 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
2116
e881cb56 2117Please note that the environment is read-only until the monitor
c609719b 2118has been relocated to RAM and a RAM copy of the environment has been
00caae6d 2119created; also, when using EEPROM you will have to use env_get_f()
c609719b
WD
2120until then to read environment variables.
2121
85ec0bcc
WD
2122The environment is protected by a CRC32 checksum. Before the monitor
2123is relocated into RAM, as a result of a bad CRC you will be working
2124with the compiled-in default environment - *silently*!!! [This is
2125necessary, because the first environment variable we need is the
2126"baudrate" setting for the console - if we have a bad CRC, we don't
2127have any device yet where we could complain.]
c609719b
WD
2128
2129Note: once the monitor has been relocated, then it will complain if
2130the default environment is used; a new CRC is computed as soon as you
85ec0bcc 2131use the "saveenv" command to store a valid environment.
c609719b 2132
6d0f6bcf 2133- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 2134 MII address of the PHY to check for the Ethernet link state.
c609719b 2135
f5675aa5
RM
2136- CONFIG_NS16550_MIN_FUNCTIONS:
2137 Define this if you desire to only have use of the NS16550_init
2138 and NS16550_putc functions for the serial driver located at
2139 drivers/serial/ns16550.c. This option is useful for saving
2140 space for already greatly restricted images, including but not
2141 limited to NAND_SPL configurations.
2142
b2b92f53
SG
2143- CONFIG_DISPLAY_BOARDINFO
2144 Display information about the board that U-Boot is running on
2145 when U-Boot starts up. The board function checkboard() is called
2146 to do this.
2147
e2e3e2b1
SG
2148- CONFIG_DISPLAY_BOARDINFO_LATE
2149 Similar to the previous option, but display this information
2150 later, once stdio is running and output goes to the LCD, if
2151 present.
2152
c609719b 2153Low Level (hardware related) configuration options:
dc7c9a1a 2154---------------------------------------------------
c609719b 2155
6d0f6bcf 2156- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
2157 Cache Line Size of the CPU.
2158
e46fedfe
TT
2159- CONFIG_SYS_CCSRBAR_DEFAULT:
2160 Default (power-on reset) physical address of CCSR on Freescale
2161 PowerPC SOCs.
2162
2163- CONFIG_SYS_CCSRBAR:
2164 Virtual address of CCSR. On a 32-bit build, this is typically
2165 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
2166
e46fedfe
TT
2167- CONFIG_SYS_CCSRBAR_PHYS:
2168 Physical address of CCSR. CCSR can be relocated to a new
2169 physical address, if desired. In this case, this macro should
c0f40859 2170 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
2171 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
2172 is typically relocated on 36-bit builds. It is recommended
2173 that this macro be defined via the _HIGH and _LOW macros:
2174
2175 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
2176 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
2177
2178- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
4cf2609b
WD
2179 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
2180 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
2181 used in assembly code, so it must not contain typecasts or
2182 integer size suffixes (e.g. "ULL").
2183
2184- CONFIG_SYS_CCSRBAR_PHYS_LOW:
2185 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
2186 used in assembly code, so it must not contain typecasts or
2187 integer size suffixes (e.g. "ULL").
2188
2189- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
2190 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
2191 forced to a value that ensures that CCSR is not relocated.
2192
6d0f6bcf 2193- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 2194 DO NOT CHANGE unless you know exactly what you're
907208c4 2195 doing! (11-4) [MPC8xx systems only]
c609719b 2196
6d0f6bcf 2197- CONFIG_SYS_INIT_RAM_ADDR:
c609719b 2198
7152b1d0 2199 Start address of memory area that can be used for
c609719b
WD
2200 initial data and stack; please note that this must be
2201 writable memory that is working WITHOUT special
2202 initialization, i. e. you CANNOT use normal RAM which
2203 will become available only after programming the
2204 memory controller and running certain initialization
2205 sequences.
2206
2207 U-Boot uses the following memory types:
907208c4 2208 - MPC8xx: IMMR (internal memory of the CPU)
c609719b 2209
6d0f6bcf 2210- CONFIG_SYS_GBL_DATA_OFFSET:
c609719b
WD
2211
2212 Offset of the initial data structure in the memory
6d0f6bcf
JCPV
2213 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
2214 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
c609719b 2215 data is located at the end of the available space
553f0982 2216 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
acd51f9d 2217 GENERATED_GBL_DATA_SIZE), and the initial stack is just
6d0f6bcf
JCPV
2218 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
2219 CONFIG_SYS_GBL_DATA_OFFSET) downward.
c609719b
WD
2220
2221 Note:
2222 On the MPC824X (or other systems that use the data
2223 cache for initial memory) the address chosen for
6d0f6bcf 2224 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
c609719b
WD
2225 point to an otherwise UNUSED address space between
2226 the top of RAM and the start of the PCI space.
2227
6d0f6bcf 2228- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 2229
6d0f6bcf 2230- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
2231 SDRAM timing
2232
6d0f6bcf 2233- CONFIG_SYS_MAMR_PTA:
c609719b
WD
2234 periodic timer for refresh
2235
a09b9b68
KG
2236- CONFIG_SYS_SRIO:
2237 Chip has SRIO or not
2238
2239- CONFIG_SRIO1:
2240 Board has SRIO 1 port available
2241
2242- CONFIG_SRIO2:
2243 Board has SRIO 2 port available
2244
c8b28152
LG
2245- CONFIG_SRIO_PCIE_BOOT_MASTER
2246 Board can support master function for Boot from SRIO and PCIE
2247
a09b9b68
KG
2248- CONFIG_SYS_SRIOn_MEM_VIRT:
2249 Virtual Address of SRIO port 'n' memory region
2250
62f9b654 2251- CONFIG_SYS_SRIOn_MEM_PHYxS:
a09b9b68
KG
2252 Physical Address of SRIO port 'n' memory region
2253
2254- CONFIG_SYS_SRIOn_MEM_SIZE:
2255 Size of SRIO port 'n' memory region
2256
66bd1846
FE
2257- CONFIG_SYS_NAND_BUSWIDTH_16BIT
2258 Defined to tell the NAND controller that the NAND chip is using
2259 a 16 bit bus.
2260 Not all NAND drivers use this symbol.
a430e916 2261 Example of drivers that use it:
a430fa06
MR
2262 - drivers/mtd/nand/raw/ndfc.c
2263 - drivers/mtd/nand/raw/mxc_nand.c
eced4626
AW
2264
2265- CONFIG_SYS_NDFC_EBC0_CFG
2266 Sets the EBC0_CFG register for the NDFC. If not defined
2267 a default value will be used.
2268
bb99ad6d 2269- CONFIG_SPD_EEPROM
218ca724
WD
2270 Get DDR timing information from an I2C EEPROM. Common
2271 with pluggable memory modules such as SODIMMs
2272
bb99ad6d
BW
2273 SPD_EEPROM_ADDRESS
2274 I2C address of the SPD EEPROM
2275
6d0f6bcf 2276- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
2277 If SPD EEPROM is on an I2C bus other than the first
2278 one, specify here. Note that the value must resolve
2279 to something your driver can deal with.
bb99ad6d 2280
1b3e3c4f
YS
2281- CONFIG_SYS_DDR_RAW_TIMING
2282 Get DDR timing information from other than SPD. Common with
2283 soldered DDR chips onboard without SPD. DDR raw timing
2284 parameters are extracted from datasheet and hard-coded into
2285 header files or board specific files.
2286
6f5e1dc5
YS
2287- CONFIG_FSL_DDR_INTERACTIVE
2288 Enable interactive DDR debugging. See doc/README.fsl-ddr.
2289
e32d59a2
YS
2290- CONFIG_FSL_DDR_SYNC_REFRESH
2291 Enable sync of refresh for multiple controllers.
2292
4516ff81
YS
2293- CONFIG_FSL_DDR_BIST
2294 Enable built-in memory test for Freescale DDR controllers.
2295
6d0f6bcf 2296- CONFIG_SYS_83XX_DDR_USES_CS0
218ca724
WD
2297 Only for 83xx systems. If specified, then DDR should
2298 be configured using CS0 and CS1 instead of CS2 and CS3.
2ad6b513 2299
c26e454d
WD
2300- CONFIG_RMII
2301 Enable RMII mode for all FECs.
2302 Note that this is a global option, we can't
2303 have one FEC in standard MII mode and another in RMII mode.
2304
5cf91d6b
WD
2305- CONFIG_CRC32_VERIFY
2306 Add a verify option to the crc32 command.
2307 The syntax is:
2308
2309 => crc32 -v <address> <count> <crc32>
2310
2311 Where address/count indicate a memory area
2312 and crc32 is the correct crc32 which the
2313 area should have.
2314
56523f12
WD
2315- CONFIG_LOOPW
2316 Add the "loopw" memory command. This only takes effect if
493f420e 2317 the memory commands are activated globally (CONFIG_CMD_MEMORY).
56523f12 2318
72732318 2319- CONFIG_CMD_MX_CYCLIC
7b466641
SR
2320 Add the "mdc" and "mwc" memory commands. These are cyclic
2321 "md/mw" commands.
2322 Examples:
2323
efe2a4d5 2324 => mdc.b 10 4 500
7b466641
SR
2325 This command will print 4 bytes (10,11,12,13) each 500 ms.
2326
efe2a4d5 2327 => mwc.l 100 12345678 10
7b466641
SR
2328 This command will write 12345678 to address 100 all 10 ms.
2329
efe2a4d5 2330 This only takes effect if the memory commands are activated
493f420e 2331 globally (CONFIG_CMD_MEMORY).
7b466641 2332
401bb30b 2333- CONFIG_SPL_BUILD
32f2ca2a
TH
2334 Set when the currently-running compilation is for an artifact
2335 that will end up in the SPL (as opposed to the TPL or U-Boot
2336 proper). Code that needs stage-specific behavior should check
2337 this.
400558b5 2338
3aa29de0 2339- CONFIG_TPL_BUILD
32f2ca2a
TH
2340 Set when the currently-running compilation is for an artifact
2341 that will end up in the TPL (as opposed to the SPL or U-Boot
2342 proper). Code that needs stage-specific behavior should check
2343 this.
3aa29de0 2344
5df572f0
YZ
2345- CONFIG_SYS_MPC85XX_NO_RESETVEC
2346 Only for 85xx systems. If this variable is specified, the section
2347 .resetvec is not kept and the section .bootpg is placed in the
2348 previous 4k of the .text section.
2349
4213fc29
SG
2350- CONFIG_ARCH_MAP_SYSMEM
2351 Generally U-Boot (and in particular the md command) uses
2352 effective address. It is therefore not necessary to regard
2353 U-Boot address as virtual addresses that need to be translated
2354 to physical addresses. However, sandbox requires this, since
2355 it maintains its own little RAM buffer which contains all
2356 addressable memory. This option causes some memory accesses
2357 to be mapped through map_sysmem() / unmap_sysmem().
2358
588a13f7
SG
2359- CONFIG_X86_RESET_VECTOR
2360 If defined, the x86 reset vector code is included. This is not
2361 needed when U-Boot is running from Coreboot.
b16f521a 2362
999d7d32
KM
2363- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
2364 Option to disable subpage write in NAND driver
2365 driver that uses this:
a430fa06 2366 drivers/mtd/nand/raw/davinci_nand.c
999d7d32 2367
f2717b47
TT
2368Freescale QE/FMAN Firmware Support:
2369-----------------------------------
2370
2371The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
2372loading of "firmware", which is encoded in the QE firmware binary format.
2373This firmware often needs to be loaded during U-Boot booting, so macros
2374are used to identify the storage device (NOR flash, SPI, etc) and the address
2375within that device.
2376
dcf1d774
ZQ
2377- CONFIG_SYS_FMAN_FW_ADDR
2378 The address in the storage device where the FMAN microcode is located. The
cc1e98b5 2379 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
dcf1d774
ZQ
2380 is also specified.
2381
2382- CONFIG_SYS_QE_FW_ADDR
2383 The address in the storage device where the QE microcode is located. The
cc1e98b5 2384 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
f2717b47
TT
2385 is also specified.
2386
2387- CONFIG_SYS_QE_FMAN_FW_LENGTH
2388 The maximum possible size of the firmware. The firmware binary format
2389 has a field that specifies the actual size of the firmware, but it
2390 might not be possible to read any part of the firmware unless some
2391 local storage is allocated to hold the entire firmware first.
2392
2393- CONFIG_SYS_QE_FMAN_FW_IN_NOR
2394 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
2395 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
2396 virtual address in NOR flash.
2397
2398- CONFIG_SYS_QE_FMAN_FW_IN_NAND
2399 Specifies that QE/FMAN firmware is located in NAND flash.
2400 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
2401
2402- CONFIG_SYS_QE_FMAN_FW_IN_MMC
2403 Specifies that QE/FMAN firmware is located on the primary SD/MMC
2404 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
2405
292dc6c5
LG
2406- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
2407 Specifies that QE/FMAN firmware is located in the remote (master)
2408 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
2409 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
2410 window->master inbound window->master LAW->the ucode address in
2411 master's memory space.
f2717b47 2412
b940ca64
GR
2413Freescale Layerscape Management Complex Firmware Support:
2414---------------------------------------------------------
2415The Freescale Layerscape Management Complex (MC) supports the loading of
2416"firmware".
2417This firmware often needs to be loaded during U-Boot booting, so macros
2418are used to identify the storage device (NOR flash, SPI, etc) and the address
2419within that device.
2420
2421- CONFIG_FSL_MC_ENET
2422 Enable the MC driver for Layerscape SoCs.
2423
5c055089
PK
2424Freescale Layerscape Debug Server Support:
2425-------------------------------------------
2426The Freescale Layerscape Debug Server Support supports the loading of
2427"Debug Server firmware" and triggering SP boot-rom.
2428This firmware often needs to be loaded during U-Boot booting.
2429
c0492141
YS
2430- CONFIG_SYS_MC_RSV_MEM_ALIGN
2431 Define alignment of reserved memory MC requires
5c055089 2432
f3f431a7
PK
2433Reproducible builds
2434-------------------
2435
2436In order to achieve reproducible builds, timestamps used in the U-Boot build
2437process have to be set to a fixed value.
2438
2439This is done using the SOURCE_DATE_EPOCH environment variable.
2440SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
2441option for U-Boot or an environment variable in U-Boot.
2442
2443SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
2444
c609719b
WD
2445Building the Software:
2446======================
2447
218ca724
WD
2448Building U-Boot has been tested in several native build environments
2449and in many different cross environments. Of course we cannot support
2450all possibly existing versions of cross development tools in all
2451(potentially obsolete) versions. In case of tool chain problems we
047f6ec0 2452recommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK)
218ca724 2453which is extensively used to build and test U-Boot.
c609719b 2454
218ca724
WD
2455If you are not using a native environment, it is assumed that you
2456have GNU cross compiling tools available in your path. In this case,
2457you must set the environment variable CROSS_COMPILE in your shell.
2458Note that no changes to the Makefile or any other source files are
2459necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 2460
218ca724
WD
2461 $ CROSS_COMPILE=ppc_4xx-
2462 $ export CROSS_COMPILE
c609719b 2463
218ca724
WD
2464U-Boot is intended to be simple to build. After installing the
2465sources you must configure U-Boot for one specific board type. This
c609719b
WD
2466is done by typing:
2467
ab584d67 2468 make NAME_defconfig
c609719b 2469
ab584d67 2470where "NAME_defconfig" is the name of one of the existing configu-
ecb3a0a1 2471rations; see configs/*_defconfig for supported names.
db01a2ea 2472
ecb3a0a1 2473Note: for some boards special configuration names may exist; check if
2729af9d
WD
2474 additional information is available from the board vendor; for
2475 instance, the TQM823L systems are available without (standard)
2476 or with LCD support. You can select such additional "features"
11ccc33f 2477 when choosing the configuration, i. e.
2729af9d 2478
ab584d67 2479 make TQM823L_defconfig
2729af9d
WD
2480 - will configure for a plain TQM823L, i. e. no LCD support
2481
ab584d67 2482 make TQM823L_LCD_defconfig
2729af9d
WD
2483 - will configure for a TQM823L with U-Boot console on LCD
2484
2485 etc.
2486
2487
2488Finally, type "make all", and you should get some working U-Boot
2489images ready for download to / installation on your system:
2490
2491- "u-boot.bin" is a raw binary image
2492- "u-boot" is an image in ELF binary format
2493- "u-boot.srec" is in Motorola S-Record format
2494
baf31249
MB
2495By default the build is performed locally and the objects are saved
2496in the source directory. One of the two methods can be used to change
2497this behavior and build U-Boot to some external directory:
2498
24991. Add O= to the make command line invocations:
2500
2501 make O=/tmp/build distclean
ab584d67 2502 make O=/tmp/build NAME_defconfig
baf31249
MB
2503 make O=/tmp/build all
2504
adbba996 25052. Set environment variable KBUILD_OUTPUT to point to the desired location:
baf31249 2506
adbba996 2507 export KBUILD_OUTPUT=/tmp/build
baf31249 2508 make distclean
ab584d67 2509 make NAME_defconfig
baf31249
MB
2510 make all
2511
adbba996 2512Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
baf31249
MB
2513variable.
2514
215bb1c1
DS
2515User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
2516setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
2517For example to treat all compiler warnings as errors:
2518
2519 make KCFLAGS=-Werror
2729af9d
WD
2520
2521Please be aware that the Makefiles assume you are using GNU make, so
2522for instance on NetBSD you might need to use "gmake" instead of
2523native "make".
2524
2525
2526If the system board that you have is not listed, then you will need
2527to port U-Boot to your hardware platform. To do this, follow these
2528steps:
2529
3c1496cd 25301. Create a new directory to hold your board specific code. Add any
2729af9d 2531 files you need. In your board directory, you will need at least
3c1496cd
PS
2532 the "Makefile" and a "<board>.c".
25332. Create a new configuration file "include/configs/<board>.h" for
2534 your board.
2729af9d
WD
25353. If you're porting U-Boot to a new CPU, then also create a new
2536 directory to hold your CPU specific code. Add any files you need.
ab584d67 25374. Run "make <board>_defconfig" with your new name.
2729af9d
WD
25385. Type "make", and you should get a working "u-boot.srec" file
2539 to be installed on your target system.
25406. Debug and solve any problems that might arise.
2541 [Of course, this last step is much harder than it sounds.]
2542
2543
2544Testing of U-Boot Modifications, Ports to New Hardware, etc.:
2545==============================================================
2546
218ca724
WD
2547If you have modified U-Boot sources (for instance added a new board
2548or support for new devices, a new CPU, etc.) you are expected to
2729af9d 2549provide feedback to the other developers. The feedback normally takes
32f2ca2a 2550the form of a "patch", i.e. a context diff against a certain (latest
218ca724 2551official or latest in the git repository) version of U-Boot sources.
2729af9d 2552
218ca724
WD
2553But before you submit such a patch, please verify that your modifi-
2554cation did not break existing code. At least make sure that *ALL* of
2729af9d 2555the supported boards compile WITHOUT ANY compiler warnings. To do so,
6de80f21
SG
2556just run the buildman script (tools/buildman/buildman), which will
2557configure and build U-Boot for ALL supported system. Be warned, this
2558will take a while. Please see the buildman README, or run 'buildman -H'
2559for documentation.
baf31249
MB
2560
2561
2729af9d
WD
2562See also "U-Boot Porting Guide" below.
2563
2564
2565Monitor Commands - Overview:
2566============================
2567
2568go - start application at address 'addr'
2569run - run commands in an environment variable
2570bootm - boot application image from memory
2571bootp - boot image via network using BootP/TFTP protocol
44f074c7 2572bootz - boot zImage from memory
2729af9d
WD
2573tftpboot- boot image via network using TFTP protocol
2574 and env variables "ipaddr" and "serverip"
2575 (and eventually "gatewayip")
1fb7cd49 2576tftpput - upload a file via network using TFTP protocol
2729af9d
WD
2577rarpboot- boot image via network using RARP/TFTP protocol
2578diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
2579loads - load S-Record file over serial line
2580loadb - load binary file over serial line (kermit mode)
2581md - memory display
2582mm - memory modify (auto-incrementing)
2583nm - memory modify (constant address)
2584mw - memory write (fill)
bdded201 2585ms - memory search
2729af9d
WD
2586cp - memory copy
2587cmp - memory compare
2588crc32 - checksum calculation
0f89c54b 2589i2c - I2C sub-system
2729af9d
WD
2590sspi - SPI utility commands
2591base - print or set address offset
2592printenv- print environment variables
9e9a530a 2593pwm - control pwm channels
2729af9d
WD
2594setenv - set environment variables
2595saveenv - save environment variables to persistent storage
2596protect - enable or disable FLASH write protection
2597erase - erase FLASH memory
2598flinfo - print FLASH memory information
10635afa 2599nand - NAND memory operations (see doc/README.nand)
2729af9d
WD
2600bdinfo - print Board Info structure
2601iminfo - print header information for application image
2602coninfo - print console devices and informations
2603ide - IDE sub-system
2604loop - infinite loop on address range
56523f12 2605loopw - infinite write loop on address range
2729af9d
WD
2606mtest - simple RAM test
2607icache - enable or disable instruction cache
2608dcache - enable or disable data cache
2609reset - Perform RESET of the CPU
2610echo - echo args to console
2611version - print monitor version
2612help - print online help
2613? - alias for 'help'
2614
2615
2616Monitor Commands - Detailed Description:
2617========================================
2618
2619TODO.
2620
2621For now: just type "help <command>".
2622
2623
2729af9d
WD
2624Note for Redundant Ethernet Interfaces:
2625=======================================
c609719b 2626
11ccc33f 2627Some boards come with redundant Ethernet interfaces; U-Boot supports
2729af9d
WD
2628such configurations and is capable of automatic selection of a
2629"working" interface when needed. MAC assignment works as follows:
c609719b 2630
2729af9d
WD
2631Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
2632MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
2633"eth1addr" (=>eth1), "eth2addr", ...
c609719b 2634
2729af9d
WD
2635If the network interface stores some valid MAC address (for instance
2636in SROM), this is used as default address if there is NO correspon-
2637ding setting in the environment; if the corresponding environment
2638variable is set, this overrides the settings in the card; that means:
c609719b 2639
2729af9d
WD
2640o If the SROM has a valid MAC address, and there is no address in the
2641 environment, the SROM's address is used.
c609719b 2642
2729af9d
WD
2643o If there is no valid address in the SROM, and a definition in the
2644 environment exists, then the value from the environment variable is
2645 used.
c609719b 2646
2729af9d
WD
2647o If both the SROM and the environment contain a MAC address, and
2648 both addresses are the same, this MAC address is used.
c609719b 2649
2729af9d
WD
2650o If both the SROM and the environment contain a MAC address, and the
2651 addresses differ, the value from the environment is used and a
2652 warning is printed.
c609719b 2653
2729af9d 2654o If neither SROM nor the environment contain a MAC address, an error
bef1014b
JH
2655 is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
2656 a random, locally-assigned MAC is used.
c609719b 2657
ecee9324 2658If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 2659will be programmed into hardware as part of the initialization process. This
ecee9324
BW
2660may be skipped by setting the appropriate 'ethmacskip' environment variable.
2661The naming convention is as follows:
2662"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 2663
2729af9d
WD
2664Image Formats:
2665==============
c609719b 2666
3310c549
MB
2667U-Boot is capable of booting (and performing other auxiliary operations on)
2668images in two formats:
2669
2670New uImage format (FIT)
2671-----------------------
2672
2673Flexible and powerful format based on Flattened Image Tree -- FIT (similar
2674to Flattened Device Tree). It allows the use of images with multiple
2675components (several kernels, ramdisks, etc.), with contents protected by
2676SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
2677
2678
2679Old uImage format
2680-----------------
2681
2682Old image format is based on binary files which can be basically anything,
2683preceded by a special header; see the definitions in include/image.h for
2684details; basically, the header defines the following image properties:
c609719b 2685
2729af9d
WD
2686* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
2687 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39 2688 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
0797e736 2689 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
daab59ac 2690* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
11232139
TR
2691 IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
2692 Currently supported: ARM, Intel x86, MIPS, Nios II, PowerPC).
2729af9d
WD
2693* Compression Type (uncompressed, gzip, bzip2)
2694* Load Address
2695* Entry Point
2696* Image Name
2697* Image Timestamp
c609719b 2698
2729af9d
WD
2699The header is marked by a special Magic Number, and both the header
2700and the data portions of the image are secured against corruption by
2701CRC32 checksums.
c609719b
WD
2702
2703
2729af9d
WD
2704Linux Support:
2705==============
c609719b 2706
2729af9d
WD
2707Although U-Boot should support any OS or standalone application
2708easily, the main focus has always been on Linux during the design of
2709U-Boot.
c609719b 2710
2729af9d
WD
2711U-Boot includes many features that so far have been part of some
2712special "boot loader" code within the Linux kernel. Also, any
2713"initrd" images to be used are no longer part of one big Linux image;
2714instead, kernel and "initrd" are separate images. This implementation
2715serves several purposes:
c609719b 2716
2729af9d
WD
2717- the same features can be used for other OS or standalone
2718 applications (for instance: using compressed images to reduce the
2719 Flash memory footprint)
c609719b 2720
2729af9d
WD
2721- it becomes much easier to port new Linux kernel versions because
2722 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 2723
2729af9d
WD
2724- the same Linux kernel image can now be used with different "initrd"
2725 images; of course this also means that different kernel images can
2726 be run with the same "initrd". This makes testing easier (you don't
2727 have to build a new "zImage.initrd" Linux image when you just
2728 change a file in your "initrd"). Also, a field-upgrade of the
2729 software is easier now.
c609719b 2730
c609719b 2731
2729af9d
WD
2732Linux HOWTO:
2733============
c609719b 2734
2729af9d
WD
2735Porting Linux to U-Boot based systems:
2736---------------------------------------
c609719b 2737
2729af9d
WD
2738U-Boot cannot save you from doing all the necessary modifications to
2739configure the Linux device drivers for use with your target hardware
2740(no, we don't intend to provide a full virtual machine interface to
2741Linux :-).
c609719b 2742
a47a12be 2743But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 2744
2729af9d
WD
2745Just make sure your machine specific header file (for instance
2746include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
2747Information structure as we define in include/asm-<arch>/u-boot.h,
2748and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 2749as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 2750
2eb31b13
SG
2751Note that U-Boot now has a driver model, a unified model for drivers.
2752If you are adding a new driver, plumb it into driver model. If there
2753is no uclass available, you are encouraged to create one. See
2754doc/driver-model.
2755
c609719b 2756
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WD
2757Configuring the Linux kernel:
2758-----------------------------
c609719b 2759
2729af9d
WD
2760No specific requirements for U-Boot. Make sure you have some root
2761device (initial ramdisk, NFS) for your target system.
2762
2763
2764Building a Linux Image:
2765-----------------------
c609719b 2766
2729af9d
WD
2767With U-Boot, "normal" build targets like "zImage" or "bzImage" are
2768not used. If you use recent kernel source, a new build target
2769"uImage" will exist which automatically builds an image usable by
2770U-Boot. Most older kernels also have support for a "pImage" target,
2771which was introduced for our predecessor project PPCBoot and uses a
2772100% compatible format.
2773
2774Example:
2775
ab584d67 2776 make TQM850L_defconfig
2729af9d
WD
2777 make oldconfig
2778 make dep
2779 make uImage
2780
2781The "uImage" build target uses a special tool (in 'tools/mkimage') to
2782encapsulate a compressed Linux kernel image with header information,
2783CRC32 checksum etc. for use with U-Boot. This is what we are doing:
2784
2785* build a standard "vmlinux" kernel image (in ELF binary format):
2786
2787* convert the kernel into a raw binary image:
2788
2789 ${CROSS_COMPILE}-objcopy -O binary \
2790 -R .note -R .comment \
2791 -S vmlinux linux.bin
2792
2793* compress the binary image:
2794
2795 gzip -9 linux.bin
2796
2797* package compressed binary image for U-Boot:
2798
2799 mkimage -A ppc -O linux -T kernel -C gzip \
2800 -a 0 -e 0 -n "Linux Kernel Image" \
2801 -d linux.bin.gz uImage
c609719b 2802
c609719b 2803
2729af9d
WD
2804The "mkimage" tool can also be used to create ramdisk images for use
2805with U-Boot, either separated from the Linux kernel image, or
2806combined into one file. "mkimage" encapsulates the images with a 64
2807byte header containing information about target architecture,
2808operating system, image type, compression method, entry points, time
2809stamp, CRC32 checksums, etc.
2810
2811"mkimage" can be called in two ways: to verify existing images and
2812print the header information, or to build new images.
2813
2814In the first form (with "-l" option) mkimage lists the information
2815contained in the header of an existing U-Boot image; this includes
2816checksum verification:
c609719b 2817
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WD
2818 tools/mkimage -l image
2819 -l ==> list image header information
2820
2821The second form (with "-d" option) is used to build a U-Boot image
2822from a "data file" which is used as image payload:
2823
2824 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
2825 -n name -d data_file image
2826 -A ==> set architecture to 'arch'
2827 -O ==> set operating system to 'os'
2828 -T ==> set image type to 'type'
2829 -C ==> set compression type 'comp'
2830 -a ==> set load address to 'addr' (hex)
2831 -e ==> set entry point to 'ep' (hex)
2832 -n ==> set image name to 'name'
2833 -d ==> use image data from 'datafile'
2834
69459791
WD
2835Right now, all Linux kernels for PowerPC systems use the same load
2836address (0x00000000), but the entry point address depends on the
2837kernel version:
2729af9d
WD
2838
2839- 2.2.x kernels have the entry point at 0x0000000C,
2840- 2.3.x and later kernels have the entry point at 0x00000000.
2841
2842So a typical call to build a U-Boot image would read:
2843
2844 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2845 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 2846 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
2729af9d
WD
2847 > examples/uImage.TQM850L
2848 Image Name: 2.4.4 kernel for TQM850L
2849 Created: Wed Jul 19 02:34:59 2000
2850 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2851 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2852 Load Address: 0x00000000
2853 Entry Point: 0x00000000
2854
2855To verify the contents of the image (or check for corruption):
2856
2857 -> tools/mkimage -l examples/uImage.TQM850L
2858 Image Name: 2.4.4 kernel for TQM850L
2859 Created: Wed Jul 19 02:34:59 2000
2860 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2861 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
2862 Load Address: 0x00000000
2863 Entry Point: 0x00000000
2864
2865NOTE: for embedded systems where boot time is critical you can trade
2866speed for memory and install an UNCOMPRESSED image instead: this
2867needs more space in Flash, but boots much faster since it does not
2868need to be uncompressed:
2869
a47a12be 2870 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
2871 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
2872 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 2873 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
2729af9d
WD
2874 > examples/uImage.TQM850L-uncompressed
2875 Image Name: 2.4.4 kernel for TQM850L
2876 Created: Wed Jul 19 02:34:59 2000
2877 Image Type: PowerPC Linux Kernel Image (uncompressed)
2878 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
2879 Load Address: 0x00000000
2880 Entry Point: 0x00000000
2881
2882
2883Similar you can build U-Boot images from a 'ramdisk.image.gz' file
2884when your kernel is intended to use an initial ramdisk:
2885
2886 -> tools/mkimage -n 'Simple Ramdisk Image' \
2887 > -A ppc -O linux -T ramdisk -C gzip \
2888 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
2889 Image Name: Simple Ramdisk Image
2890 Created: Wed Jan 12 14:01:50 2000
2891 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
2892 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
2893 Load Address: 0x00000000
2894 Entry Point: 0x00000000
2895
e157a111
TH
2896The "dumpimage" tool can be used to disassemble or list the contents of images
2897built by mkimage. See dumpimage's help output (-h) for details.
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WD
2898
2899Installing a Linux Image:
2900-------------------------
2901
2902To downloading a U-Boot image over the serial (console) interface,
2903you must convert the image to S-Record format:
2904
2905 objcopy -I binary -O srec examples/image examples/image.srec
2906
2907The 'objcopy' does not understand the information in the U-Boot
2908image header, so the resulting S-Record file will be relative to
2909address 0x00000000. To load it to a given address, you need to
2910specify the target address as 'offset' parameter with the 'loads'
2911command.
2912
2913Example: install the image to address 0x40100000 (which on the
2914TQM8xxL is in the first Flash bank):
2915
2916 => erase 40100000 401FFFFF
2917
2918 .......... done
2919 Erased 8 sectors
2920
2921 => loads 40100000
2922 ## Ready for S-Record download ...
2923 ~>examples/image.srec
2924 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
2925 ...
2926 15989 15990 15991 15992
2927 [file transfer complete]
2928 [connected]
2929 ## Start Addr = 0x00000000
2930
2931
2932You can check the success of the download using the 'iminfo' command;
218ca724 2933this includes a checksum verification so you can be sure no data
2729af9d
WD
2934corruption happened:
2935
2936 => imi 40100000
2937
2938 ## Checking Image at 40100000 ...
2939 Image Name: 2.2.13 for initrd on TQM850L
2940 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2941 Data Size: 335725 Bytes = 327 kB = 0 MB
2942 Load Address: 00000000
2943 Entry Point: 0000000c
2944 Verifying Checksum ... OK
2945
2946
2947Boot Linux:
2948-----------
2949
2950The "bootm" command is used to boot an application that is stored in
2951memory (RAM or Flash). In case of a Linux kernel image, the contents
2952of the "bootargs" environment variable is passed to the kernel as
2953parameters. You can check and modify this variable using the
2954"printenv" and "setenv" commands:
2955
2956
2957 => printenv bootargs
2958 bootargs=root=/dev/ram
2959
2960 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2961
2962 => printenv bootargs
2963 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2964
2965 => bootm 40020000
2966 ## Booting Linux kernel at 40020000 ...
2967 Image Name: 2.2.13 for NFS on TQM850L
2968 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2969 Data Size: 381681 Bytes = 372 kB = 0 MB
2970 Load Address: 00000000
2971 Entry Point: 0000000c
2972 Verifying Checksum ... OK
2973 Uncompressing Kernel Image ... OK
2974 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
2975 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
2976 time_init: decrementer frequency = 187500000/60
2977 Calibrating delay loop... 49.77 BogoMIPS
2978 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
2979 ...
2980
11ccc33f 2981If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
2982the memory addresses of both the kernel and the initrd image (PPBCOOT
2983format!) to the "bootm" command:
2984
2985 => imi 40100000 40200000
2986
2987 ## Checking Image at 40100000 ...
2988 Image Name: 2.2.13 for initrd on TQM850L
2989 Image Type: PowerPC Linux Kernel Image (gzip compressed)
2990 Data Size: 335725 Bytes = 327 kB = 0 MB
2991 Load Address: 00000000
2992 Entry Point: 0000000c
2993 Verifying Checksum ... OK
2994
2995 ## Checking Image at 40200000 ...
2996 Image Name: Simple Ramdisk Image
2997 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
2998 Data Size: 566530 Bytes = 553 kB = 0 MB
2999 Load Address: 00000000
3000 Entry Point: 00000000
3001 Verifying Checksum ... OK
3002
3003 => bootm 40100000 40200000
3004 ## Booting Linux kernel at 40100000 ...
3005 Image Name: 2.2.13 for initrd on TQM850L
3006 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3007 Data Size: 335725 Bytes = 327 kB = 0 MB
3008 Load Address: 00000000
3009 Entry Point: 0000000c
3010 Verifying Checksum ... OK
3011 Uncompressing Kernel Image ... OK
3012 ## Loading RAMDisk Image at 40200000 ...
3013 Image Name: Simple Ramdisk Image
3014 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3015 Data Size: 566530 Bytes = 553 kB = 0 MB
3016 Load Address: 00000000
3017 Entry Point: 00000000
3018 Verifying Checksum ... OK
3019 Loading Ramdisk ... OK
3020 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
3021 Boot arguments: root=/dev/ram
3022 time_init: decrementer frequency = 187500000/60
3023 Calibrating delay loop... 49.77 BogoMIPS
3024 ...
3025 RAMDISK: Compressed image found at block 0
3026 VFS: Mounted root (ext2 filesystem).
3027
3028 bash#
3029
0267768e
MM
3030Boot Linux and pass a flat device tree:
3031-----------
3032
3033First, U-Boot must be compiled with the appropriate defines. See the section
3034titled "Linux Kernel Interface" above for a more in depth explanation. The
3035following is an example of how to start a kernel and pass an updated
3036flat device tree:
3037
3038=> print oftaddr
3039oftaddr=0x300000
3040=> print oft
3041oft=oftrees/mpc8540ads.dtb
3042=> tftp $oftaddr $oft
3043Speed: 1000, full duplex
3044Using TSEC0 device
3045TFTP from server 192.168.1.1; our IP address is 192.168.1.101
3046Filename 'oftrees/mpc8540ads.dtb'.
3047Load address: 0x300000
3048Loading: #
3049done
3050Bytes transferred = 4106 (100a hex)
3051=> tftp $loadaddr $bootfile
3052Speed: 1000, full duplex
3053Using TSEC0 device
3054TFTP from server 192.168.1.1; our IP address is 192.168.1.2
3055Filename 'uImage'.
3056Load address: 0x200000
3057Loading:############
3058done
3059Bytes transferred = 1029407 (fb51f hex)
3060=> print loadaddr
3061loadaddr=200000
3062=> print oftaddr
3063oftaddr=0x300000
3064=> bootm $loadaddr - $oftaddr
3065## Booting image at 00200000 ...
a9398e01
WD
3066 Image Name: Linux-2.6.17-dirty
3067 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3068 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 3069 Load Address: 00000000
a9398e01 3070 Entry Point: 00000000
0267768e
MM
3071 Verifying Checksum ... OK
3072 Uncompressing Kernel Image ... OK
3073Booting using flat device tree at 0x300000
3074Using MPC85xx ADS machine description
3075Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
3076[snip]
3077
3078
2729af9d
WD
3079More About U-Boot Image Types:
3080------------------------------
3081
3082U-Boot supports the following image types:
3083
3084 "Standalone Programs" are directly runnable in the environment
3085 provided by U-Boot; it is expected that (if they behave
3086 well) you can continue to work in U-Boot after return from
3087 the Standalone Program.
3088 "OS Kernel Images" are usually images of some Embedded OS which
3089 will take over control completely. Usually these programs
3090 will install their own set of exception handlers, device
3091 drivers, set up the MMU, etc. - this means, that you cannot
3092 expect to re-enter U-Boot except by resetting the CPU.
3093 "RAMDisk Images" are more or less just data blocks, and their
3094 parameters (address, size) are passed to an OS kernel that is
3095 being started.
3096 "Multi-File Images" contain several images, typically an OS
3097 (Linux) kernel image and one or more data images like
3098 RAMDisks. This construct is useful for instance when you want
3099 to boot over the network using BOOTP etc., where the boot
3100 server provides just a single image file, but you want to get
3101 for instance an OS kernel and a RAMDisk image.
3102
3103 "Multi-File Images" start with a list of image sizes, each
3104 image size (in bytes) specified by an "uint32_t" in network
3105 byte order. This list is terminated by an "(uint32_t)0".
3106 Immediately after the terminating 0 follow the images, one by
3107 one, all aligned on "uint32_t" boundaries (size rounded up to
3108 a multiple of 4 bytes).
3109
3110 "Firmware Images" are binary images containing firmware (like
3111 U-Boot or FPGA images) which usually will be programmed to
3112 flash memory.
3113
3114 "Script files" are command sequences that will be executed by
3115 U-Boot's command interpreter; this feature is especially
3116 useful when you configure U-Boot to use a real shell (hush)
3117 as command interpreter.
3118
44f074c7
MV
3119Booting the Linux zImage:
3120-------------------------
3121
3122On some platforms, it's possible to boot Linux zImage. This is done
3123using the "bootz" command. The syntax of "bootz" command is the same
3124as the syntax of "bootm" command.
3125
8ac28563 3126Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
3127kernel with raw initrd images. The syntax is slightly different, the
3128address of the initrd must be augmented by it's size, in the following
3129format: "<initrd addres>:<initrd size>".
3130
2729af9d
WD
3131
3132Standalone HOWTO:
3133=================
3134
3135One of the features of U-Boot is that you can dynamically load and
3136run "standalone" applications, which can use some resources of
3137U-Boot like console I/O functions or interrupt services.
3138
3139Two simple examples are included with the sources:
3140
3141"Hello World" Demo:
3142-------------------
3143
3144'examples/hello_world.c' contains a small "Hello World" Demo
3145application; it is automatically compiled when you build U-Boot.
3146It's configured to run at address 0x00040004, so you can play with it
3147like that:
3148
3149 => loads
3150 ## Ready for S-Record download ...
3151 ~>examples/hello_world.srec
3152 1 2 3 4 5 6 7 8 9 10 11 ...
3153 [file transfer complete]
3154 [connected]
3155 ## Start Addr = 0x00040004
3156
3157 => go 40004 Hello World! This is a test.
3158 ## Starting application at 0x00040004 ...
3159 Hello World
3160 argc = 7
3161 argv[0] = "40004"
3162 argv[1] = "Hello"
3163 argv[2] = "World!"
3164 argv[3] = "This"
3165 argv[4] = "is"
3166 argv[5] = "a"
3167 argv[6] = "test."
3168 argv[7] = "<NULL>"
3169 Hit any key to exit ...
3170
3171 ## Application terminated, rc = 0x0
3172
3173Another example, which demonstrates how to register a CPM interrupt
3174handler with the U-Boot code, can be found in 'examples/timer.c'.
3175Here, a CPM timer is set up to generate an interrupt every second.
3176The interrupt service routine is trivial, just printing a '.'
3177character, but this is just a demo program. The application can be
3178controlled by the following keys:
3179
3180 ? - print current values og the CPM Timer registers
3181 b - enable interrupts and start timer
3182 e - stop timer and disable interrupts
3183 q - quit application
3184
3185 => loads
3186 ## Ready for S-Record download ...
3187 ~>examples/timer.srec
3188 1 2 3 4 5 6 7 8 9 10 11 ...
3189 [file transfer complete]
3190 [connected]
3191 ## Start Addr = 0x00040004
3192
3193 => go 40004
3194 ## Starting application at 0x00040004 ...
3195 TIMERS=0xfff00980
3196 Using timer 1
3197 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
3198
3199Hit 'b':
3200 [q, b, e, ?] Set interval 1000000 us
3201 Enabling timer
3202Hit '?':
3203 [q, b, e, ?] ........
3204 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
3205Hit '?':
3206 [q, b, e, ?] .
3207 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
3208Hit '?':
3209 [q, b, e, ?] .
3210 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
3211Hit '?':
3212 [q, b, e, ?] .
3213 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
3214Hit 'e':
3215 [q, b, e, ?] ...Stopping timer
3216Hit 'q':
3217 [q, b, e, ?] ## Application terminated, rc = 0x0
3218
3219
3220Minicom warning:
3221================
3222
3223Over time, many people have reported problems when trying to use the
3224"minicom" terminal emulation program for serial download. I (wd)
3225consider minicom to be broken, and recommend not to use it. Under
3226Unix, I recommend to use C-Kermit for general purpose use (and
3227especially for kermit binary protocol download ("loadb" command), and
e53515a2 3228use "cu" for S-Record download ("loads" command). See
047f6ec0 3229https://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
e53515a2
KP
3230for help with kermit.
3231
2729af9d
WD
3232
3233Nevertheless, if you absolutely want to use it try adding this
3234configuration to your "File transfer protocols" section:
3235
3236 Name Program Name U/D FullScr IO-Red. Multi
3237 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
3238 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
3239
3240
3241NetBSD Notes:
3242=============
3243
3244Starting at version 0.9.2, U-Boot supports NetBSD both as host
3245(build U-Boot) and target system (boots NetBSD/mpc8xx).
3246
3247Building requires a cross environment; it is known to work on
3248NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
3249need gmake since the Makefiles are not compatible with BSD make).
3250Note that the cross-powerpc package does not install include files;
3251attempting to build U-Boot will fail because <machine/ansi.h> is
3252missing. This file has to be installed and patched manually:
3253
3254 # cd /usr/pkg/cross/powerpc-netbsd/include
3255 # mkdir powerpc
3256 # ln -s powerpc machine
3257 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
3258 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
3259
3260Native builds *don't* work due to incompatibilities between native
3261and U-Boot include files.
3262
3263Booting assumes that (the first part of) the image booted is a
3264stage-2 loader which in turn loads and then invokes the kernel
3265proper. Loader sources will eventually appear in the NetBSD source
3266tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
2a8af187 3267meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
2729af9d
WD
3268
3269
3270Implementation Internals:
3271=========================
3272
3273The following is not intended to be a complete description of every
3274implementation detail. However, it should help to understand the
3275inner workings of U-Boot and make it easier to port it to custom
3276hardware.
3277
3278
3279Initial Stack, Global Data:
3280---------------------------
3281
3282The implementation of U-Boot is complicated by the fact that U-Boot
3283starts running out of ROM (flash memory), usually without access to
3284system RAM (because the memory controller is not initialized yet).
3285This means that we don't have writable Data or BSS segments, and BSS
3286is not initialized as zero. To be able to get a C environment working
3287at all, we have to allocate at least a minimal stack. Implementation
3288options for this are defined and restricted by the CPU used: Some CPU
3289models provide on-chip memory (like the IMMR area on MPC8xx and
3290MPC826x processors), on others (parts of) the data cache can be
3291locked as (mis-) used as memory, etc.
3292
218ca724 3293 Chris Hallinan posted a good summary of these issues to the
0668236b 3294 U-Boot mailing list:
2729af9d
WD
3295
3296 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
3297 From: "Chris Hallinan" <[email protected]>
3298 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
3299 ...
3300
3301 Correct me if I'm wrong, folks, but the way I understand it
3302 is this: Using DCACHE as initial RAM for Stack, etc, does not
3303 require any physical RAM backing up the cache. The cleverness
3304 is that the cache is being used as a temporary supply of
3305 necessary storage before the SDRAM controller is setup. It's
11ccc33f 3306 beyond the scope of this list to explain the details, but you
2729af9d
WD
3307 can see how this works by studying the cache architecture and
3308 operation in the architecture and processor-specific manuals.
3309
3310 OCM is On Chip Memory, which I believe the 405GP has 4K. It
3311 is another option for the system designer to use as an
11ccc33f 3312 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
3313 option should work for you. Using CS 4 should be fine if your
3314 board designers haven't used it for something that would
3315 cause you grief during the initial boot! It is frequently not
3316 used.
3317
6d0f6bcf 3318 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
3319 with your processor/board/system design. The default value
3320 you will find in any recent u-boot distribution in
8a316c9b 3321 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
3322 than your SDRAM module. If you have a 64MB SDRAM module, set
3323 it above 400_0000. Just make sure your board has no resources
3324 that are supposed to respond to that address! That code in
3325 start.S has been around a while and should work as is when
3326 you get the config right.
3327
3328 -Chris Hallinan
3329 DS4.COM, Inc.
3330
3331It is essential to remember this, since it has some impact on the C
3332code for the initialization procedures:
3333
3334* Initialized global data (data segment) is read-only. Do not attempt
3335 to write it.
3336
b445bbb4 3337* Do not use any uninitialized global data (or implicitly initialized
2729af9d
WD
3338 as zero data - BSS segment) at all - this is undefined, initiali-
3339 zation is performed later (when relocating to RAM).
3340
3341* Stack space is very limited. Avoid big data buffers or things like
3342 that.
3343
3344Having only the stack as writable memory limits means we cannot use
b445bbb4 3345normal global data to share information between the code. But it
2729af9d
WD
3346turned out that the implementation of U-Boot can be greatly
3347simplified by making a global data structure (gd_t) available to all
3348functions. We could pass a pointer to this data as argument to _all_
3349functions, but this would bloat the code. Instead we use a feature of
3350the GCC compiler (Global Register Variables) to share the data: we
3351place a pointer (gd) to the global data into a register which we
3352reserve for this purpose.
3353
3354When choosing a register for such a purpose we are restricted by the
3355relevant (E)ABI specifications for the current architecture, and by
3356GCC's implementation.
3357
3358For PowerPC, the following registers have specific use:
3359 R1: stack pointer
e7670f6c 3360 R2: reserved for system use
2729af9d
WD
3361 R3-R4: parameter passing and return values
3362 R5-R10: parameter passing
3363 R13: small data area pointer
3364 R30: GOT pointer
3365 R31: frame pointer
3366
e6bee808
JT
3367 (U-Boot also uses R12 as internal GOT pointer. r12
3368 is a volatile register so r12 needs to be reset when
3369 going back and forth between asm and C)
2729af9d 3370
e7670f6c 3371 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
3372
3373 Note: on PPC, we could use a static initializer (since the
3374 address of the global data structure is known at compile time),
3375 but it turned out that reserving a register results in somewhat
3376 smaller code - although the code savings are not that big (on
3377 average for all boards 752 bytes for the whole U-Boot image,
3378 624 text + 127 data).
3379
3380On ARM, the following registers are used:
3381
3382 R0: function argument word/integer result
3383 R1-R3: function argument word
12eba1b4
JH
3384 R9: platform specific
3385 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
3386 R11: argument (frame) pointer
3387 R12: temporary workspace
3388 R13: stack pointer
3389 R14: link register
3390 R15: program counter
3391
12eba1b4
JH
3392 ==> U-Boot will use R9 to hold a pointer to the global data
3393
3394 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 3395
0df01fd3 3396On Nios II, the ABI is documented here:
047f6ec0 3397 https://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
0df01fd3
TC
3398
3399 ==> U-Boot will use gp to hold a pointer to the global data
3400
3401 Note: on Nios II, we give "-G0" option to gcc and don't use gp
3402 to access small data sections, so gp is free.
3403
3fafced7
RC
3404On RISC-V, the following registers are used:
3405
3406 x0: hard-wired zero (zero)
3407 x1: return address (ra)
3408 x2: stack pointer (sp)
3409 x3: global pointer (gp)
3410 x4: thread pointer (tp)
3411 x5: link register (t0)
3412 x8: frame pointer (fp)
3413 x10-x11: arguments/return values (a0-1)
3414 x12-x17: arguments (a2-7)
3415 x28-31: temporaries (t3-6)
3416 pc: program counter (pc)
3417
3418 ==> U-Boot will use gp to hold a pointer to the global data
3419
2729af9d
WD
3420Memory Management:
3421------------------
3422
3423U-Boot runs in system state and uses physical addresses, i.e. the
3424MMU is not used either for address mapping nor for memory protection.
3425
3426The available memory is mapped to fixed addresses using the memory
3427controller. In this process, a contiguous block is formed for each
3428memory type (Flash, SDRAM, SRAM), even when it consists of several
3429physical memory banks.
3430
3431U-Boot is installed in the first 128 kB of the first Flash bank (on
3432TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
3433booting and sizing and initializing DRAM, the code relocates itself
3434to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 3435memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
3436configuration setting]. Below that, a structure with global Board
3437Info data is placed, followed by the stack (growing downward).
3438
3439Additionally, some exception handler code is copied to the low 8 kB
3440of DRAM (0x00000000 ... 0x00001FFF).
3441
3442So a typical memory configuration with 16 MB of DRAM could look like
3443this:
3444
3445 0x0000 0000 Exception Vector code
3446 :
3447 0x0000 1FFF
3448 0x0000 2000 Free for Application Use
3449 :
3450 :
3451
3452 :
3453 :
3454 0x00FB FF20 Monitor Stack (Growing downward)
3455 0x00FB FFAC Board Info Data and permanent copy of global data
3456 0x00FC 0000 Malloc Arena
3457 :
3458 0x00FD FFFF
3459 0x00FE 0000 RAM Copy of Monitor Code
3460 ... eventually: LCD or video framebuffer
3461 ... eventually: pRAM (Protected RAM - unchanged by reset)
3462 0x00FF FFFF [End of RAM]
3463
3464
3465System Initialization:
3466----------------------
c609719b 3467
2729af9d 3468In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 3469(on most PowerPC systems at address 0x00000100). Because of the reset
b445bbb4 3470configuration for CS0# this is a mirror of the on board Flash memory.
2729af9d
WD
3471To be able to re-map memory U-Boot then jumps to its link address.
3472To be able to implement the initialization code in C, a (small!)
3473initial stack is set up in the internal Dual Ported RAM (in case CPUs
2eb48ff7
HS
3474which provide such a feature like), or in a locked part of the data
3475cache. After that, U-Boot initializes the CPU core, the caches and
3476the SIU.
2729af9d
WD
3477
3478Next, all (potentially) available memory banks are mapped using a
3479preliminary mapping. For example, we put them on 512 MB boundaries
3480(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
3481on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
3482programmed for SDRAM access. Using the temporary configuration, a
3483simple memory test is run that determines the size of the SDRAM
3484banks.
3485
3486When there is more than one SDRAM bank, and the banks are of
3487different size, the largest is mapped first. For equal size, the first
3488bank (CS2#) is mapped first. The first mapping is always for address
34890x00000000, with any additional banks following immediately to create
3490contiguous memory starting from 0.
3491
3492Then, the monitor installs itself at the upper end of the SDRAM area
3493and allocates memory for use by malloc() and for the global Board
3494Info data; also, the exception vector code is copied to the low RAM
3495pages, and the final stack is set up.
3496
3497Only after this relocation will you have a "normal" C environment;
3498until that you are restricted in several ways, mostly because you are
3499running from ROM, and because the code will have to be relocated to a
3500new address in RAM.
3501
3502
3503U-Boot Porting Guide:
3504----------------------
c609719b 3505
2729af9d
WD
3506[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
3507list, October 2002]
c609719b
WD
3508
3509
6c3fef28 3510int main(int argc, char *argv[])
2729af9d
WD
3511{
3512 sighandler_t no_more_time;
c609719b 3513
6c3fef28
JVB
3514 signal(SIGALRM, no_more_time);
3515 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
c609719b 3516
2729af9d 3517 if (available_money > available_manpower) {
6c3fef28 3518 Pay consultant to port U-Boot;
c609719b
WD
3519 return 0;
3520 }
3521
2729af9d
WD
3522 Download latest U-Boot source;
3523
0668236b 3524 Subscribe to u-boot mailing list;
2729af9d 3525
6c3fef28
JVB
3526 if (clueless)
3527 email("Hi, I am new to U-Boot, how do I get started?");
2729af9d
WD
3528
3529 while (learning) {
3530 Read the README file in the top level directory;
047f6ec0 3531 Read https://www.denx.de/wiki/bin/view/DULG/Manual;
24bcaec7 3532 Read applicable doc/README.*;
2729af9d 3533 Read the source, Luke;
6c3fef28 3534 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
2729af9d
WD
3535 }
3536
6c3fef28
JVB
3537 if (available_money > toLocalCurrency ($2500))
3538 Buy a BDI3000;
3539 else
2729af9d 3540 Add a lot of aggravation and time;
2729af9d 3541
6c3fef28
JVB
3542 if (a similar board exists) { /* hopefully... */
3543 cp -a board/<similar> board/<myboard>
3544 cp include/configs/<similar>.h include/configs/<myboard>.h
3545 } else {
3546 Create your own board support subdirectory;
3547 Create your own board include/configs/<myboard>.h file;
3548 }
3549 Edit new board/<myboard> files
3550 Edit new include/configs/<myboard>.h
3551
3552 while (!accepted) {
3553 while (!running) {
3554 do {
3555 Add / modify source code;
3556 } until (compiles);
3557 Debug;
3558 if (clueless)
3559 email("Hi, I am having problems...");
3560 }
3561 Send patch file to the U-Boot email list;
3562 if (reasonable critiques)
3563 Incorporate improvements from email list code review;
3564 else
3565 Defend code as written;
2729af9d 3566 }
2729af9d
WD
3567
3568 return 0;
3569}
3570
3571void no_more_time (int sig)
3572{
3573 hire_a_guru();
3574}
3575
c609719b 3576
2729af9d
WD
3577Coding Standards:
3578-----------------
c609719b 3579
2729af9d 3580All contributions to U-Boot should conform to the Linux kernel
659208da
BS
3581coding style; see the kernel coding style guide at
3582https://www.kernel.org/doc/html/latest/process/coding-style.html, and the
3583script "scripts/Lindent" in your Linux kernel source directory.
2c051651
DZ
3584
3585Source files originating from a different project (for example the
3586MTD subsystem) are generally exempt from these guidelines and are not
b445bbb4 3587reformatted to ease subsequent migration to newer versions of those
2c051651
DZ
3588sources.
3589
3590Please note that U-Boot is implemented in C (and to some small parts in
3591Assembler); no C++ is used, so please do not use C++ style comments (//)
3592in your code.
c609719b 3593
2729af9d
WD
3594Please also stick to the following formatting rules:
3595- remove any trailing white space
7ca9296e 3596- use TAB characters for indentation and vertical alignment, not spaces
2729af9d 3597- make sure NOT to use DOS '\r\n' line feeds
7ca9296e 3598- do not add more than 2 consecutive empty lines to source files
2729af9d 3599- do not add trailing empty lines to source files
180d3f74 3600
2729af9d
WD
3601Submissions which do not conform to the standards may be returned
3602with a request to reformat the changes.
c609719b
WD
3603
3604
2729af9d
WD
3605Submitting Patches:
3606-------------------
c609719b 3607
2729af9d
WD
3608Since the number of patches for U-Boot is growing, we need to
3609establish some rules. Submissions which do not conform to these rules
3610may be rejected, even when they contain important and valuable stuff.
c609719b 3611
047f6ec0 3612Please see https://www.denx.de/wiki/U-Boot/Patches for details.
218ca724 3613
0668236b 3614Patches shall be sent to the u-boot mailing list <[email protected]>;
1dade18e 3615see https://lists.denx.de/listinfo/u-boot
0668236b 3616
2729af9d
WD
3617When you send a patch, please include the following information with
3618it:
c609719b 3619
2729af9d
WD
3620* For bug fixes: a description of the bug and how your patch fixes
3621 this bug. Please try to include a way of demonstrating that the
3622 patch actually fixes something.
c609719b 3623
2729af9d
WD
3624* For new features: a description of the feature and your
3625 implementation.
c609719b 3626
7207b366
RD
3627* For major contributions, add a MAINTAINERS file with your
3628 information and associated file and directory references.
c609719b 3629
27af930e
AA
3630* When you add support for a new board, don't forget to add a
3631 maintainer e-mail address to the boards.cfg file, too.
c609719b 3632
2729af9d
WD
3633* If your patch adds new configuration options, don't forget to
3634 document these in the README file.
c609719b 3635
218ca724
WD
3636* The patch itself. If you are using git (which is *strongly*
3637 recommended) you can easily generate the patch using the
7ca9296e 3638 "git format-patch". If you then use "git send-email" to send it to
218ca724
WD
3639 the U-Boot mailing list, you will avoid most of the common problems
3640 with some other mail clients.
3641
3642 If you cannot use git, use "diff -purN OLD NEW". If your version of
3643 diff does not support these options, then get the latest version of
3644 GNU diff.
c609719b 3645
218ca724
WD
3646 The current directory when running this command shall be the parent
3647 directory of the U-Boot source tree (i. e. please make sure that
3648 your patch includes sufficient directory information for the
3649 affected files).
6dff5529 3650
218ca724
WD
3651 We prefer patches as plain text. MIME attachments are discouraged,
3652 and compressed attachments must not be used.
c609719b 3653
2729af9d
WD
3654* If one logical set of modifications affects or creates several
3655 files, all these changes shall be submitted in a SINGLE patch file.
52f52c14 3656
2729af9d
WD
3657* Changesets that contain different, unrelated modifications shall be
3658 submitted as SEPARATE patches, one patch per changeset.
8bde7f77 3659
52f52c14 3660
2729af9d 3661Notes:
c609719b 3662
6de80f21 3663* Before sending the patch, run the buildman script on your patched
2729af9d
WD
3664 source tree and make sure that no errors or warnings are reported
3665 for any of the boards.
c609719b 3666
2729af9d
WD
3667* Keep your modifications to the necessary minimum: A patch
3668 containing several unrelated changes or arbitrary reformats will be
3669 returned with a request to re-formatting / split it.
c609719b 3670
2729af9d
WD
3671* If you modify existing code, make sure that your new code does not
3672 add to the memory footprint of the code ;-) Small is beautiful!
3673 When adding new features, these should compile conditionally only
3674 (using #ifdef), and the resulting code with the new feature
3675 disabled must not need more memory than the old code without your
3676 modification.
90dc6704 3677
0668236b
WD
3678* Remember that there is a size limit of 100 kB per message on the
3679 u-boot mailing list. Bigger patches will be moderated. If they are
3680 reasonable and not too big, they will be acknowledged. But patches
3681 bigger than the size limit should be avoided.
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