]>
Commit | Line | Data |
---|---|---|
83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
6173c45b TR |
2 | /* |
3 | * Copyright (C) 2014 NVIDIA Corporation | |
6173c45b TR |
4 | */ |
5 | ||
6 | #define pr_fmt(fmt) "as3722: " fmt | |
7 | ||
8 | #include <common.h> | |
9 | #include <dm.h> | |
10 | #include <errno.h> | |
11 | #include <fdtdec.h> | |
12 | #include <i2c.h> | |
f7ae49fc | 13 | #include <log.h> |
e3f44f5c | 14 | #include <dm/lists.h> |
6173c45b | 15 | #include <power/as3722.h> |
e3f44f5c | 16 | #include <power/pmic.h> |
6173c45b | 17 | |
e3f44f5c | 18 | #define AS3722_NUM_OF_REGS 0x92 |
6173c45b | 19 | |
e3f44f5c | 20 | static int as3722_read(struct udevice *dev, uint reg, uint8_t *buff, int len) |
6173c45b | 21 | { |
e3f44f5c | 22 | int ret; |
6173c45b | 23 | |
e3f44f5c SG |
24 | ret = dm_i2c_read(dev, reg, buff, len); |
25 | if (ret < 0) | |
26 | return ret; | |
6173c45b TR |
27 | |
28 | return 0; | |
29 | } | |
30 | ||
e3f44f5c SG |
31 | static int as3722_write(struct udevice *dev, uint reg, const uint8_t *buff, |
32 | int len) | |
6173c45b | 33 | { |
e3f44f5c | 34 | int ret; |
6173c45b | 35 | |
e3f44f5c SG |
36 | ret = dm_i2c_write(dev, reg, buff, len); |
37 | if (ret < 0) | |
38 | return ret; | |
6173c45b TR |
39 | |
40 | return 0; | |
41 | } | |
42 | ||
e3f44f5c | 43 | static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp) |
6173c45b | 44 | { |
e3f44f5c | 45 | int ret; |
6173c45b | 46 | |
e3f44f5c SG |
47 | ret = pmic_reg_read(dev, AS3722_ASIC_ID1); |
48 | if (ret < 0) { | |
c83c436d | 49 | pr_err("failed to read ID1 register: %d\n", ret); |
e3f44f5c | 50 | return ret; |
6173c45b | 51 | } |
e3f44f5c | 52 | *idp = ret; |
6173c45b | 53 | |
e3f44f5c SG |
54 | ret = pmic_reg_read(dev, AS3722_ASIC_ID2); |
55 | if (ret < 0) { | |
c83c436d | 56 | pr_err("failed to read ID2 register: %d\n", ret); |
e3f44f5c | 57 | return ret; |
6173c45b | 58 | } |
e3f44f5c | 59 | *revisionp = ret; |
6173c45b TR |
60 | |
61 | return 0; | |
62 | } | |
63 | ||
e3f44f5c SG |
64 | /* TODO([email protected]): Add proper regulator support to avoid this */ |
65 | int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value) | |
6173c45b | 66 | { |
e3f44f5c | 67 | int ret; |
6173c45b TR |
68 | |
69 | if (sd > 6) | |
70 | return -EINVAL; | |
71 | ||
e3f44f5c SG |
72 | ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value); |
73 | if (ret < 0) { | |
c83c436d | 74 | pr_err("failed to write SD%u voltage register: %d\n", sd, ret); |
e3f44f5c | 75 | return ret; |
6173c45b TR |
76 | } |
77 | ||
78 | return 0; | |
79 | } | |
80 | ||
e3f44f5c | 81 | int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value) |
6173c45b | 82 | { |
e3f44f5c | 83 | int ret; |
6173c45b TR |
84 | |
85 | if (ldo > 11) | |
86 | return -EINVAL; | |
87 | ||
e3f44f5c SG |
88 | ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value); |
89 | if (ret < 0) { | |
c83c436d SG |
90 | pr_err("failed to write LDO%u voltage register: %d\n", ldo, |
91 | ret); | |
e3f44f5c | 92 | return ret; |
6173c45b TR |
93 | } |
94 | ||
95 | return 0; | |
96 | } | |
97 | ||
e3f44f5c | 98 | static int as3722_probe(struct udevice *dev) |
6173c45b | 99 | { |
e3f44f5c SG |
100 | uint id, revision; |
101 | int ret; | |
6173c45b | 102 | |
e3f44f5c SG |
103 | ret = as3722_read_id(dev, &id, &revision); |
104 | if (ret < 0) { | |
c83c436d | 105 | pr_err("failed to read ID: %d\n", ret); |
e3f44f5c | 106 | return ret; |
6173c45b TR |
107 | } |
108 | ||
e3f44f5c | 109 | if (id != AS3722_DEVICE_ID) { |
c83c436d | 110 | pr_err("unknown device\n"); |
e3f44f5c | 111 | return -ENOENT; |
6173c45b TR |
112 | } |
113 | ||
e3f44f5c | 114 | debug("AS3722 revision %#x found on I2C bus %s\n", revision, dev->name); |
6173c45b TR |
115 | |
116 | return 0; | |
117 | } | |
118 | ||
e3f44f5c SG |
119 | #if CONFIG_IS_ENABLED(PMIC_CHILDREN) |
120 | static const struct pmic_child_info pmic_children_info[] = { | |
121 | { .prefix = "sd", .driver = "as3722_stepdown"}, | |
122 | { .prefix = "ldo", .driver = "as3722_ldo"}, | |
123 | { }, | |
124 | }; | |
6173c45b | 125 | |
e3f44f5c SG |
126 | static int as3722_bind(struct udevice *dev) |
127 | { | |
128 | struct udevice *gpio_dev; | |
129 | ofnode regulators_node; | |
130 | int children; | |
131 | int ret; | |
6173c45b | 132 | |
e3f44f5c SG |
133 | regulators_node = dev_read_subnode(dev, "regulators"); |
134 | if (!ofnode_valid(regulators_node)) { | |
135 | debug("%s: %s regulators subnode not found\n", __func__, | |
136 | dev->name); | |
137 | return -ENXIO; | |
6173c45b TR |
138 | } |
139 | ||
e3f44f5c SG |
140 | children = pmic_bind_children(dev, regulators_node, pmic_children_info); |
141 | if (!children) | |
142 | debug("%s: %s - no child found\n", __func__, dev->name); | |
143 | ret = device_bind_driver(dev, "gpio_as3722", "gpio_as3722", &gpio_dev); | |
144 | if (ret) { | |
145 | debug("%s: Cannot bind GPIOs (ret=%d)\n", __func__, ret); | |
146 | return ret; | |
6173c45b TR |
147 | } |
148 | ||
149 | return 0; | |
150 | } | |
e3f44f5c | 151 | #endif |
6173c45b | 152 | |
e3f44f5c | 153 | static int as3722_reg_count(struct udevice *dev) |
d55b7d4c | 154 | { |
e3f44f5c | 155 | return AS3722_NUM_OF_REGS; |
d55b7d4c SG |
156 | } |
157 | ||
e3f44f5c SG |
158 | static struct dm_pmic_ops as3722_ops = { |
159 | .reg_count = as3722_reg_count, | |
160 | .read = as3722_read, | |
161 | .write = as3722_write, | |
162 | }; | |
163 | ||
164 | static const struct udevice_id as3722_ids[] = { | |
165 | { .compatible = "ams,as3722" }, | |
166 | { } | |
167 | }; | |
168 | ||
169 | U_BOOT_DRIVER(pmic_as3722) = { | |
170 | .name = "as3722_pmic", | |
171 | .id = UCLASS_PMIC, | |
172 | .of_match = as3722_ids, | |
173 | #if CONFIG_IS_ENABLED(PMIC_CHILDREN) | |
174 | .bind = as3722_bind, | |
175 | #endif | |
176 | .probe = as3722_probe, | |
177 | .ops = &as3722_ops, | |
178 | }; |