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779e9751 SR |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Stefan Roese, DENX Software Engineering, [email protected]. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <config.h> | |
25 | #include <common.h> | |
26 | #include <command.h> | |
27 | #include <asm/processor.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/gpio.h> | |
30 | #include <i2c.h> | |
31 | ||
32 | #if defined(CONFIG_ZEUS) | |
33 | ||
34 | u8 buf_zeus_ce[] = { | |
35 | /*00 01 02 03 04 05 06 07 */ | |
36 | 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
37 | /*08 09 0a 0b 0c 0d 0e 0f */ | |
38 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
39 | /*10 11 12 13 14 15 16 17 */ | |
40 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
41 | /*18 19 1a 1b 1c 1d 1e 1f */ | |
42 | 0x00, 0xc0, 0x50, 0x12, 0x72, 0x3e, 0x00, 0x00 }; | |
43 | ||
44 | u8 buf_zeus_pe[] = { | |
45 | ||
46 | /* CPU_CLOCK_DIV 1 = 00 | |
47 | CPU_PLB_FREQ_DIV 3 = 10 | |
48 | OPB_PLB_FREQ_DIV 2 = 01 | |
49 | EBC_PLB_FREQ_DIV 2 = 00 | |
50 | MAL_PLB_FREQ_DIV 1 = 00 | |
51 | PCI_PLB_FRQ_DIV 3 = 10 | |
52 | PLL_PLLOUTA = IS SET | |
53 | PLL_OPERATING = IS NOT SET | |
54 | PLL_FDB_MUL 10 = 1010 | |
55 | PLL_FWD_DIV_A 3 = 101 | |
56 | PLL_FWD_DIV_B 3 = 101 | |
57 | TUNE = 0x2be */ | |
58 | /*00 01 02 03 04 05 06 07 */ | |
59 | 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
60 | /*08 09 0a 0b 0c 0d 0e 0f */ | |
61 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
62 | /*10 11 12 13 14 15 16 17 */ | |
63 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
64 | /*18 19 1a 1b 1c 1d 1e 1f */ | |
65 | 0x00, 0x60, 0x68, 0x2d, 0x42, 0xbe, 0x00, 0x00 }; | |
66 | ||
67 | static int update_boot_eeprom(void) | |
68 | { | |
69 | u32 len = 0x20; | |
6d0f6bcf | 70 | u8 chip = CONFIG_SYS_I2C_EEPROM_ADDR; |
779e9751 SR |
71 | u8 *pbuf; |
72 | u8 base; | |
73 | int i; | |
74 | ||
6d0f6bcf | 75 | if (in_be32((void *)GPIO0_IR) & GPIO_VAL(CONFIG_SYS_GPIO_ZEUS_PE)) { |
779e9751 SR |
76 | pbuf = buf_zeus_pe; |
77 | base = 0x40; | |
78 | } else { | |
79 | pbuf = buf_zeus_ce; | |
80 | base = 0x00; | |
81 | } | |
82 | ||
83 | for (i = 0; i < len; i++, base++) { | |
84 | if (i2c_write(chip, base, 1, &pbuf[i], 1) != 0) { | |
85 | printf("i2c_write fail\n"); | |
86 | return 1; | |
87 | } | |
88 | udelay(11000); | |
89 | } | |
90 | ||
91 | return 0; | |
92 | } | |
93 | ||
94 | int do_update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[]) | |
95 | { | |
96 | return update_boot_eeprom(); | |
97 | } | |
98 | ||
99 | U_BOOT_CMD ( | |
100 | update_boot_eeprom, 1, 1, do_update_boot_eeprom, | |
2fb2604d | 101 | "update boot eeprom content", |
a89c33db | 102 | "" |
779e9751 SR |
103 | ); |
104 | ||
105 | #endif |