[u-boot.git] / board / socrates / socrates.c

/*
 * (C) Copyright 2008
 * Sergei Poselenov, Emcraft Systems, [email protected].
 *
 * Copyright 2004 Freescale Semiconductor.
 * (C) Copyright 2002,2003, Motorola Inc.
 * Xianghua Xiao, ([email protected])
 *
 * (C) Copyright 2002 Scott McNutt <[email protected]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
#include <flash.h>
#include <libfdt.h>
#include <fdt_support.h>

DECLARE_GLOBAL_DATA_PTR;

extern flash_info_t flash_info[];	/* FLASH chips info */

void local_bus_init (void);
ulong flash_get_size (ulong base, int banknum);

int checkboard (void)
{
	volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
	char *src;
	int f;
	char *s = getenv("serial#");

	puts("Board: Socrates");
	if (s != NULL) {
		puts(", serial# ");
		puts(s);
	}
	putc('\n');

#ifdef CONFIG_PCI
	if (gur->porpllsr & (1<<15)) {
		src = "SYSCLK";
		f = CONFIG_SYS_CLK_FREQ;
	} else {
		src = "PCI_CLK";
		f = CONFIG_PCI_CLK_FREQ;
	}
	printf ("PCI1:  32 bit, %d MHz (%s)\n",	f/1000000, src);
#else
	printf ("PCI1:  disabled\n");
#endif

	/*
	 * Initialize local bus.
	 */
	local_bus_init ();

	return 0;
}

int misc_init_r (void)
{
	volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);

	/*
	 * Adjust flash start and offset to detected values
	 */
	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
	gd->bd->bi_flashoffset = 0;

	/*
	 * Check if boot FLASH isn't max size
	 */
	if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) {
		memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff);
		memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff);

		/*
		 * Re-check to get correct base address
		 */
		flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1);
	}

	/*
	 * Check if only one FLASH bank is available
	 */
	if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
		memctl->or1 = 0;
		memctl->br1 = 0;

		/*
		 * Re-do flash protection upon new addresses
		 */
		flash_protect (FLAG_PROTECT_CLEAR,
			       gd->bd->bi_flashstart, 0xffffffff,
			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);

		/* Monitor protection ON by default */
		flash_protect (FLAG_PROTECT_SET,
			       CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1,
			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);

		/* Environment protection ON by default */
		flash_protect (FLAG_PROTECT_SET,
			       CFG_ENV_ADDR,
			       CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);

		/* Redundant environment protection ON by default */
		flash_protect (FLAG_PROTECT_SET,
			       CFG_ENV_ADDR_REDUND,
			       CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
			       &flash_info[CFG_MAX_FLASH_BANKS - 1]);
	}

	return 0;
}

/*
 * Initialize Local Bus
 */
void local_bus_init (void)
{

	volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
	volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);

	lbc->ltesr = 0xffffffff;	/* Clear LBC error interrupts */
	lbc->lteir = 0xffffffff;	/* Enable LBC error interrupts */
	ecm->eedr = 0xffffffff;		/* Clear ecm errors */
	ecm->eeer = 0xffffffff;		/* Enable ecm errors */

}

#if defined(CONFIG_PCI)
/*
 * Initialize PCI Devices, report devices found.
 */

#ifndef CONFIG_PCI_PNP
static struct pci_config_table pci_mpc85xxads_config_table[] = {
	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
	 PCI_IDSEL_NUMBER, PCI_ANY_ID,
	 pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
				     PCI_ENET0_MEMADDR,
				     PCI_COMMAND_MEMORY |
				     PCI_COMMAND_MASTER}},
	{}
};
#endif


static struct pci_controller hose = {
#ifndef CONFIG_PCI_PNP
	config_table:pci_mpc85xxads_config_table,
#endif
};

#endif /* CONFIG_PCI */


void pci_init_board (void)
{
#ifdef CONFIG_PCI
	pci_mpc85xx_init (&hose);
#endif /* CONFIG_PCI */
}

#ifdef CONFIG_BOARD_EARLY_INIT_R
int board_early_init_r (void)
{
#ifdef CONFIG_PS2MULT
	ps2mult_early_init();
#endif /* CONFIG_PS2MULT */
	return (0);
}
#endif /* CONFIG_BOARD_EARLY_INIT_R */

#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void
ft_board_setup(void *blob, bd_t *bd)
{
	u32 val[4];
	int rc;

	ft_cpu_setup(blob, bd);

	/* Fixup NOR mapping */
	val[0] = 0;				/* chip select number */
	val[1] = 0;				/* always 0 */
	val[2] = gd->bd->bi_flashstart;
	val[3] = gd->bd->bi_flashsize;

	rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
				  val, sizeof(val), 1);
	if (rc)
		printf("Unable to update property NOR mapping, err=%s\n",
		       fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
Commit	Line	Data
5d108ac8 SP	1	/*
	2	* (C) Copyright 2008
	3	* Sergei Poselenov, Emcraft Systems, [email protected].
	4	*
	5	* Copyright 2004 Freescale Semiconductor.
	6	* (C) Copyright 2002,2003, Motorola Inc.
	7	* Xianghua Xiao, ([email protected])
	8	*
	9	* (C) Copyright 2002 Scott McNutt <[email protected]>
	10	*
	11	* See file CREDITS for list of people who contributed to this
	12	* project.
	13	*
	14	* This program is free software; you can redistribute it and/or
	15	* modify it under the terms of the GNU General Public License as
	16	* published by the Free Software Foundation; either version 2 of
	17	* the License, or (at your option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful,
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* You should have received a copy of the GNU General Public License
	25	* along with this program; if not, write to the Free Software
	26	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	27	* MA 02111-1307 USA
	28	*/
	29
	30	#include <common.h>
	31	#include <pci.h>
	32	#include <asm/processor.h>
	33	#include <asm/immap_85xx.h>
	34	#include <ioports.h>
	35	#include <flash.h>
e18575d5 SP	36	#include <libfdt.h>
e18575d5 SP	37	#include <fdt_support.h>
5d108ac8 SP	38
	39	DECLARE_GLOBAL_DATA_PTR;
	40
	41	extern flash_info_t flash_info[]; /* FLASH chips info */
	42
	43	void local_bus_init (void);
	44	ulong flash_get_size (ulong base, int banknum);
	45
	46	int checkboard (void)
	47	{
5e1882df SP	48	volatile ccsr_gur_t gur = (void )(CFG_MPC85xx_GUTS_ADDR);
	49	char *src;
	50	int f;
5d108ac8 SP	51	char *s = getenv("serial#");
	52
	53	puts("Board: Socrates");
	54	if (s != NULL) {
	55	puts(", serial# ");
	56	puts(s);
	57	}
	58	putc('\n');
	59
	60	#ifdef CONFIG_PCI
5e1882df SP	61	if (gur->porpllsr & (1<<15)) {
	62	src = "SYSCLK";
	63	f = CONFIG_SYS_CLK_FREQ;
	64	} else {
	65	src = "PCI_CLK";
	66	f = CONFIG_PCI_CLK_FREQ;
	67	}
	68	printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src);
5d108ac8 SP	69	#else
	70	printf ("PCI1: disabled\n");
	71	#endif
	72
	73	/*
	74	* Initialize local bus.
	75	*/
	76	local_bus_init ();
	77
	78	return 0;
	79	}
	80
	81	int misc_init_r (void)
	82	{
	83	volatile ccsr_lbc_t memctl = (void )(CFG_MPC85xx_LBC_ADDR);
	84
	85	/*
	86	* Adjust flash start and offset to detected values
	87	*/
	88	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
	89	gd->bd->bi_flashoffset = 0;
	90
	91	/*
	92	* Check if boot FLASH isn't max size
	93	*/
	94	if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) {
	95	memctl->or0 = gd->bd->bi_flashstart \| (CFG_OR0_PRELIM & 0x00007fff);
	96	memctl->br0 = gd->bd->bi_flashstart \| (CFG_BR0_PRELIM & 0x00007fff);
	97
	98	/*
	99	* Re-check to get correct base address
	100	*/
	101	flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1);
	102	}
	103
	104	/*
	105	* Check if only one FLASH bank is available
	106	*/
	107	if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
	108	memctl->or1 = 0;
	109	memctl->br1 = 0;
	110
	111	/*
	112	* Re-do flash protection upon new addresses
	113	*/
	114	flash_protect (FLAG_PROTECT_CLEAR,
	115	gd->bd->bi_flashstart, 0xffffffff,
	116	&flash_info[CFG_MAX_FLASH_BANKS - 1]);
	117
	118	/* Monitor protection ON by default */
	119	flash_protect (FLAG_PROTECT_SET,
	120	CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1,
	121	&flash_info[CFG_MAX_FLASH_BANKS - 1]);
	122
	123	/* Environment protection ON by default */
	124	flash_protect (FLAG_PROTECT_SET,
	125	CFG_ENV_ADDR,
	126	CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
	127	&flash_info[CFG_MAX_FLASH_BANKS - 1]);
	128
	129	/* Redundant environment protection ON by default */
	130	flash_protect (FLAG_PROTECT_SET,
	131	CFG_ENV_ADDR_REDUND,
	132	CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
133	&flash_info[CFG_MAX_FLASH_BANKS - 1]);
134	}
135
136	return 0;
137	}
138
139	/*
140	* Initialize Local Bus
141	*/
142	void local_bus_init (void)
143	{
144
145	volatile ccsr_lbc_t lbc = (void )(CFG_MPC85xx_LBC_ADDR);
146	volatile ccsr_local_ecm_t ecm = (void )(CFG_MPC85xx_ECM_ADDR);
147
148	lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
149	lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */
150	ecm->eedr = 0xffffffff; /* Clear ecm errors */
151	ecm->eeer = 0xffffffff; /* Enable ecm errors */
152
153	}
154
155	#if defined(CONFIG_PCI)
156	/*
157	* Initialize PCI Devices, report devices found.
158	*/
159
160	#ifndef CONFIG_PCI_PNP
161	static struct pci_config_table pci_mpc85xxads_config_table[] = {
162	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
163	PCI_IDSEL_NUMBER, PCI_ANY_ID,
164	pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
165	PCI_ENET0_MEMADDR,
166	PCI_COMMAND_MEMORY \|
167	PCI_COMMAND_MASTER}},
168	{}
169	};
170	#endif
171
172
173	static struct pci_controller hose = {
174	#ifndef CONFIG_PCI_PNP
175	config_table:pci_mpc85xxads_config_table,
176	#endif
177	};
178
179	#endif /* CONFIG_PCI */
180
181
182	void pci_init_board (void)
183	{
184	#ifdef CONFIG_PCI
185	pci_mpc85xx_init (&hose);
186	#endif /* CONFIG_PCI */
187	}
188
189	#ifdef CONFIG_BOARD_EARLY_INIT_R
190	int board_early_init_r (void)
191	{
192	#ifdef CONFIG_PS2MULT
193	ps2mult_early_init();
194	#endif /* CONFIG_PS2MULT */
195	return (0);
196	}
197	#endif /* CONFIG_BOARD_EARLY_INIT_R */
e18575d5 SP	198
	199	#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
	200	void
	201	ft_board_setup(void blob, bd_t bd)
	202	{
	203	u32 val[4];
	204	int rc;
	205
	206	ft_cpu_setup(blob, bd);
	207
	208	/* Fixup NOR mapping */
	209	val[0] = 0; /* chip select number */
	210	val[1] = 0; /* always 0 */
	211	val[2] = gd->bd->bi_flashstart;
	212	val[3] = gd->bd->bi_flashsize;
	213
	214	rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
	215	val, sizeof(val), 1);
	216	if (rc)
	217	printf("Unable to update property NOR mapping, err=%s\n",
	218	fdt_strerror(rc));
	219	}
	220	#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */