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272cc70b AF |
1 | /* |
2 | * Copyright 2008, Freescale Semiconductor, Inc | |
3 | * Andy Fleming | |
4 | * | |
5 | * Based vaguely on the Linux code | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <config.h> | |
27 | #include <common.h> | |
28 | #include <command.h> | |
29 | #include <mmc.h> | |
30 | #include <part.h> | |
31 | #include <malloc.h> | |
32 | #include <linux/list.h> | |
9b1f942c | 33 | #include <div64.h> |
272cc70b | 34 | |
ce0fbcd2 MW |
35 | /* Set block count limit because of 16 bit register limit on some hardware*/ |
36 | #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT | |
37 | #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 | |
38 | #endif | |
39 | ||
272cc70b AF |
40 | static struct list_head mmc_devices; |
41 | static int cur_dev_num = -1; | |
42 | ||
314284b1 | 43 | int __board_mmc_getcd(struct mmc *mmc) { |
11fdade2 SB |
44 | return -1; |
45 | } | |
46 | ||
314284b1 | 47 | int board_mmc_getcd(struct mmc *mmc)__attribute__((weak, |
11fdade2 SB |
48 | alias("__board_mmc_getcd"))); |
49 | ||
8635ff9e MV |
50 | #ifdef CONFIG_MMC_BOUNCE_BUFFER |
51 | static int mmc_bounce_need_bounce(struct mmc_data *orig) | |
52 | { | |
53 | ulong addr, len; | |
54 | ||
55 | if (orig->flags & MMC_DATA_READ) | |
56 | addr = (ulong)orig->dest; | |
57 | else | |
58 | addr = (ulong)orig->src; | |
59 | ||
60 | if (addr % ARCH_DMA_MINALIGN) { | |
61 | debug("MMC: Unaligned data destination address %08lx!\n", addr); | |
62 | return 1; | |
63 | } | |
64 | ||
65 | len = (ulong)(orig->blocksize * orig->blocks); | |
66 | if (len % ARCH_DMA_MINALIGN) { | |
67 | debug("MMC: Unaligned data destination length %08lx!\n", len); | |
68 | return 1; | |
69 | } | |
70 | ||
71 | return 0; | |
72 | } | |
73 | ||
74 | static int mmc_bounce_buffer_start(struct mmc_data *backup, | |
75 | struct mmc_data *orig) | |
76 | { | |
77 | ulong origlen, len; | |
78 | void *buffer; | |
79 | ||
80 | if (!orig) | |
81 | return 0; | |
82 | ||
83 | if (!mmc_bounce_need_bounce(orig)) | |
84 | return 0; | |
85 | ||
86 | memcpy(backup, orig, sizeof(struct mmc_data)); | |
87 | ||
88 | origlen = orig->blocksize * orig->blocks; | |
89 | len = roundup(origlen, ARCH_DMA_MINALIGN); | |
90 | buffer = memalign(ARCH_DMA_MINALIGN, len); | |
91 | if (!buffer) { | |
92 | puts("MMC: Error allocating MMC bounce buffer!\n"); | |
93 | return 1; | |
94 | } | |
95 | ||
96 | if (orig->flags & MMC_DATA_READ) { | |
97 | orig->dest = buffer; | |
98 | } else { | |
99 | memcpy(buffer, orig->src, origlen); | |
100 | orig->src = buffer; | |
101 | } | |
102 | ||
103 | return 0; | |
104 | } | |
105 | ||
106 | static void mmc_bounce_buffer_stop(struct mmc_data *backup, | |
107 | struct mmc_data *orig) | |
108 | { | |
109 | ulong len; | |
110 | ||
111 | if (!orig) | |
112 | return; | |
113 | ||
114 | if (!mmc_bounce_need_bounce(backup)) | |
115 | return; | |
116 | ||
117 | if (backup->flags & MMC_DATA_READ) { | |
118 | len = backup->blocksize * backup->blocks; | |
119 | memcpy(backup->dest, orig->dest, len); | |
120 | free(orig->dest); | |
121 | orig->dest = backup->dest; | |
122 | } else { | |
123 | free((void *)orig->src); | |
124 | orig->src = backup->src; | |
125 | } | |
126 | ||
127 | return; | |
128 | ||
129 | } | |
130 | #else | |
131 | static inline int mmc_bounce_buffer_start(struct mmc_data *backup, | |
dc3faf09 | 132 | struct mmc_data *orig) { return 0; } |
8635ff9e MV |
133 | static inline void mmc_bounce_buffer_stop(struct mmc_data *backup, |
134 | struct mmc_data *orig) { } | |
135 | #endif | |
136 | ||
272cc70b AF |
137 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
138 | { | |
8635ff9e | 139 | struct mmc_data backup; |
5db2fe3a | 140 | int ret; |
8635ff9e MV |
141 | |
142 | memset(&backup, 0, sizeof(backup)); | |
143 | ||
144 | ret = mmc_bounce_buffer_start(&backup, data); | |
145 | if (ret) | |
146 | return ret; | |
147 | ||
148 | #ifdef CONFIG_MMC_TRACE | |
5db2fe3a RR |
149 | int i; |
150 | u8 *ptr; | |
151 | ||
152 | printf("CMD_SEND:%d\n", cmd->cmdidx); | |
153 | printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); | |
5db2fe3a RR |
154 | ret = mmc->send_cmd(mmc, cmd, data); |
155 | switch (cmd->resp_type) { | |
156 | case MMC_RSP_NONE: | |
157 | printf("\t\tMMC_RSP_NONE\n"); | |
158 | break; | |
159 | case MMC_RSP_R1: | |
160 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", | |
161 | cmd->response[0]); | |
162 | break; | |
163 | case MMC_RSP_R1b: | |
164 | printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", | |
165 | cmd->response[0]); | |
166 | break; | |
167 | case MMC_RSP_R2: | |
168 | printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", | |
169 | cmd->response[0]); | |
170 | printf("\t\t \t\t 0x%08X \n", | |
171 | cmd->response[1]); | |
172 | printf("\t\t \t\t 0x%08X \n", | |
173 | cmd->response[2]); | |
174 | printf("\t\t \t\t 0x%08X \n", | |
175 | cmd->response[3]); | |
176 | printf("\n"); | |
177 | printf("\t\t\t\t\tDUMPING DATA\n"); | |
178 | for (i = 0; i < 4; i++) { | |
179 | int j; | |
180 | printf("\t\t\t\t\t%03d - ", i*4); | |
146bec79 | 181 | ptr = (u8 *)&cmd->response[i]; |
5db2fe3a RR |
182 | ptr += 3; |
183 | for (j = 0; j < 4; j++) | |
184 | printf("%02X ", *ptr--); | |
185 | printf("\n"); | |
186 | } | |
187 | break; | |
188 | case MMC_RSP_R3: | |
189 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", | |
190 | cmd->response[0]); | |
191 | break; | |
192 | default: | |
193 | printf("\t\tERROR MMC rsp not supported\n"); | |
194 | break; | |
195 | } | |
5db2fe3a | 196 | #else |
8635ff9e | 197 | ret = mmc->send_cmd(mmc, cmd, data); |
5db2fe3a | 198 | #endif |
8635ff9e MV |
199 | mmc_bounce_buffer_stop(&backup, data); |
200 | return ret; | |
272cc70b AF |
201 | } |
202 | ||
5d4fc8d9 RR |
203 | int mmc_send_status(struct mmc *mmc, int timeout) |
204 | { | |
205 | struct mmc_cmd cmd; | |
d617c426 | 206 | int err, retries = 5; |
5d4fc8d9 RR |
207 | #ifdef CONFIG_MMC_TRACE |
208 | int status; | |
209 | #endif | |
210 | ||
211 | cmd.cmdidx = MMC_CMD_SEND_STATUS; | |
212 | cmd.resp_type = MMC_RSP_R1; | |
aaf3d41a MV |
213 | if (!mmc_host_is_spi(mmc)) |
214 | cmd.cmdarg = mmc->rca << 16; | |
5d4fc8d9 RR |
215 | |
216 | do { | |
217 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
d617c426 JK |
218 | if (!err) { |
219 | if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && | |
220 | (cmd.response[0] & MMC_STATUS_CURR_STATE) != | |
221 | MMC_STATE_PRG) | |
222 | break; | |
223 | else if (cmd.response[0] & MMC_STATUS_MASK) { | |
224 | printf("Status Error: 0x%08X\n", | |
225 | cmd.response[0]); | |
226 | return COMM_ERR; | |
227 | } | |
228 | } else if (--retries < 0) | |
5d4fc8d9 | 229 | return err; |
5d4fc8d9 RR |
230 | |
231 | udelay(1000); | |
232 | ||
5d4fc8d9 RR |
233 | } while (timeout--); |
234 | ||
5db2fe3a RR |
235 | #ifdef CONFIG_MMC_TRACE |
236 | status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; | |
237 | printf("CURR STATE:%d\n", status); | |
238 | #endif | |
5d4fc8d9 RR |
239 | if (!timeout) { |
240 | printf("Timeout waiting card ready\n"); | |
241 | return TIMEOUT; | |
242 | } | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
272cc70b AF |
247 | int mmc_set_blocklen(struct mmc *mmc, int len) |
248 | { | |
249 | struct mmc_cmd cmd; | |
250 | ||
251 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; | |
252 | cmd.resp_type = MMC_RSP_R1; | |
253 | cmd.cmdarg = len; | |
272cc70b AF |
254 | |
255 | return mmc_send_cmd(mmc, &cmd, NULL); | |
256 | } | |
257 | ||
258 | struct mmc *find_mmc_device(int dev_num) | |
259 | { | |
260 | struct mmc *m; | |
261 | struct list_head *entry; | |
262 | ||
263 | list_for_each(entry, &mmc_devices) { | |
264 | m = list_entry(entry, struct mmc, link); | |
265 | ||
266 | if (m->block_dev.dev == dev_num) | |
267 | return m; | |
268 | } | |
269 | ||
270 | printf("MMC Device %d not found\n", dev_num); | |
271 | ||
272 | return NULL; | |
273 | } | |
274 | ||
e6f99a56 LW |
275 | static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt) |
276 | { | |
277 | struct mmc_cmd cmd; | |
278 | ulong end; | |
279 | int err, start_cmd, end_cmd; | |
280 | ||
281 | if (mmc->high_capacity) | |
282 | end = start + blkcnt - 1; | |
283 | else { | |
284 | end = (start + blkcnt - 1) * mmc->write_bl_len; | |
285 | start *= mmc->write_bl_len; | |
286 | } | |
287 | ||
288 | if (IS_SD(mmc)) { | |
289 | start_cmd = SD_CMD_ERASE_WR_BLK_START; | |
290 | end_cmd = SD_CMD_ERASE_WR_BLK_END; | |
291 | } else { | |
292 | start_cmd = MMC_CMD_ERASE_GROUP_START; | |
293 | end_cmd = MMC_CMD_ERASE_GROUP_END; | |
294 | } | |
295 | ||
296 | cmd.cmdidx = start_cmd; | |
297 | cmd.cmdarg = start; | |
298 | cmd.resp_type = MMC_RSP_R1; | |
e6f99a56 LW |
299 | |
300 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
301 | if (err) | |
302 | goto err_out; | |
303 | ||
304 | cmd.cmdidx = end_cmd; | |
305 | cmd.cmdarg = end; | |
306 | ||
307 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
308 | if (err) | |
309 | goto err_out; | |
310 | ||
311 | cmd.cmdidx = MMC_CMD_ERASE; | |
312 | cmd.cmdarg = SECURE_ERASE; | |
313 | cmd.resp_type = MMC_RSP_R1b; | |
314 | ||
315 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
316 | if (err) | |
317 | goto err_out; | |
318 | ||
319 | return 0; | |
320 | ||
321 | err_out: | |
322 | puts("mmc erase failed\n"); | |
323 | return err; | |
324 | } | |
325 | ||
326 | static unsigned long | |
327 | mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt) | |
328 | { | |
329 | int err = 0; | |
330 | struct mmc *mmc = find_mmc_device(dev_num); | |
331 | lbaint_t blk = 0, blk_r = 0; | |
d2d8afae | 332 | int timeout = 1000; |
e6f99a56 LW |
333 | |
334 | if (!mmc) | |
335 | return -1; | |
336 | ||
337 | if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size)) | |
338 | printf("\n\nCaution! Your devices Erase group is 0x%x\n" | |
339 | "The erase range would be change to 0x%lx~0x%lx\n\n", | |
340 | mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1), | |
341 | ((start + blkcnt + mmc->erase_grp_size) | |
342 | & ~(mmc->erase_grp_size - 1)) - 1); | |
343 | ||
344 | while (blk < blkcnt) { | |
345 | blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? | |
346 | mmc->erase_grp_size : (blkcnt - blk); | |
347 | err = mmc_erase_t(mmc, start + blk, blk_r); | |
348 | if (err) | |
349 | break; | |
350 | ||
351 | blk += blk_r; | |
d2d8afae JH |
352 | |
353 | /* Waiting for the ready status */ | |
354 | if (mmc_send_status(mmc, timeout)) | |
355 | return 0; | |
e6f99a56 LW |
356 | } |
357 | ||
358 | return blk; | |
359 | } | |
360 | ||
272cc70b | 361 | static ulong |
0158126e | 362 | mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src) |
272cc70b AF |
363 | { |
364 | struct mmc_cmd cmd; | |
365 | struct mmc_data data; | |
5d4fc8d9 | 366 | int timeout = 1000; |
272cc70b | 367 | |
d2bf29e3 | 368 | if ((start + blkcnt) > mmc->block_dev.lba) { |
def412b6 | 369 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
370 | start + blkcnt, mmc->block_dev.lba); |
371 | return 0; | |
372 | } | |
272cc70b AF |
373 | |
374 | if (blkcnt > 1) | |
375 | cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; | |
376 | else | |
377 | cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; | |
378 | ||
379 | if (mmc->high_capacity) | |
380 | cmd.cmdarg = start; | |
381 | else | |
def412b6 | 382 | cmd.cmdarg = start * mmc->write_bl_len; |
272cc70b AF |
383 | |
384 | cmd.resp_type = MMC_RSP_R1; | |
272cc70b AF |
385 | |
386 | data.src = src; | |
387 | data.blocks = blkcnt; | |
def412b6 | 388 | data.blocksize = mmc->write_bl_len; |
272cc70b AF |
389 | data.flags = MMC_DATA_WRITE; |
390 | ||
def412b6 SS |
391 | if (mmc_send_cmd(mmc, &cmd, &data)) { |
392 | printf("mmc write failed\n"); | |
393 | return 0; | |
272cc70b AF |
394 | } |
395 | ||
d52ebf10 TC |
396 | /* SPI multiblock writes terminate using a special |
397 | * token, not a STOP_TRANSMISSION request. | |
398 | */ | |
399 | if (!mmc_host_is_spi(mmc) && blkcnt > 1) { | |
272cc70b AF |
400 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
401 | cmd.cmdarg = 0; | |
402 | cmd.resp_type = MMC_RSP_R1b; | |
def412b6 SS |
403 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
404 | printf("mmc fail to send stop cmd\n"); | |
405 | return 0; | |
0158126e | 406 | } |
272cc70b AF |
407 | } |
408 | ||
93ad0d18 JK |
409 | /* Waiting for the ready status */ |
410 | if (mmc_send_status(mmc, timeout)) | |
411 | return 0; | |
412 | ||
272cc70b AF |
413 | return blkcnt; |
414 | } | |
415 | ||
0158126e LW |
416 | static ulong |
417 | mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src) | |
418 | { | |
0158126e LW |
419 | lbaint_t cur, blocks_todo = blkcnt; |
420 | ||
def412b6 | 421 | struct mmc *mmc = find_mmc_device(dev_num); |
0158126e | 422 | if (!mmc) |
def412b6 | 423 | return 0; |
0158126e | 424 | |
def412b6 SS |
425 | if (mmc_set_blocklen(mmc, mmc->write_bl_len)) |
426 | return 0; | |
0158126e LW |
427 | |
428 | do { | |
8feafcc4 | 429 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
0158126e | 430 | if(mmc_write_blocks(mmc, start, cur, src) != cur) |
def412b6 | 431 | return 0; |
0158126e LW |
432 | blocks_todo -= cur; |
433 | start += cur; | |
434 | src += cur * mmc->write_bl_len; | |
435 | } while (blocks_todo > 0); | |
436 | ||
437 | return blkcnt; | |
438 | } | |
439 | ||
4a1a06bc | 440 | int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt) |
272cc70b AF |
441 | { |
442 | struct mmc_cmd cmd; | |
443 | struct mmc_data data; | |
444 | ||
4a1a06bc AS |
445 | if (blkcnt > 1) |
446 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; | |
447 | else | |
448 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; | |
272cc70b AF |
449 | |
450 | if (mmc->high_capacity) | |
4a1a06bc | 451 | cmd.cmdarg = start; |
272cc70b | 452 | else |
4a1a06bc | 453 | cmd.cmdarg = start * mmc->read_bl_len; |
272cc70b AF |
454 | |
455 | cmd.resp_type = MMC_RSP_R1; | |
272cc70b AF |
456 | |
457 | data.dest = dst; | |
4a1a06bc | 458 | data.blocks = blkcnt; |
272cc70b AF |
459 | data.blocksize = mmc->read_bl_len; |
460 | data.flags = MMC_DATA_READ; | |
461 | ||
4a1a06bc AS |
462 | if (mmc_send_cmd(mmc, &cmd, &data)) |
463 | return 0; | |
272cc70b | 464 | |
4a1a06bc AS |
465 | if (blkcnt > 1) { |
466 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; | |
467 | cmd.cmdarg = 0; | |
468 | cmd.resp_type = MMC_RSP_R1b; | |
4a1a06bc AS |
469 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
470 | printf("mmc fail to send stop cmd\n"); | |
471 | return 0; | |
472 | } | |
272cc70b AF |
473 | } |
474 | ||
4a1a06bc | 475 | return blkcnt; |
272cc70b AF |
476 | } |
477 | ||
478 | static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst) | |
479 | { | |
4a1a06bc AS |
480 | lbaint_t cur, blocks_todo = blkcnt; |
481 | ||
482 | if (blkcnt == 0) | |
483 | return 0; | |
272cc70b | 484 | |
4a1a06bc | 485 | struct mmc *mmc = find_mmc_device(dev_num); |
272cc70b AF |
486 | if (!mmc) |
487 | return 0; | |
488 | ||
d2bf29e3 | 489 | if ((start + blkcnt) > mmc->block_dev.lba) { |
4a1a06bc | 490 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
491 | start + blkcnt, mmc->block_dev.lba); |
492 | return 0; | |
493 | } | |
272cc70b | 494 | |
4a1a06bc | 495 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) |
272cc70b | 496 | return 0; |
272cc70b | 497 | |
4a1a06bc | 498 | do { |
8feafcc4 | 499 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
4a1a06bc AS |
500 | if(mmc_read_blocks(mmc, dst, start, cur) != cur) |
501 | return 0; | |
502 | blocks_todo -= cur; | |
503 | start += cur; | |
504 | dst += cur * mmc->read_bl_len; | |
505 | } while (blocks_todo > 0); | |
272cc70b AF |
506 | |
507 | return blkcnt; | |
508 | } | |
509 | ||
510 | int mmc_go_idle(struct mmc* mmc) | |
511 | { | |
512 | struct mmc_cmd cmd; | |
513 | int err; | |
514 | ||
515 | udelay(1000); | |
516 | ||
517 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; | |
518 | cmd.cmdarg = 0; | |
519 | cmd.resp_type = MMC_RSP_NONE; | |
272cc70b AF |
520 | |
521 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
522 | ||
523 | if (err) | |
524 | return err; | |
525 | ||
526 | udelay(2000); | |
527 | ||
528 | return 0; | |
529 | } | |
530 | ||
531 | int | |
532 | sd_send_op_cond(struct mmc *mmc) | |
533 | { | |
534 | int timeout = 1000; | |
535 | int err; | |
536 | struct mmc_cmd cmd; | |
537 | ||
538 | do { | |
539 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
540 | cmd.resp_type = MMC_RSP_R1; | |
541 | cmd.cmdarg = 0; | |
272cc70b AF |
542 | |
543 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
544 | ||
545 | if (err) | |
546 | return err; | |
547 | ||
548 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; | |
549 | cmd.resp_type = MMC_RSP_R3; | |
250de12b SB |
550 | |
551 | /* | |
552 | * Most cards do not answer if some reserved bits | |
553 | * in the ocr are set. However, Some controller | |
554 | * can set bit 7 (reserved for low voltages), but | |
555 | * how to manage low voltages SD card is not yet | |
556 | * specified. | |
557 | */ | |
d52ebf10 TC |
558 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
559 | (mmc->voltages & 0xff8000); | |
272cc70b AF |
560 | |
561 | if (mmc->version == SD_VERSION_2) | |
562 | cmd.cmdarg |= OCR_HCS; | |
563 | ||
564 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
565 | ||
566 | if (err) | |
567 | return err; | |
568 | ||
569 | udelay(1000); | |
570 | } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); | |
571 | ||
572 | if (timeout <= 0) | |
573 | return UNUSABLE_ERR; | |
574 | ||
575 | if (mmc->version != SD_VERSION_2) | |
576 | mmc->version = SD_VERSION_1_0; | |
577 | ||
d52ebf10 TC |
578 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
579 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
580 | cmd.resp_type = MMC_RSP_R3; | |
581 | cmd.cmdarg = 0; | |
d52ebf10 TC |
582 | |
583 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
584 | ||
585 | if (err) | |
586 | return err; | |
587 | } | |
588 | ||
998be3dd | 589 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
590 | |
591 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
592 | mmc->rca = 0; | |
593 | ||
594 | return 0; | |
595 | } | |
596 | ||
597 | int mmc_send_op_cond(struct mmc *mmc) | |
598 | { | |
31cacbab | 599 | int timeout = 10000; |
272cc70b AF |
600 | struct mmc_cmd cmd; |
601 | int err; | |
602 | ||
603 | /* Some cards seem to need this */ | |
604 | mmc_go_idle(mmc); | |
605 | ||
31cacbab RR |
606 | /* Asking to the card its capabilities */ |
607 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
608 | cmd.resp_type = MMC_RSP_R3; | |
609 | cmd.cmdarg = 0; | |
cd6881b5 | 610 | |
31cacbab | 611 | err = mmc_send_cmd(mmc, &cmd, NULL); |
cd6881b5 | 612 | |
31cacbab RR |
613 | if (err) |
614 | return err; | |
cd6881b5 | 615 | |
31cacbab | 616 | udelay(1000); |
cd6881b5 | 617 | |
272cc70b AF |
618 | do { |
619 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
620 | cmd.resp_type = MMC_RSP_R3; | |
31cacbab RR |
621 | cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 : |
622 | (mmc->voltages & | |
623 | (cmd.response[0] & OCR_VOLTAGE_MASK)) | | |
624 | (cmd.response[0] & OCR_ACCESS_MODE)); | |
b1f1e821 ŁM |
625 | |
626 | if (mmc->host_caps & MMC_MODE_HC) | |
627 | cmd.cmdarg |= OCR_HCS; | |
628 | ||
272cc70b AF |
629 | err = mmc_send_cmd(mmc, &cmd, NULL); |
630 | ||
631 | if (err) | |
632 | return err; | |
633 | ||
634 | udelay(1000); | |
635 | } while (!(cmd.response[0] & OCR_BUSY) && timeout--); | |
636 | ||
637 | if (timeout <= 0) | |
638 | return UNUSABLE_ERR; | |
639 | ||
d52ebf10 TC |
640 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
641 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
642 | cmd.resp_type = MMC_RSP_R3; | |
643 | cmd.cmdarg = 0; | |
d52ebf10 TC |
644 | |
645 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
646 | ||
647 | if (err) | |
648 | return err; | |
649 | } | |
650 | ||
272cc70b | 651 | mmc->version = MMC_VERSION_UNKNOWN; |
998be3dd | 652 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
653 | |
654 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
655 | mmc->rca = 0; | |
656 | ||
657 | return 0; | |
658 | } | |
659 | ||
660 | ||
661 | int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) | |
662 | { | |
663 | struct mmc_cmd cmd; | |
664 | struct mmc_data data; | |
665 | int err; | |
666 | ||
667 | /* Get the Card Status Register */ | |
668 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; | |
669 | cmd.resp_type = MMC_RSP_R1; | |
670 | cmd.cmdarg = 0; | |
272cc70b AF |
671 | |
672 | data.dest = ext_csd; | |
673 | data.blocks = 1; | |
674 | data.blocksize = 512; | |
675 | data.flags = MMC_DATA_READ; | |
676 | ||
677 | err = mmc_send_cmd(mmc, &cmd, &data); | |
678 | ||
679 | return err; | |
680 | } | |
681 | ||
682 | ||
683 | int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) | |
684 | { | |
685 | struct mmc_cmd cmd; | |
5d4fc8d9 RR |
686 | int timeout = 1000; |
687 | int ret; | |
272cc70b AF |
688 | |
689 | cmd.cmdidx = MMC_CMD_SWITCH; | |
690 | cmd.resp_type = MMC_RSP_R1b; | |
691 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | | |
5d4fc8d9 RR |
692 | (index << 16) | |
693 | (value << 8); | |
272cc70b | 694 | |
5d4fc8d9 RR |
695 | ret = mmc_send_cmd(mmc, &cmd, NULL); |
696 | ||
697 | /* Waiting for the ready status */ | |
93ad0d18 JK |
698 | if (!ret) |
699 | ret = mmc_send_status(mmc, timeout); | |
5d4fc8d9 RR |
700 | |
701 | return ret; | |
702 | ||
272cc70b AF |
703 | } |
704 | ||
705 | int mmc_change_freq(struct mmc *mmc) | |
706 | { | |
a1969923 | 707 | ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512); |
272cc70b AF |
708 | char cardtype; |
709 | int err; | |
710 | ||
711 | mmc->card_caps = 0; | |
712 | ||
d52ebf10 TC |
713 | if (mmc_host_is_spi(mmc)) |
714 | return 0; | |
715 | ||
272cc70b AF |
716 | /* Only version 4 supports high-speed */ |
717 | if (mmc->version < MMC_VERSION_4) | |
718 | return 0; | |
719 | ||
272cc70b AF |
720 | err = mmc_send_ext_csd(mmc, ext_csd); |
721 | ||
722 | if (err) | |
723 | return err; | |
724 | ||
0560db18 | 725 | cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; |
272cc70b AF |
726 | |
727 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); | |
728 | ||
729 | if (err) | |
730 | return err; | |
731 | ||
732 | /* Now check to see that it worked */ | |
733 | err = mmc_send_ext_csd(mmc, ext_csd); | |
734 | ||
735 | if (err) | |
736 | return err; | |
737 | ||
738 | /* No high-speed support */ | |
0560db18 | 739 | if (!ext_csd[EXT_CSD_HS_TIMING]) |
272cc70b AF |
740 | return 0; |
741 | ||
742 | /* High Speed is set, there are two types: 52MHz and 26MHz */ | |
743 | if (cardtype & MMC_HS_52MHZ) | |
744 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; | |
745 | else | |
746 | mmc->card_caps |= MMC_MODE_HS; | |
747 | ||
748 | return 0; | |
749 | } | |
750 | ||
bc897b1d LW |
751 | int mmc_switch_part(int dev_num, unsigned int part_num) |
752 | { | |
753 | struct mmc *mmc = find_mmc_device(dev_num); | |
754 | ||
755 | if (!mmc) | |
756 | return -1; | |
757 | ||
758 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, | |
759 | (mmc->part_config & ~PART_ACCESS_MASK) | |
760 | | (part_num & PART_ACCESS_MASK)); | |
761 | } | |
762 | ||
48972d90 TR |
763 | int mmc_getcd(struct mmc *mmc) |
764 | { | |
765 | int cd; | |
766 | ||
767 | cd = board_mmc_getcd(mmc); | |
768 | ||
769 | if ((cd < 0) && mmc->getcd) | |
770 | cd = mmc->getcd(mmc); | |
771 | ||
772 | return cd; | |
773 | } | |
774 | ||
272cc70b AF |
775 | int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
776 | { | |
777 | struct mmc_cmd cmd; | |
778 | struct mmc_data data; | |
779 | ||
780 | /* Switch the frequency */ | |
781 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; | |
782 | cmd.resp_type = MMC_RSP_R1; | |
783 | cmd.cmdarg = (mode << 31) | 0xffffff; | |
784 | cmd.cmdarg &= ~(0xf << (group * 4)); | |
785 | cmd.cmdarg |= value << (group * 4); | |
272cc70b AF |
786 | |
787 | data.dest = (char *)resp; | |
788 | data.blocksize = 64; | |
789 | data.blocks = 1; | |
790 | data.flags = MMC_DATA_READ; | |
791 | ||
792 | return mmc_send_cmd(mmc, &cmd, &data); | |
793 | } | |
794 | ||
795 | ||
796 | int sd_change_freq(struct mmc *mmc) | |
797 | { | |
798 | int err; | |
799 | struct mmc_cmd cmd; | |
f781dd38 A |
800 | ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); |
801 | ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); | |
272cc70b AF |
802 | struct mmc_data data; |
803 | int timeout; | |
804 | ||
805 | mmc->card_caps = 0; | |
806 | ||
d52ebf10 TC |
807 | if (mmc_host_is_spi(mmc)) |
808 | return 0; | |
809 | ||
272cc70b AF |
810 | /* Read the SCR to find out if this card supports higher speeds */ |
811 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
812 | cmd.resp_type = MMC_RSP_R1; | |
813 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
814 | |
815 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
816 | ||
817 | if (err) | |
818 | return err; | |
819 | ||
820 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; | |
821 | cmd.resp_type = MMC_RSP_R1; | |
822 | cmd.cmdarg = 0; | |
272cc70b AF |
823 | |
824 | timeout = 3; | |
825 | ||
826 | retry_scr: | |
f781dd38 | 827 | data.dest = (char *)scr; |
272cc70b AF |
828 | data.blocksize = 8; |
829 | data.blocks = 1; | |
830 | data.flags = MMC_DATA_READ; | |
831 | ||
832 | err = mmc_send_cmd(mmc, &cmd, &data); | |
833 | ||
834 | if (err) { | |
835 | if (timeout--) | |
836 | goto retry_scr; | |
837 | ||
838 | return err; | |
839 | } | |
840 | ||
4e3d89ba YK |
841 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
842 | mmc->scr[1] = __be32_to_cpu(scr[1]); | |
272cc70b AF |
843 | |
844 | switch ((mmc->scr[0] >> 24) & 0xf) { | |
845 | case 0: | |
846 | mmc->version = SD_VERSION_1_0; | |
847 | break; | |
848 | case 1: | |
849 | mmc->version = SD_VERSION_1_10; | |
850 | break; | |
851 | case 2: | |
852 | mmc->version = SD_VERSION_2; | |
853 | break; | |
854 | default: | |
855 | mmc->version = SD_VERSION_1_0; | |
856 | break; | |
857 | } | |
858 | ||
b44c7083 AS |
859 | if (mmc->scr[0] & SD_DATA_4BIT) |
860 | mmc->card_caps |= MMC_MODE_4BIT; | |
861 | ||
272cc70b AF |
862 | /* Version 1.0 doesn't support switching */ |
863 | if (mmc->version == SD_VERSION_1_0) | |
864 | return 0; | |
865 | ||
866 | timeout = 4; | |
867 | while (timeout--) { | |
868 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, | |
f781dd38 | 869 | (u8 *)switch_status); |
272cc70b AF |
870 | |
871 | if (err) | |
872 | return err; | |
873 | ||
874 | /* The high-speed function is busy. Try again */ | |
4e3d89ba | 875 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
272cc70b AF |
876 | break; |
877 | } | |
878 | ||
272cc70b | 879 | /* If high-speed isn't supported, we return */ |
4e3d89ba | 880 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
272cc70b AF |
881 | return 0; |
882 | ||
2c3fbf4c ML |
883 | /* |
884 | * If the host doesn't support SD_HIGHSPEED, do not switch card to | |
885 | * HIGHSPEED mode even if the card support SD_HIGHSPPED. | |
886 | * This can avoid furthur problem when the card runs in different | |
887 | * mode between the host. | |
888 | */ | |
889 | if (!((mmc->host_caps & MMC_MODE_HS_52MHz) && | |
890 | (mmc->host_caps & MMC_MODE_HS))) | |
891 | return 0; | |
892 | ||
f781dd38 | 893 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); |
272cc70b AF |
894 | |
895 | if (err) | |
896 | return err; | |
897 | ||
4e3d89ba | 898 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
272cc70b AF |
899 | mmc->card_caps |= MMC_MODE_HS; |
900 | ||
901 | return 0; | |
902 | } | |
903 | ||
904 | /* frequency bases */ | |
905 | /* divided by 10 to be nice to platforms without floating point */ | |
5f837c2c | 906 | static const int fbase[] = { |
272cc70b AF |
907 | 10000, |
908 | 100000, | |
909 | 1000000, | |
910 | 10000000, | |
911 | }; | |
912 | ||
913 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice | |
914 | * to platforms without floating point. | |
915 | */ | |
5f837c2c | 916 | static const int multipliers[] = { |
272cc70b AF |
917 | 0, /* reserved */ |
918 | 10, | |
919 | 12, | |
920 | 13, | |
921 | 15, | |
922 | 20, | |
923 | 25, | |
924 | 30, | |
925 | 35, | |
926 | 40, | |
927 | 45, | |
928 | 50, | |
929 | 55, | |
930 | 60, | |
931 | 70, | |
932 | 80, | |
933 | }; | |
934 | ||
935 | void mmc_set_ios(struct mmc *mmc) | |
936 | { | |
937 | mmc->set_ios(mmc); | |
938 | } | |
939 | ||
940 | void mmc_set_clock(struct mmc *mmc, uint clock) | |
941 | { | |
942 | if (clock > mmc->f_max) | |
943 | clock = mmc->f_max; | |
944 | ||
945 | if (clock < mmc->f_min) | |
946 | clock = mmc->f_min; | |
947 | ||
948 | mmc->clock = clock; | |
949 | ||
950 | mmc_set_ios(mmc); | |
951 | } | |
952 | ||
953 | void mmc_set_bus_width(struct mmc *mmc, uint width) | |
954 | { | |
955 | mmc->bus_width = width; | |
956 | ||
957 | mmc_set_ios(mmc); | |
958 | } | |
959 | ||
960 | int mmc_startup(struct mmc *mmc) | |
961 | { | |
4137894e | 962 | int err, width; |
272cc70b | 963 | uint mult, freq; |
639b7827 | 964 | u64 cmult, csize, capacity; |
272cc70b | 965 | struct mmc_cmd cmd; |
a1969923 | 966 | ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512); |
4137894e | 967 | ALLOC_CACHE_ALIGN_BUFFER(char, test_csd, 512); |
5d4fc8d9 | 968 | int timeout = 1000; |
272cc70b | 969 | |
d52ebf10 TC |
970 | #ifdef CONFIG_MMC_SPI_CRC_ON |
971 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ | |
972 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; | |
973 | cmd.resp_type = MMC_RSP_R1; | |
974 | cmd.cmdarg = 1; | |
d52ebf10 TC |
975 | err = mmc_send_cmd(mmc, &cmd, NULL); |
976 | ||
977 | if (err) | |
978 | return err; | |
979 | } | |
980 | #endif | |
981 | ||
272cc70b | 982 | /* Put the Card in Identify Mode */ |
d52ebf10 TC |
983 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
984 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ | |
272cc70b AF |
985 | cmd.resp_type = MMC_RSP_R2; |
986 | cmd.cmdarg = 0; | |
272cc70b AF |
987 | |
988 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
989 | ||
990 | if (err) | |
991 | return err; | |
992 | ||
993 | memcpy(mmc->cid, cmd.response, 16); | |
994 | ||
995 | /* | |
996 | * For MMC cards, set the Relative Address. | |
997 | * For SD cards, get the Relatvie Address. | |
998 | * This also puts the cards into Standby State | |
999 | */ | |
d52ebf10 TC |
1000 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
1001 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; | |
1002 | cmd.cmdarg = mmc->rca << 16; | |
1003 | cmd.resp_type = MMC_RSP_R6; | |
272cc70b | 1004 | |
d52ebf10 | 1005 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 1006 | |
d52ebf10 TC |
1007 | if (err) |
1008 | return err; | |
272cc70b | 1009 | |
d52ebf10 TC |
1010 | if (IS_SD(mmc)) |
1011 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; | |
1012 | } | |
272cc70b AF |
1013 | |
1014 | /* Get the Card-Specific Data */ | |
1015 | cmd.cmdidx = MMC_CMD_SEND_CSD; | |
1016 | cmd.resp_type = MMC_RSP_R2; | |
1017 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
1018 | |
1019 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1020 | ||
5d4fc8d9 RR |
1021 | /* Waiting for the ready status */ |
1022 | mmc_send_status(mmc, timeout); | |
1023 | ||
272cc70b AF |
1024 | if (err) |
1025 | return err; | |
1026 | ||
998be3dd RV |
1027 | mmc->csd[0] = cmd.response[0]; |
1028 | mmc->csd[1] = cmd.response[1]; | |
1029 | mmc->csd[2] = cmd.response[2]; | |
1030 | mmc->csd[3] = cmd.response[3]; | |
272cc70b AF |
1031 | |
1032 | if (mmc->version == MMC_VERSION_UNKNOWN) { | |
0b453ffe | 1033 | int version = (cmd.response[0] >> 26) & 0xf; |
272cc70b AF |
1034 | |
1035 | switch (version) { | |
1036 | case 0: | |
1037 | mmc->version = MMC_VERSION_1_2; | |
1038 | break; | |
1039 | case 1: | |
1040 | mmc->version = MMC_VERSION_1_4; | |
1041 | break; | |
1042 | case 2: | |
1043 | mmc->version = MMC_VERSION_2_2; | |
1044 | break; | |
1045 | case 3: | |
1046 | mmc->version = MMC_VERSION_3; | |
1047 | break; | |
1048 | case 4: | |
1049 | mmc->version = MMC_VERSION_4; | |
1050 | break; | |
1051 | default: | |
1052 | mmc->version = MMC_VERSION_1_2; | |
1053 | break; | |
1054 | } | |
1055 | } | |
1056 | ||
1057 | /* divide frequency by 10, since the mults are 10x bigger */ | |
0b453ffe RV |
1058 | freq = fbase[(cmd.response[0] & 0x7)]; |
1059 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; | |
272cc70b AF |
1060 | |
1061 | mmc->tran_speed = freq * mult; | |
1062 | ||
998be3dd | 1063 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
272cc70b AF |
1064 | |
1065 | if (IS_SD(mmc)) | |
1066 | mmc->write_bl_len = mmc->read_bl_len; | |
1067 | else | |
998be3dd | 1068 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
272cc70b AF |
1069 | |
1070 | if (mmc->high_capacity) { | |
1071 | csize = (mmc->csd[1] & 0x3f) << 16 | |
1072 | | (mmc->csd[2] & 0xffff0000) >> 16; | |
1073 | cmult = 8; | |
1074 | } else { | |
1075 | csize = (mmc->csd[1] & 0x3ff) << 2 | |
1076 | | (mmc->csd[2] & 0xc0000000) >> 30; | |
1077 | cmult = (mmc->csd[2] & 0x00038000) >> 15; | |
1078 | } | |
1079 | ||
1080 | mmc->capacity = (csize + 1) << (cmult + 2); | |
1081 | mmc->capacity *= mmc->read_bl_len; | |
1082 | ||
1083 | if (mmc->read_bl_len > 512) | |
1084 | mmc->read_bl_len = 512; | |
1085 | ||
1086 | if (mmc->write_bl_len > 512) | |
1087 | mmc->write_bl_len = 512; | |
1088 | ||
1089 | /* Select the card, and put it into Transfer Mode */ | |
d52ebf10 TC |
1090 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
1091 | cmd.cmdidx = MMC_CMD_SELECT_CARD; | |
fe8f7066 | 1092 | cmd.resp_type = MMC_RSP_R1; |
d52ebf10 | 1093 | cmd.cmdarg = mmc->rca << 16; |
d52ebf10 | 1094 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 1095 | |
d52ebf10 TC |
1096 | if (err) |
1097 | return err; | |
1098 | } | |
272cc70b | 1099 | |
e6f99a56 LW |
1100 | /* |
1101 | * For SD, its erase group is always one sector | |
1102 | */ | |
1103 | mmc->erase_grp_size = 1; | |
bc897b1d | 1104 | mmc->part_config = MMCPART_NOAVAILABLE; |
d23e2c09 SG |
1105 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
1106 | /* check ext_csd version and capacity */ | |
1107 | err = mmc_send_ext_csd(mmc, ext_csd); | |
0560db18 | 1108 | if (!err & (ext_csd[EXT_CSD_REV] >= 2)) { |
639b7827 YS |
1109 | /* |
1110 | * According to the JEDEC Standard, the value of | |
1111 | * ext_csd's capacity is valid if the value is more | |
1112 | * than 2GB | |
1113 | */ | |
0560db18 LW |
1114 | capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 |
1115 | | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | |
1116 | | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | |
1117 | | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; | |
639b7827 | 1118 | capacity *= 512; |
b1f1e821 | 1119 | if ((capacity >> 20) > 2 * 1024) |
639b7827 | 1120 | mmc->capacity = capacity; |
d23e2c09 | 1121 | } |
bc897b1d | 1122 | |
e6f99a56 LW |
1123 | /* |
1124 | * Check whether GROUP_DEF is set, if yes, read out | |
1125 | * group size from ext_csd directly, or calculate | |
1126 | * the group size from the csd value. | |
1127 | */ | |
0560db18 LW |
1128 | if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) |
1129 | mmc->erase_grp_size = | |
1130 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 512 * 1024; | |
e6f99a56 LW |
1131 | else { |
1132 | int erase_gsz, erase_gmul; | |
1133 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; | |
1134 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; | |
1135 | mmc->erase_grp_size = (erase_gsz + 1) | |
1136 | * (erase_gmul + 1); | |
1137 | } | |
1138 | ||
bc897b1d | 1139 | /* store the partition info of emmc */ |
0560db18 LW |
1140 | if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) |
1141 | mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; | |
d23e2c09 SG |
1142 | } |
1143 | ||
272cc70b AF |
1144 | if (IS_SD(mmc)) |
1145 | err = sd_change_freq(mmc); | |
1146 | else | |
1147 | err = mmc_change_freq(mmc); | |
1148 | ||
1149 | if (err) | |
1150 | return err; | |
1151 | ||
1152 | /* Restrict card's capabilities by what the host can do */ | |
1153 | mmc->card_caps &= mmc->host_caps; | |
1154 | ||
1155 | if (IS_SD(mmc)) { | |
1156 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
1157 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
1158 | cmd.resp_type = MMC_RSP_R1; | |
1159 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
1160 | |
1161 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1162 | if (err) | |
1163 | return err; | |
1164 | ||
1165 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; | |
1166 | cmd.resp_type = MMC_RSP_R1; | |
1167 | cmd.cmdarg = 2; | |
272cc70b AF |
1168 | err = mmc_send_cmd(mmc, &cmd, NULL); |
1169 | if (err) | |
1170 | return err; | |
1171 | ||
1172 | mmc_set_bus_width(mmc, 4); | |
1173 | } | |
1174 | ||
1175 | if (mmc->card_caps & MMC_MODE_HS) | |
ad5fd922 | 1176 | mmc->tran_speed = 50000000; |
272cc70b | 1177 | else |
ad5fd922 | 1178 | mmc->tran_speed = 25000000; |
272cc70b | 1179 | } else { |
62722036 ŁM |
1180 | width = ((mmc->host_caps & MMC_MODE_MASK_WIDTH_BITS) >> |
1181 | MMC_MODE_WIDTH_BITS_SHIFT); | |
1182 | for (; width >= 0; width--) { | |
272cc70b AF |
1183 | /* Set the card to use 4 bit*/ |
1184 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, | |
4137894e | 1185 | EXT_CSD_BUS_WIDTH, width); |
272cc70b AF |
1186 | |
1187 | if (err) | |
4137894e | 1188 | continue; |
272cc70b | 1189 | |
4137894e LW |
1190 | if (!width) { |
1191 | mmc_set_bus_width(mmc, 1); | |
1192 | break; | |
1193 | } else | |
1194 | mmc_set_bus_width(mmc, 4 * width); | |
1195 | ||
1196 | err = mmc_send_ext_csd(mmc, test_csd); | |
1197 | if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \ | |
1198 | == test_csd[EXT_CSD_PARTITIONING_SUPPORT] | |
1199 | && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1200 | == test_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1201 | && ext_csd[EXT_CSD_REV] \ | |
1202 | == test_csd[EXT_CSD_REV] | |
1203 | && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \ | |
1204 | == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] | |
1205 | && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \ | |
1206 | &test_csd[EXT_CSD_SEC_CNT], 4) == 0) { | |
1207 | ||
1208 | mmc->card_caps |= width; | |
1209 | break; | |
1210 | } | |
272cc70b AF |
1211 | } |
1212 | ||
1213 | if (mmc->card_caps & MMC_MODE_HS) { | |
1214 | if (mmc->card_caps & MMC_MODE_HS_52MHz) | |
ad5fd922 | 1215 | mmc->tran_speed = 52000000; |
272cc70b | 1216 | else |
ad5fd922 JC |
1217 | mmc->tran_speed = 26000000; |
1218 | } | |
272cc70b AF |
1219 | } |
1220 | ||
ad5fd922 JC |
1221 | mmc_set_clock(mmc, mmc->tran_speed); |
1222 | ||
272cc70b AF |
1223 | /* fill in device description */ |
1224 | mmc->block_dev.lun = 0; | |
1225 | mmc->block_dev.type = 0; | |
1226 | mmc->block_dev.blksz = mmc->read_bl_len; | |
9b1f942c | 1227 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
0b453ffe RV |
1228 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8, |
1229 | (mmc->cid[2] << 8) | (mmc->cid[3] >> 24)); | |
1230 | sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff, | |
1231 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
1232 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); | |
1233 | sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, | |
1234 | (mmc->cid[2] >> 24) & 0xf); | |
272cc70b AF |
1235 | init_part(&mmc->block_dev); |
1236 | ||
1237 | return 0; | |
1238 | } | |
1239 | ||
1240 | int mmc_send_if_cond(struct mmc *mmc) | |
1241 | { | |
1242 | struct mmc_cmd cmd; | |
1243 | int err; | |
1244 | ||
1245 | cmd.cmdidx = SD_CMD_SEND_IF_COND; | |
1246 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ | |
1247 | cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa; | |
1248 | cmd.resp_type = MMC_RSP_R7; | |
272cc70b AF |
1249 | |
1250 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1251 | ||
1252 | if (err) | |
1253 | return err; | |
1254 | ||
998be3dd | 1255 | if ((cmd.response[0] & 0xff) != 0xaa) |
272cc70b AF |
1256 | return UNUSABLE_ERR; |
1257 | else | |
1258 | mmc->version = SD_VERSION_2; | |
1259 | ||
1260 | return 0; | |
1261 | } | |
1262 | ||
1263 | int mmc_register(struct mmc *mmc) | |
1264 | { | |
1265 | /* Setup the universal parts of the block interface just once */ | |
1266 | mmc->block_dev.if_type = IF_TYPE_MMC; | |
1267 | mmc->block_dev.dev = cur_dev_num++; | |
1268 | mmc->block_dev.removable = 1; | |
1269 | mmc->block_dev.block_read = mmc_bread; | |
1270 | mmc->block_dev.block_write = mmc_bwrite; | |
e6f99a56 | 1271 | mmc->block_dev.block_erase = mmc_berase; |
8feafcc4 JR |
1272 | if (!mmc->b_max) |
1273 | mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; | |
272cc70b AF |
1274 | |
1275 | INIT_LIST_HEAD (&mmc->link); | |
1276 | ||
1277 | list_add_tail (&mmc->link, &mmc_devices); | |
1278 | ||
1279 | return 0; | |
1280 | } | |
1281 | ||
df3fc526 | 1282 | #ifdef CONFIG_PARTITIONS |
272cc70b AF |
1283 | block_dev_desc_t *mmc_get_dev(int dev) |
1284 | { | |
1285 | struct mmc *mmc = find_mmc_device(dev); | |
40242bc3 ŁM |
1286 | if (!mmc) |
1287 | return NULL; | |
272cc70b | 1288 | |
40242bc3 ŁM |
1289 | mmc_init(mmc); |
1290 | return &mmc->block_dev; | |
272cc70b | 1291 | } |
df3fc526 | 1292 | #endif |
272cc70b AF |
1293 | |
1294 | int mmc_init(struct mmc *mmc) | |
1295 | { | |
afd5932b | 1296 | int err; |
272cc70b | 1297 | |
48972d90 TR |
1298 | if (mmc_getcd(mmc) == 0) { |
1299 | mmc->has_init = 0; | |
1300 | printf("MMC: no card present\n"); | |
1301 | return NO_CARD_ERR; | |
1302 | } | |
1303 | ||
bc897b1d LW |
1304 | if (mmc->has_init) |
1305 | return 0; | |
1306 | ||
272cc70b AF |
1307 | err = mmc->init(mmc); |
1308 | ||
1309 | if (err) | |
1310 | return err; | |
1311 | ||
b86b85e2 IY |
1312 | mmc_set_bus_width(mmc, 1); |
1313 | mmc_set_clock(mmc, 1); | |
1314 | ||
272cc70b AF |
1315 | /* Reset the Card */ |
1316 | err = mmc_go_idle(mmc); | |
1317 | ||
1318 | if (err) | |
1319 | return err; | |
1320 | ||
bc897b1d LW |
1321 | /* The internal partition reset to user partition(0) at every CMD0*/ |
1322 | mmc->part_num = 0; | |
1323 | ||
272cc70b | 1324 | /* Test for SD version 2 */ |
afd5932b | 1325 | err = mmc_send_if_cond(mmc); |
272cc70b | 1326 | |
272cc70b AF |
1327 | /* Now try to get the SD card's operating condition */ |
1328 | err = sd_send_op_cond(mmc); | |
1329 | ||
1330 | /* If the command timed out, we check for an MMC card */ | |
1331 | if (err == TIMEOUT) { | |
1332 | err = mmc_send_op_cond(mmc); | |
1333 | ||
1334 | if (err) { | |
1335 | printf("Card did not respond to voltage select!\n"); | |
1336 | return UNUSABLE_ERR; | |
1337 | } | |
1338 | } | |
1339 | ||
bc897b1d LW |
1340 | err = mmc_startup(mmc); |
1341 | if (err) | |
1342 | mmc->has_init = 0; | |
1343 | else | |
1344 | mmc->has_init = 1; | |
1345 | return err; | |
272cc70b AF |
1346 | } |
1347 | ||
1348 | /* | |
1349 | * CPU and board-specific MMC initializations. Aliased function | |
1350 | * signals caller to move on | |
1351 | */ | |
1352 | static int __def_mmc_init(bd_t *bis) | |
1353 | { | |
1354 | return -1; | |
1355 | } | |
1356 | ||
f9a109b3 PT |
1357 | int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
1358 | int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); | |
272cc70b AF |
1359 | |
1360 | void print_mmc_devices(char separator) | |
1361 | { | |
1362 | struct mmc *m; | |
1363 | struct list_head *entry; | |
1364 | ||
1365 | list_for_each(entry, &mmc_devices) { | |
1366 | m = list_entry(entry, struct mmc, link); | |
1367 | ||
1368 | printf("%s: %d", m->name, m->block_dev.dev); | |
1369 | ||
1370 | if (entry->next != &mmc_devices) | |
1371 | printf("%c ", separator); | |
1372 | } | |
1373 | ||
1374 | printf("\n"); | |
1375 | } | |
1376 | ||
ea6ebe21 LW |
1377 | int get_mmc_num(void) |
1378 | { | |
1379 | return cur_dev_num; | |
1380 | } | |
1381 | ||
272cc70b AF |
1382 | int mmc_initialize(bd_t *bis) |
1383 | { | |
1384 | INIT_LIST_HEAD (&mmc_devices); | |
1385 | cur_dev_num = 0; | |
1386 | ||
1387 | if (board_mmc_init(bis) < 0) | |
1388 | cpu_mmc_init(bis); | |
1389 | ||
1390 | print_mmc_devices(','); | |
1391 | ||
1392 | return 0; | |
1393 | } |