projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| d7ca67b7 | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y | |
| 278b90ce | 3 | CONFIG_SYS_TEXT_BASE=0x00000000 |
| d7ca67b7 | 4 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 5 | CONFIG_ROCKCHIP_RK3288=y | |
| ee14d29d | 6 | CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y |
| d7ca67b7 | 7 | CONFIG_TARGET_FENNEC_RK3288=y |
| 358b6a20 TR |
8 | CONFIG_DEBUG_UART_BASE=0xff690000 |
| 9 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| d7ca67b7 | 10 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
| 11 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec" | |
| fb82fe38 | 12 | CONFIG_DEBUG_UART=y |
| 48f6232e | 13 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
| 98af8799 | 14 | CONFIG_SILENT_CONSOLE=y |
| ef26d603 | 15 | CONFIG_CONSOLE_MUX=y |
| a2a5053a | 16 | CONFIG_DEFAULT_FDT_FILE="rk3288-fennec.dtb" |
| ef26d603 | 17 | # CONFIG_DISPLAY_CPUINFO is not set |
| 78eba69d | 18 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| d7ca67b7 | 19 | CONFIG_SPL_STACK_R=y |
| 20 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 | |
| 88663126 | 21 | CONFIG_CMD_GPIO=y |
| b331cd62 | 22 | CONFIG_CMD_GPT=y |
| 88663126 | 23 | CONFIG_CMD_I2C=y |
| d7ca67b7 | 24 | CONFIG_CMD_MMC=y |
| 25 | CONFIG_CMD_SF=y | |
| 26 | CONFIG_CMD_SPI=y | |
| c00d1651 | 27 | CONFIG_CMD_USB=y |
| d7ca67b7 | 28 | # CONFIG_CMD_SETEXPR is not set |
| d7ca67b7 | 29 | CONFIG_CMD_CACHE=y |
| 30 | CONFIG_CMD_TIME=y | |
| 31 | CONFIG_CMD_PMIC=y | |
| 32 | CONFIG_CMD_REGULATOR=y | |
| b0cf7339 | 33 | # CONFIG_SPL_DOS_PARTITION is not set |
| bd42a942 | 34 | # CONFIG_SPL_EFI_PARTITION is not set |
| b331cd62 | 35 | CONFIG_SPL_PARTITION_UUIDS=y |
| d7ca67b7 | 36 | CONFIG_SPL_OF_CONTROL=y |
| 37 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | |
| 5dc4dfd2 | 38 | CONFIG_ENV_IS_IN_MMC=y |
| d7ca67b7 | 39 | CONFIG_REGMAP=y |
| 40 | CONFIG_SPL_REGMAP=y | |
| 41 | CONFIG_SYSCON=y | |
| 42 | CONFIG_SPL_SYSCON=y | |
| aca5cd27 | 43 | # CONFIG_SPL_SIMPLE_BUS is not set |
| d7ca67b7 | 44 | CONFIG_CLK=y |
| 45 | CONFIG_SPL_CLK=y | |
| 65c96757 AK |
46 | CONFIG_FASTBOOT_FLASH=y |
| 47 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 | |
| 48 | CONFIG_FASTBOOT_CMD_OEM_FORMAT=y | |
| d7ca67b7 | 49 | CONFIG_ROCKCHIP_GPIO=y |
| 50 | CONFIG_SYS_I2C_ROCKCHIP=y | |
| 55ed3b46 | 51 | CONFIG_MMC_DW=y |
| fed44087 | 52 | CONFIG_MMC_DW_ROCKCHIP=y |
| 5c0206cc | 53 | CONFIG_DM_ETH=y |
| 5c0206cc JC |
54 | CONFIG_ETH_DESIGNWARE=y |
| 55 | CONFIG_GMAC_ROCKCHIP=y | |
| d7ca67b7 | 56 | CONFIG_PINCTRL=y |
| d7ca67b7 | 57 | CONFIG_SPL_PINCTRL=y |
| 58 | # CONFIG_SPL_PINCTRL_FULL is not set | |
| 51c7f348 | 59 | CONFIG_PINCTRL_ROCKCHIP_RK3288=y |
| d7ca67b7 | 60 | CONFIG_DM_PMIC=y |
| 453c5a92 | 61 | CONFIG_PMIC_RK8XX=y |
| d7ca67b7 | 62 | CONFIG_DM_REGULATOR_FIXED=y |
| 453c5a92 | 63 | CONFIG_REGULATOR_RK8XX=y |
| d7ca67b7 | 64 | CONFIG_PWM_ROCKCHIP=y |
| 65 | CONFIG_RAM=y | |
| 66 | CONFIG_SPL_RAM=y | |
| d7ca67b7 | 67 | CONFIG_DEBUG_UART_SHIFT=2 |
| aca5cd27 | 68 | CONFIG_SYSRESET=y |
| c00d1651 | 69 | CONFIG_USB=y |
| 4ac72f5c | 70 | CONFIG_USB_DWC2=y |
| 6574864d | 71 | CONFIG_ROCKCHIP_USB2_PHY=y |
| c00d1651 | 72 | CONFIG_USB_STORAGE=y |
| ecad7051 | 73 | CONFIG_USB_GADGET=y |
| a95aee6a MR |
74 | CONFIG_USB_GADGET_MANUFACTURER="Rockchip" |
| 75 | CONFIG_USB_GADGET_VENDOR_NUM=0x2207 | |
| 76 | CONFIG_USB_GADGET_PRODUCT_NUM=0x320a | |
| ecad7051 | 77 | CONFIG_USB_GADGET_DWC2_OTG=y |
| 4f60e5d3 | 78 | CONFIG_USB_FUNCTION_MASS_STORAGE=y |
| ae358449 | 79 | CONFIG_USB_HOST_ETHER=y |
| f58ad98a CP |
80 | CONFIG_USB_ETHER_ASIX=y |
| 81 | CONFIG_USB_ETHER_SMSC95XX=y | |
| d7ca67b7 | 82 | CONFIG_USE_TINY_PRINTF=y |
| 83 | CONFIG_CMD_DHRYSTONE=y | |
| 84 | CONFIG_ERRNO_STR=y |