projects / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 5a8dbdc6 | 1 | Freescale esdhc-specific options |
| c82e9de4 | 2 | |
| 5a8dbdc6 YL |
3 | - CONFIG_FSL_ESDHC_ADAPTER_IDENT |
| 4 | Support Freescale adapter card type identification. This is implemented by | |
| 5 | operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC | |
| 6 | Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot. | |
| 7 | ||
| 8 | SDHC Card ID[0:2] Adapter Card Type | |
| 9 | 0b000 reserved | |
| 10 | 0b001 eMMC Card Rev4.5 | |
| 11 | 0b010 SD/MMC Legacy Card | |
| 12 | 0b011 eMMC Card Rev4.4 | |
| 13 | 0b100 reserved | |
| 14 | 0b101 MMC Card | |
| 15 | 0b110 SD Card Rev2.0/3.0 | |
| 16 | 0b111 No card is present | |
| 17 | - CONFIG_SYS_FSL_ESDHC_LE | |
| 18 | ESDHC IP is in little-endian mode. Accessing ESDHC registers can be | |
| 19 | determined by ESDHC IP's endian mode or processor's endian mode. | |
| 20 | - CONFIG_SYS_FSL_ESDHC_BE | |
| 21 | ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined | |
| 22 | by ESDHC IP's endian mode or processor's endian mode. | |
| 23 | ||
| 24 | - CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V. |