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2d2358ac DM |
1 | /* |
2 | * OMAP USB HOST xHCI Controller | |
3 | * | |
4 | * (C) Copyright 2013 | |
5 | * Texas Instruments, <www.ti.com> | |
6 | * | |
7 | * Author: Dan Murphy <[email protected]> | |
8 | * | |
9 | * SPDX-License-Identifier: GPL-2.0+ | |
10 | */ | |
11 | ||
12 | #include <common.h> | |
13 | #include <usb.h> | |
5d97dff0 | 14 | #include <linux/errno.h> |
2d2358ac DM |
15 | #include <asm/omap_common.h> |
16 | #include <asm/arch/cpu.h> | |
17 | #include <asm/arch/sys_proto.h> | |
2d2358ac DM |
18 | |
19 | #include <linux/compat.h> | |
20 | #include <linux/usb/dwc3.h> | |
41b667b8 | 21 | #include <linux/usb/xhci-omap.h> |
2d2358ac DM |
22 | |
23 | #include "xhci.h" | |
24 | ||
25 | /* Declare global data pointer */ | |
26 | DECLARE_GLOBAL_DATA_PTR; | |
27 | ||
28 | static struct omap_xhci omap; | |
29 | ||
1a9a5f7a | 30 | __weak int omap_xhci_board_usb_init(int index, enum usb_init_type init) |
2d2358ac | 31 | { |
4acfe1ae | 32 | enable_usb_clocks(index); |
2d2358ac DM |
33 | return 0; |
34 | } | |
1a9a5f7a | 35 | |
7e575c46 | 36 | int board_usb_init(int index, enum usb_init_type init) |
1a9a5f7a UM |
37 | { |
38 | return omap_xhci_board_usb_init(index, init); | |
39 | } | |
40 | ||
41 | __weak int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init) | |
42 | { | |
4acfe1ae | 43 | disable_usb_clocks(index); |
1a9a5f7a UM |
44 | return 0; |
45 | } | |
46 | ||
47 | int board_usb_cleanup(int index, enum usb_init_type init) | |
48 | { | |
49 | return omap_xhci_board_usb_cleanup(index, init); | |
50 | } | |
2d2358ac | 51 | |
2d2358ac DM |
52 | static int omap_xhci_core_init(struct omap_xhci *omap) |
53 | { | |
54 | int ret = 0; | |
55 | ||
26707d9e | 56 | usb_phy_power(1); |
834e91af | 57 | omap_enable_phy(omap); |
2d2358ac DM |
58 | |
59 | ret = dwc3_core_init(omap->dwc3_reg); | |
60 | if (ret) { | |
61 | debug("%s:failed to initialize core\n", __func__); | |
62 | return ret; | |
63 | } | |
64 | ||
65 | /* We are hard-coding DWC3 core to Host Mode */ | |
66 | dwc3_set_mode(omap->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); | |
67 | ||
68 | return ret; | |
69 | } | |
70 | ||
71 | static void omap_xhci_core_exit(struct omap_xhci *omap) | |
72 | { | |
834e91af | 73 | usb_phy_power(0); |
2d2358ac DM |
74 | } |
75 | ||
76 | int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) | |
77 | { | |
78 | struct omap_xhci *ctx = &omap; | |
79 | int ret = 0; | |
80 | ||
81 | ctx->hcd = (struct xhci_hccr *)OMAP_XHCI_BASE; | |
82 | ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); | |
83 | ctx->usb3_phy = (struct omap_usb3_phy *)OMAP_OCP1_SCP_BASE; | |
84 | ctx->otg_wrapper = (struct omap_dwc_wrapper *)OMAP_OTG_WRAPPER_BASE; | |
85 | ||
b2168211 | 86 | ret = board_usb_init(index, USB_INIT_HOST); |
2d2358ac DM |
87 | if (ret != 0) { |
88 | puts("Failed to initialize board for USB\n"); | |
89 | return ret; | |
90 | } | |
91 | ||
92 | ret = omap_xhci_core_init(ctx); | |
93 | if (ret < 0) { | |
94 | puts("Failed to initialize xhci\n"); | |
95 | return ret; | |
96 | } | |
97 | ||
98 | *hccr = (struct xhci_hccr *)(OMAP_XHCI_BASE); | |
99 | *hcor = (struct xhci_hcor *)((uint32_t) *hccr | |
100 | + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); | |
101 | ||
102 | debug("omap-xhci: init hccr %x and hcor %x hc_length %d\n", | |
103 | (uint32_t)*hccr, (uint32_t)*hcor, | |
104 | (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); | |
105 | ||
106 | return ret; | |
107 | } | |
108 | ||
109 | void xhci_hcd_stop(int index) | |
110 | { | |
111 | struct omap_xhci *ctx = &omap; | |
112 | ||
113 | omap_xhci_core_exit(ctx); | |
f1811443 | 114 | board_usb_cleanup(index, USB_INIT_HOST); |
2d2358ac | 115 | } |