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Commit | Line | Data |
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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
feb7838f | 2 | /* |
7a577fda | 3 | * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc. |
feb7838f SS |
4 | */ |
5 | ||
6f2ed0e9 | 6 | #include "config.h" |
7a577fda KG |
7 | |
8 | #ifdef CONFIG_RESET_VECTOR_ADDRESS | |
9 | #define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS | |
10 | #else | |
6c97a20d KG |
11 | #define RESET_VECTOR_ADDRESS 0xfffffffc |
12 | #endif | |
13 | ||
feb7838f | 14 | OUTPUT_ARCH(powerpc) |
de14a5a9 | 15 | ENTRY(_start) |
fbe53f59 | 16 | |
feb7838f SS |
17 | PHDRS |
18 | { | |
19 | text PT_LOAD; | |
20 | bss PT_LOAD; | |
21 | } | |
22 | ||
23 | SECTIONS | |
24 | { | |
25 | /* Read-only sections, merged into text segment: */ | |
1245c6e2 T |
26 | #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC |
27 | .bootpg CONFIG_SYS_TEXT_BASE - 0x1000 : | |
28 | { | |
29 | KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) | |
30 | } :text = 0xffff | |
31 | . = CONFIG_SYS_TEXT_BASE; | |
32 | #endif | |
feb7838f SS |
33 | .text : |
34 | { | |
fbe53f59 | 35 | *(.text*) |
feb7838f SS |
36 | } :text |
37 | _etext = .; | |
38 | PROVIDE (etext = .); | |
39 | .rodata : | |
40 | { | |
feb7838f SS |
41 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
42 | } :text | |
feb7838f SS |
43 | |
44 | /* Read-write section, merged into data segment: */ | |
45 | . = (. + 0x00FF) & 0xFFFFFF00; | |
46 | _erotext = .; | |
47 | PROVIDE (erotext = .); | |
48 | .reloc : | |
49 | { | |
feb7838f | 50 | _GOT2_TABLE_ = .; |
fbe53f59 | 51 | KEEP(*(.got2)) |
337f5f50 | 52 | KEEP(*(.got)) |
feb7838f | 53 | _FIXUP_TABLE_ = .; |
fbe53f59 | 54 | KEEP(*(.fixup)) |
feb7838f | 55 | } |
337f5f50 | 56 | __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; |
feb7838f SS |
57 | __fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
58 | ||
59 | .data : | |
60 | { | |
fbe53f59 PT |
61 | *(.data*) |
62 | *(.sdata*) | |
feb7838f SS |
63 | } |
64 | _edata = .; | |
65 | PROVIDE (edata = .); | |
66 | ||
67 | . = .; | |
feb7838f | 68 | |
55675142 | 69 | . = ALIGN(4); |
99e2fbcb AS |
70 | __u_boot_list : { |
71 | KEEP(*(SORT(__u_boot_list*))); | |
55675142 MV |
72 | } |
73 | ||
feb7838f SS |
74 | . = .; |
75 | __start___ex_table = .; | |
76 | __ex_table : { *(__ex_table) } | |
77 | __stop___ex_table = .; | |
78 | ||
e8c0e006 | 79 | . = ALIGN(4); |
feb7838f SS |
80 | __init_begin = .; |
81 | .text.init : { *(.text.init) } | |
82 | .data.init : { *(.data.init) } | |
e8c0e006 | 83 | . = ALIGN(4); |
feb7838f | 84 | __init_end = .; |
4d3294b1 | 85 | _end = .; |
feb7838f | 86 | |
1245c6e2 | 87 | #ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC |
6c97a20d | 88 | .bootpg RESET_VECTOR_ADDRESS - 0xffc : |
feb7838f | 89 | { |
a47a12be | 90 | arch/powerpc/cpu/mpc85xx/start.o (.bootpg) |
feb7838f SS |
91 | } :text = 0xffff |
92 | ||
6c97a20d | 93 | .resetvec RESET_VECTOR_ADDRESS : |
feb7838f | 94 | { |
fbe53f59 | 95 | KEEP(*(.resetvec)) |
feb7838f SS |
96 | } :text = 0xffff |
97 | ||
6c97a20d | 98 | . = RESET_VECTOR_ADDRESS + 0x4; |
feb7838f | 99 | |
3beb40c2 PT |
100 | /* |
101 | * Make sure that the bss segment isn't linked at 0x0, otherwise its | |
102 | * address won't be updated during relocation fixups. Note that | |
103 | * this is a temporary fix. Code to dynamically the fixup the bss | |
104 | * location will be added in the future. When the bss relocation | |
105 | * fixup code is present this workaround should be removed. | |
106 | */ | |
107 | #if (RESET_VECTOR_ADDRESS == 0xfffffffc) | |
108 | . |= 0x10; | |
5df572f0 | 109 | #endif |
3beb40c2 PT |
110 | #endif |
111 | ||
feb7838f SS |
112 | __bss_start = .; |
113 | .bss (NOLOAD) : | |
114 | { | |
fbe53f59 PT |
115 | *(.sbss*) |
116 | *(.bss*) | |
feb7838f SS |
117 | *(COMMON) |
118 | } :bss | |
119 | ||
120 | . = ALIGN(4); | |
3929fb0a | 121 | __bss_end = . ; |
feb7838f SS |
122 | PROVIDE (end = .); |
123 | } |