]> Git Repo - u-boot.git/blame - README
Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig
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83d290c5 1# SPDX-License-Identifier: GPL-2.0+
c609719b 2#
eca3aeb3 3# (C) Copyright 2000 - 2013
c609719b 4# Wolfgang Denk, DENX Software Engineering, [email protected].
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5
6Summary:
7========
8
24ee89b9 9This directory contains the source code for U-Boot, a boot loader for
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10Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
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14
15The development of U-Boot is closely related to Linux: some parts of
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16the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
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18support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
24ee89b9 32Makefile have been tested to some extent and can be considered
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33"working". In fact, many of them are used in production systems.
34
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35In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
c609719b 39
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40Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
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43
44 make CHANGELOG
45
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46
47Where to get help:
48==================
49
24ee89b9 50In case you have questions about, problems with or contributions for
7207b366 51U-Boot, you should send a message to the U-Boot mailing list at
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52<[email protected]>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
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54Please see https://lists.denx.de/pipermail/u-boot and
55https://marc.info/?l=u-boot
c609719b 56
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57Where to get source code:
58=========================
59
7207b366 60The U-Boot source code is maintained in the Git repository at
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61https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
62https://source.denx.de/u-boot/u-boot
218ca724 63
c4bd51e2 64The "Tags" links on this page allow you to download tarballs of
11ccc33f 65any version you might be interested in. Official releases are also
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66available from the DENX file server through HTTPS or FTP.
67https://ftp.denx.de/pub/u-boot/
68ftp://ftp.denx.de/pub/u-boot/
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69
70
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71Where we come from:
72===================
73
74- start from 8xxrom sources
047f6ec0 75- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
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76- clean up code
77- make it easier to add custom boards
78- make it possible to add other [PowerPC] CPUs
79- extend functions, especially:
80 * Provide extended interface to Linux boot loader
81 * S-Record download
82 * network boot
9e5616de 83 * ATA disk / SCSI ... boot
047f6ec0 84- create ARMBoot project (https://sourceforge.net/projects/armboot)
c609719b 85- add other CPU families (starting with ARM)
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86- create U-Boot project (https://sourceforge.net/projects/u-boot)
87- current project page: see https://www.denx.de/wiki/U-Boot
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88
89
90Names and Spelling:
91===================
92
93The "official" name of this project is "Das U-Boot". The spelling
94"U-Boot" shall be used in all written text (documentation, comments
95in source files etc.). Example:
96
97 This is the README file for the U-Boot project.
98
99File names etc. shall be based on the string "u-boot". Examples:
100
101 include/asm-ppc/u-boot.h
102
103 #include <asm/u-boot.h>
104
105Variable names, preprocessor constants etc. shall be either based on
106the string "u_boot" or on "U_BOOT". Example:
107
108 U_BOOT_VERSION u_boot_logo
109 IH_OS_U_BOOT u_boot_hush_start
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110
111
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112Versioning:
113===========
114
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115Starting with the release in October 2008, the names of the releases
116were changed from numerical release numbers without deeper meaning
117into a time stamp based numbering. Regular releases are identified by
118names consisting of the calendar year and month of the release date.
119Additional fields (if present) indicate release candidates or bug fix
120releases in "stable" maintenance trees.
121
122Examples:
c0f40859 123 U-Boot v2009.11 - Release November 2009
360d883a 124 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
0de21ecb 125 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
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126
127
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128Directory Hierarchy:
129====================
130
6e73ed00 131/arch Architecture-specific files
6eae68e4 132 /arc Files generic to ARC architecture
8d321b81 133 /arm Files generic to ARM architecture
8d321b81 134 /m68k Files generic to m68k architecture
8d321b81 135 /microblaze Files generic to microblaze architecture
8d321b81 136 /mips Files generic to MIPS architecture
afc1ce82 137 /nds32 Files generic to NDS32 architecture
8d321b81 138 /nios2 Files generic to Altera NIOS2 architecture
a47a12be 139 /powerpc Files generic to PowerPC architecture
3fafced7 140 /riscv Files generic to RISC-V architecture
7207b366 141 /sandbox Files generic to HW-independent "sandbox"
8d321b81 142 /sh Files generic to SH architecture
33c7731b 143 /x86 Files generic to x86 architecture
e4eb313a 144 /xtensa Files generic to Xtensa architecture
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145/api Machine/arch-independent API for external apps
146/board Board-dependent files
19a91f24 147/boot Support for images and booting
740f7e5c 148/cmd U-Boot commands functions
6e73ed00 149/common Misc architecture-independent functions
7207b366 150/configs Board default configuration files
8d321b81 151/disk Code for disk drive partition handling
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152/doc Documentation (a mix of ReST and READMEs)
153/drivers Device drivers
154/dts Makefile for building internal U-Boot fdt.
155/env Environment support
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156/examples Example code for standalone applications, etc.
157/fs Filesystem code (cramfs, ext2, jffs2, etc.)
158/include Header Files
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159/lib Library routines generic to all architectures
160/Licenses Various license files
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161/net Networking code
162/post Power On Self Test
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163/scripts Various build scripts and Makefiles
164/test Various unit test files
6e73ed00 165/tools Tools to build and sign FIT images, etc.
c609719b 166
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167Software Configuration:
168=======================
169
170Configuration is usually done using C preprocessor defines; the
171rationale behind that is to avoid dead code whenever possible.
172
173There are two classes of configuration variables:
174
175* Configuration _OPTIONS_:
176 These are selectable by the user and have names beginning with
177 "CONFIG_".
178
179* Configuration _SETTINGS_:
180 These depend on the hardware etc. and should not be meddled with if
181 you don't know what you're doing; they have names beginning with
6d0f6bcf 182 "CONFIG_SYS_".
c609719b 183
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184Previously, all configuration was done by hand, which involved creating
185symbolic links and editing configuration files manually. More recently,
186U-Boot has added the Kbuild infrastructure used by the Linux kernel,
187allowing you to use the "make menuconfig" command to configure your
188build.
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189
190
191Selection of Processor Architecture and Board Type:
192---------------------------------------------------
193
194For all supported boards there are ready-to-use default
ab584d67 195configurations available; just type "make <board_name>_defconfig".
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196
197Example: For a TQM823L module type:
198
199 cd u-boot
ab584d67 200 make TQM823L_defconfig
c609719b 201
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202Note: If you're looking for the default configuration file for a board
203you're sure used to be there but is now missing, check the file
204doc/README.scrapyard for a list of no longer supported boards.
c609719b 205
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206Sandbox Environment:
207--------------------
208
209U-Boot can be built natively to run on a Linux host using the 'sandbox'
210board. This allows feature development which is not board- or architecture-
211specific to be undertaken on a native platform. The sandbox is also used to
212run some of U-Boot's tests.
213
bbb140ed 214See doc/arch/sandbox.rst for more details.
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215
216
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217Board Initialisation Flow:
218--------------------------
219
220This is the intended start-up flow for boards. This should apply for both
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221SPL and U-Boot proper (i.e. they both follow the same rules).
222
223Note: "SPL" stands for "Secondary Program Loader," which is explained in
224more detail later in this file.
225
226At present, SPL mostly uses a separate code path, but the function names
227and roles of each function are the same. Some boards or architectures
228may not conform to this. At least most ARM boards which use
229CONFIG_SPL_FRAMEWORK conform to this.
230
231Execution typically starts with an architecture-specific (and possibly
232CPU-specific) start.S file, such as:
233
234 - arch/arm/cpu/armv7/start.S
235 - arch/powerpc/cpu/mpc83xx/start.S
236 - arch/mips/cpu/start.S
db910353 237
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238and so on. From there, three functions are called; the purpose and
239limitations of each of these functions are described below.
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240
241lowlevel_init():
242 - purpose: essential init to permit execution to reach board_init_f()
243 - no global_data or BSS
244 - there is no stack (ARMv7 may have one but it will soon be removed)
245 - must not set up SDRAM or use console
246 - must only do the bare minimum to allow execution to continue to
247 board_init_f()
248 - this is almost never needed
249 - return normally from this function
250
251board_init_f():
252 - purpose: set up the machine ready for running board_init_r():
253 i.e. SDRAM and serial UART
254 - global_data is available
255 - stack is in SRAM
256 - BSS is not available, so you cannot use global/static variables,
257 only stack variables and global_data
258
259 Non-SPL-specific notes:
260 - dram_init() is called to set up DRAM. If already done in SPL this
261 can do nothing
262
263 SPL-specific notes:
264 - you can override the entire board_init_f() function with your own
265 version as needed.
266 - preloader_console_init() can be called here in extremis
267 - should set up SDRAM, and anything needed to make the UART work
499696e4 268 - there is no need to clear BSS, it will be done by crt0.S
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269 - for specific scenarios on certain architectures an early BSS *can*
270 be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
271 of BSS prior to entering board_init_f()) but doing so is discouraged.
272 Instead it is strongly recommended to architect any code changes
273 or additions such to not depend on the availability of BSS during
274 board_init_f() as indicated in other sections of this README to
275 maintain compatibility and consistency across the entire code base.
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276 - must return normally from this function (don't call board_init_r()
277 directly)
278
279Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
280this point the stack and global_data are relocated to below
281CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
282memory.
283
284board_init_r():
285 - purpose: main execution, common code
286 - global_data is available
287 - SDRAM is available
288 - BSS is available, all static/global variables can be used
289 - execution eventually continues to main_loop()
290
291 Non-SPL-specific notes:
292 - U-Boot is relocated to the top of memory and is now running from
293 there.
294
295 SPL-specific notes:
296 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
297 CONFIG_SPL_STACK_R_ADDR points into SDRAM
298 - preloader_console_init() can be called here - typically this is
0680f1b1 299 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
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300 spl_board_init() function containing this call
301 - loads U-Boot or (in falcon mode) Linux
302
303
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304Configuration Options:
305----------------------
306
307Configuration depends on the combination of board and CPU type; all
308such information is kept in a configuration file
309"include/configs/<board_name>.h".
310
311Example: For a TQM823L module, all configuration settings are in
312"include/configs/TQM823L.h".
313
314
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315Many of the options are named exactly as the corresponding Linux
316kernel configuration options. The intention is to make it easier to
317build a config tool - later.
318
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319- ARM Platform Bus Type(CCI):
320 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
321 provides full cache coherency between two clusters of multi-core
322 CPUs and I/O coherency for devices and I/O masters
323
324 CONFIG_SYS_FSL_HAS_CCI400
325
326 Defined For SoC that has cache coherent interconnect
327 CCN-400
7f6c2cbc 328
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329 CONFIG_SYS_FSL_HAS_CCN504
330
331 Defined for SoC that has cache coherent interconnect CCN-504
332
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333The following options need to be configured:
334
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335- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
336
337- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
6ccec449 338
66412c63 339- 85xx CPU Options:
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340 CONFIG_SYS_PPC64
341
342 Specifies that the core is a 64-bit PowerPC implementation (implements
343 the "64" category of the Power ISA). This is necessary for ePAPR
344 compliance, among other possible reasons.
345
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346 CONFIG_SYS_FSL_TBCLK_DIV
347
348 Defines the core time base clock divider ratio compared to the
349 system clock. On most PQ3 devices this is 8, on newer QorIQ
350 devices it can be 16 or 32. The ratio varies from SoC to Soc.
351
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352 CONFIG_SYS_FSL_PCIE_COMPAT
353
354 Defines the string to utilize when trying to match PCIe device
355 tree nodes for the given platform.
356
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357 CONFIG_SYS_FSL_ERRATUM_A004510
358
359 Enables a workaround for erratum A004510. If set,
360 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
361 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
362
363 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
364 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
365
366 Defines one or two SoC revisions (low 8 bits of SVR)
367 for which the A004510 workaround should be applied.
368
369 The rest of SVR is either not relevant to the decision
370 of whether the erratum is present (e.g. p2040 versus
371 p2041) or is implied by the build target, which controls
372 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
373
374 See Freescale App Note 4493 for more information about
375 this erratum.
376
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377 CONFIG_A003399_NOR_WORKAROUND
378 Enables a workaround for IFC erratum A003399. It is only
b445bbb4 379 required during NOR boot.
74fa22ed 380
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381 CONFIG_A008044_WORKAROUND
382 Enables a workaround for T1040/T1042 erratum A008044. It is only
b445bbb4 383 required during NAND boot and valid for Rev 1.0 SoC revision
9f074e67 384
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385 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
386
387 This is the value to write into CCSR offset 0x18600
388 according to the A004510 workaround.
389
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390 CONFIG_SYS_FSL_DSP_DDR_ADDR
391 This value denotes start offset of DDR memory which is
392 connected exclusively to the DSP cores.
393
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394 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
395 This value denotes start offset of M2 memory
396 which is directly connected to the DSP core.
397
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398 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
399 This value denotes start offset of M3 memory which is directly
400 connected to the DSP core.
401
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402 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
403 This value denotes start offset of DSP CCSR space.
404
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405 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
406 Single Source Clock is clocking mode present in some of FSL SoC's.
407 In this mode, a single differential clock is used to supply
408 clocks to the sysclock, ddrclock and usbclock.
409
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410 CONFIG_SYS_CPC_REINIT_F
411 This CONFIG is defined when the CPC is configured as SRAM at the
a187559e 412 time of U-Boot entry and is required to be re-initialized.
fb4a2409 413
aade2004 414 CONFIG_DEEP_SLEEP
b445bbb4 415 Indicates this SoC supports deep sleep feature. If deep sleep is
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416 supported, core will start to execute uboot when wakes up.
417
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418- Generic CPU options:
419 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
420
421 Defines the endianess of the CPU. Implementation of those
422 values is arch specific.
423
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424 CONFIG_SYS_FSL_DDR
425 Freescale DDR driver in use. This type of DDR controller is
1c58857a 426 found in mpc83xx, mpc85xx as well as some ARM core SoCs.
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427
428 CONFIG_SYS_FSL_DDR_ADDR
429 Freescale DDR memory-mapped register base.
430
431 CONFIG_SYS_FSL_DDR_EMU
432 Specify emulator support for DDR. Some DDR features such as
433 deskew training are not available.
434
435 CONFIG_SYS_FSL_DDRC_GEN1
436 Freescale DDR1 controller.
437
438 CONFIG_SYS_FSL_DDRC_GEN2
439 Freescale DDR2 controller.
440
441 CONFIG_SYS_FSL_DDRC_GEN3
442 Freescale DDR3 controller.
443
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444 CONFIG_SYS_FSL_DDRC_GEN4
445 Freescale DDR4 controller.
446
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447 CONFIG_SYS_FSL_DDRC_ARM_GEN3
448 Freescale DDR3 controller for ARM-based SoCs.
449
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450 CONFIG_SYS_FSL_DDR1
451 Board config to use DDR1. It can be enabled for SoCs with
452 Freescale DDR1 or DDR2 controllers, depending on the board
453 implemetation.
454
455 CONFIG_SYS_FSL_DDR2
62a3b7dd 456 Board config to use DDR2. It can be enabled for SoCs with
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457 Freescale DDR2 or DDR3 controllers, depending on the board
458 implementation.
459
460 CONFIG_SYS_FSL_DDR3
461 Board config to use DDR3. It can be enabled for SoCs with
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462 Freescale DDR3 or DDR3L controllers.
463
464 CONFIG_SYS_FSL_DDR3L
465 Board config to use DDR3L. It can be enabled for SoCs with
466 DDR3L controllers.
5614e71b 467
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468 CONFIG_SYS_FSL_IFC_BE
469 Defines the IFC controller register space as Big Endian
470
471 CONFIG_SYS_FSL_IFC_LE
472 Defines the IFC controller register space as Little Endian
473
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474 CONFIG_SYS_FSL_IFC_CLK_DIV
475 Defines divider of platform clock(clock input to IFC controller).
476
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477 CONFIG_SYS_FSL_LBC_CLK_DIV
478 Defines divider of platform clock(clock input to eLBC controller).
479
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480 CONFIG_SYS_FSL_DDR_BE
481 Defines the DDR controller register space as Big Endian
482
483 CONFIG_SYS_FSL_DDR_LE
484 Defines the DDR controller register space as Little Endian
485
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486 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
487 Physical address from the view of DDR controllers. It is the
488 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
489 it could be different for ARM SoCs.
490
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491 CONFIG_SYS_FSL_DDR_INTLV_256B
492 DDR controller interleaving on 256-byte. This is a special
493 interleaving mode, handled by Dickens for Freescale layerscape
494 SoCs with ARM core.
495
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496 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
497 Number of controllers used as main memory.
498
499 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
500 Number of controllers used for other than main memory.
501
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502 CONFIG_SYS_FSL_HAS_DP_DDR
503 Defines the SoC has DP-DDR used for DPAA.
504
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505 CONFIG_SYS_FSL_SEC_BE
506 Defines the SEC controller register space as Big Endian
507
508 CONFIG_SYS_FSL_SEC_LE
509 Defines the SEC controller register space as Little Endian
510
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511- MIPS CPU options:
512 CONFIG_SYS_INIT_SP_OFFSET
513
514 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
515 pointer. This is needed for the temporary stack before
516 relocation.
517
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518 CONFIG_XWAY_SWAP_BYTES
519
520 Enable compilation of tools/xway-swap-bytes needed for Lantiq
521 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
522 be swapped if a flash programmer is used.
523
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524- ARM options:
525 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
526
527 Select high exception vectors of the ARM core, e.g., do not
528 clear the V bit of the c1 register of CP15.
529
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530 COUNTER_FREQUENCY
531 Generic timer clock source frequency.
532
533 COUNTER_FREQUENCY_REAL
534 Generic timer clock source frequency if the real clock is
535 different from COUNTER_FREQUENCY, and can only be determined
536 at run time.
537
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538- Tegra SoC options:
539 CONFIG_TEGRA_SUPPORT_NON_SECURE
540
541 Support executing U-Boot in non-secure (NS) mode. Certain
542 impossible actions will be skipped if the CPU is in NS mode,
543 such as ARM architectural timer initialization.
544
5da627a4 545- Linux Kernel Interface:
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546 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
547
b445bbb4 548 When transferring memsize parameter to Linux, some versions
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549 expect it to be in bytes, others in MB.
550 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
551
fec6d9ee 552 CONFIG_OF_LIBFDT
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553
554 New kernel versions are expecting firmware settings to be
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555 passed using flattened device trees (based on open firmware
556 concepts).
557
558 CONFIG_OF_LIBFDT
559 * New libfdt-based support
560 * Adds the "fdt" command
3bb342fc 561 * The bootm command automatically updates the fdt
213bf8c8 562
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563 OF_TBCLK - The timebase frequency.
564
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565 boards with QUICC Engines require OF_QE to set UCC MAC
566 addresses
3bb342fc 567
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568 CONFIG_OF_BOARD_SETUP
569
570 Board code has addition modification that it wants to make
571 to the flat device tree before handing it off to the kernel
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573 CONFIG_OF_SYSTEM_SETUP
574
575 Other code has addition modification that it wants to make
576 to the flat device tree before handing it off to the kernel.
577 This causes ft_system_setup() to be called before booting
578 the kernel.
579
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580 CONFIG_OF_IDE_FIXUP
581
582 U-Boot can detect if an IDE device is present or not.
583 If not, and this new config option is activated, U-Boot
584 removes the ATA node from the DTS before booting Linux,
585 so the Linux IDE driver does not probe the device and
586 crash. This is needed for buggy hardware (uc101) where
587 no pull down resistor is connected to the signal IDE5V_DD7.
588
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589- vxWorks boot parameters:
590
591 bootvx constructs a valid bootline using the following
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592 environments variables: bootdev, bootfile, ipaddr, netmask,
593 serverip, gatewayip, hostname, othbootargs.
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594 It loads the vxWorks image pointed bootfile.
595
81a05d9b 596 Note: If a "bootargs" environment is defined, it will override
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597 the defaults discussed just above.
598
2c451f78 599- Cache Configuration:
2c451f78
A
600 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
601
93bc2193
A
602- Cache Configuration for ARM:
603 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
604 controller
605 CONFIG_SYS_PL310_BASE - Physical base address of PL310
606 controller register space
607
6705d81e 608- Serial Ports:
6705d81e
WD
609 CONFIG_PL011_CLOCK
610
611 If you have Amba PrimeCell PL011 UARTs, set this variable to
612 the clock speed of the UARTs.
613
614 CONFIG_PL01x_PORTS
615
616 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
617 define this to a list of base addresses for each (supported)
618 port. See e.g. include/configs/versatile.h
619
d57dee57
KM
620 CONFIG_SERIAL_HW_FLOW_CONTROL
621
622 Define this variable to enable hw flow control in serial driver.
623 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 624
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WD
625- Serial Download Echo Mode:
626 CONFIG_LOADS_ECHO
627 If defined to 1, all characters received during a
628 serial download (using the "loads" command) are
629 echoed back. This might be needed by some terminal
630 emulations (like "cu"), but may as well just take
631 time on others. This setting #define's the initial
632 value of the "loads_echo" environment variable.
633
302a6487
SG
634- Removal of commands
635 If no commands are needed to boot, you can disable
636 CONFIG_CMDLINE to remove them. In this case, the command line
637 will not be available, and when U-Boot wants to execute the
638 boot command (on start-up) it will call board_run_command()
639 instead. This can reduce image size significantly for very
640 simple boot procedures.
641
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WD
642- Regular expression support:
643 CONFIG_REGEX
93e14596
WD
644 If this variable is defined, U-Boot is linked against
645 the SLRE (Super Light Regular Expression) library,
646 which adds regex support to some commands, as for
647 example "env grep" and "setexpr".
a5ecbe62 648
45ba8077
SG
649- Device tree:
650 CONFIG_OF_CONTROL
651 If this variable is defined, U-Boot will use a device tree
652 to configure its devices, instead of relying on statically
653 compiled #defines in the board file. This option is
654 experimental and only available on a few boards. The device
655 tree is available in the global data as gd->fdt_blob.
656
2c0f79e4 657 U-Boot needs to get its device tree from somewhere. This can
82f766d1 658 be done using one of the three options below:
bbb0b128 659
2c0f79e4
SG
660 CONFIG_OF_SEPARATE
661 If this variable is defined, U-Boot will build a device tree
662 binary. It will be called u-boot.dtb. Architecture-specific
663 code will locate it at run-time. Generally this works by:
664
665 cat u-boot.bin u-boot.dtb >image.bin
666
667 and in fact, U-Boot does this for you, creating a file called
668 u-boot-dtb.bin which is useful in the common case. You can
669 still use the individual files if you need something more
670 exotic.
671
82f766d1
AD
672 CONFIG_OF_BOARD
673 If this variable is defined, U-Boot will use the device tree
674 provided by the board at runtime instead of embedding one with
675 the image. Only boards defining board_fdt_blob_setup() support
676 this option (see include/fdtdec.h file).
677
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678- Watchdog:
679 CONFIG_WATCHDOG
680 If this variable is defined, it enables watchdog
6abe6fb6 681 support for the SoC. There must be support in the SoC
907208c4
CL
682 specific code for a watchdog. For the 8xx
683 CPUs, the SIU Watchdog feature is enabled in the SYPCR
684 register. When supported for a specific SoC is
685 available, then no further board specific code should
686 be needed to use it.
6abe6fb6
DZ
687
688 CONFIG_HW_WATCHDOG
689 When using a watchdog circuitry external to the used
690 SoC, then define this variable and provide board
691 specific code for the "hw_watchdog_reset" function.
c609719b 692
933ada56
RV
693 CONFIG_SYS_WATCHDOG_FREQ
694 Some platforms automatically call WATCHDOG_RESET()
695 from the timer interrupt handler every
696 CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the
697 board configuration file, a default of CONFIG_SYS_HZ/2
698 (i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ
699 to 0 disables calling WATCHDOG_RESET() from the timer
700 interrupt.
701
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702- Real-Time Clock:
703
602ad3b3 704 When CONFIG_CMD_DATE is selected, the type of the RTC
c609719b
WD
705 has to be selected, too. Define exactly one of the
706 following options:
707
c609719b 708 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
4e8b7544 709 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
c609719b 710 CONFIG_RTC_MC146818 - use MC146818 RTC
1cb8e980 711 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
c609719b 712 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
7f70e853 713 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
412921d2 714 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
3bac3513 715 CONFIG_RTC_DS164x - use Dallas DS164x RTC
9536dfcc 716 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
4c0d4c3b 717 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
2bd3cab3 718 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
71d19f30
HS
719 CONFIG_SYS_RV3029_TCR - enable trickle charger on
720 RV3029 RTC.
c609719b 721
b37c7e5e
WD
722 Note that if the RTC uses I2C, then the I2C interface
723 must also be configured. See I2C Support, below.
724
e92739d3
PT
725- GPIO Support:
726 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
e92739d3 727
5dec49ca
CP
728 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
729 chip-ngpio pairs that tell the PCA953X driver the number of
730 pins supported by a particular chip.
731
e92739d3
PT
732 Note that if the GPIO device uses I2C, then the I2C interface
733 must also be configured. See I2C Support, below.
734
aa53233a
SG
735- I/O tracing:
736 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
737 accesses and can checksum them or write a list of them out
738 to memory. See the 'iotrace' command for details. This is
739 useful for testing device drivers since it can confirm that
740 the driver behaves the same way before and after a code
741 change. Currently this is supported on sandbox and arm. To
742 add support for your architecture, add '#include <iotrace.h>'
743 to the bottom of arch/<arch>/include/asm/io.h and test.
744
745 Example output from the 'iotrace stats' command is below.
746 Note that if the trace buffer is exhausted, the checksum will
747 still continue to operate.
748
749 iotrace is enabled
750 Start: 10000000 (buffer start address)
751 Size: 00010000 (buffer size)
752 Offset: 00000120 (current buffer offset)
753 Output: 10000120 (start + offset)
754 Count: 00000018 (number of trace records)
755 CRC32: 9526fb66 (CRC32 of all trace records)
756
c609719b
WD
757- Timestamp Support:
758
43d9616c
WD
759 When CONFIG_TIMESTAMP is selected, the timestamp
760 (date and time) of an image is printed by image
761 commands like bootm or iminfo. This option is
602ad3b3 762 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 763
923c46f9
KP
764- Partition Labels (disklabels) Supported:
765 Zero or more of the following:
766 CONFIG_MAC_PARTITION Apple's MacOS partition table.
923c46f9
KP
767 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
768 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
769 bootloader. Note 2TB partition limit; see
770 disk/part_efi.c
c649e3c9 771 CONFIG_SCSI) you must configure support for at
923c46f9 772 least one non-MTD partition type as well.
c609719b
WD
773
774- IDE Reset method:
4d13cbad
WD
775 CONFIG_IDE_RESET_ROUTINE - this is defined in several
776 board configurations files but used nowhere!
c609719b 777
4d13cbad
WD
778 CONFIG_IDE_RESET - is this is defined, IDE Reset will
779 be performed by calling the function
780 ide_set_reset(int reset)
781 which has to be defined in a board specific file
c609719b
WD
782
783- ATAPI Support:
784 CONFIG_ATAPI
785
786 Set this to enable ATAPI support.
787
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WD
788- LBA48 Support
789 CONFIG_LBA48
790
791 Set this to enable support for disks larger than 137GB
4b142feb 792 Also look at CONFIG_SYS_64BIT_LBA.
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WD
793 Whithout these , LBA48 support uses 32bit variables and will 'only'
794 support disks up to 2.1TB.
795
6d0f6bcf 796 CONFIG_SYS_64BIT_LBA:
c40b2956
WD
797 When enabled, makes the IDE subsystem use 64bit sector addresses.
798 Default is 32bit.
799
c609719b 800- SCSI Support:
6d0f6bcf
JCPV
801 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
802 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
803 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
c609719b
WD
804 maximum numbers of LUNs, SCSI ID's and target
805 devices.
c609719b 806
93e14596
WD
807 The environment variable 'scsidevs' is set to the number of
808 SCSI devices found during the last scan.
447c031b 809
c609719b 810- NETWORK Support (PCI):
ce5207e1
KM
811 CONFIG_E1000_SPI
812 Utility code for direct access to the SPI bus on Intel 8257x.
813 This does not do anything useful unless you set at least one
814 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
815
c609719b
WD
816 CONFIG_NATSEMI
817 Support for National dp83815 chips.
818
819 CONFIG_NS8382X
820 Support for National dp8382[01] gigabit chips.
821
45219c46 822- NETWORK Support (other):
efdd7319
RH
823 CONFIG_CALXEDA_XGMAC
824 Support for the Calxeda XGMAC device
825
3bb46d23 826 CONFIG_LAN91C96
45219c46
WD
827 Support for SMSC's LAN91C96 chips.
828
45219c46
WD
829 CONFIG_LAN91C96_USE_32_BIT
830 Define this to enable 32 bit addressing
831
3bb46d23 832 CONFIG_SMC91111
f39748ae
WD
833 Support for SMSC's LAN91C111 chip
834
835 CONFIG_SMC91111_BASE
836 Define this to hold the physical address
837 of the device (I/O space)
838
839 CONFIG_SMC_USE_32_BIT
840 Define this if data bus is 32 bits
841
842 CONFIG_SMC_USE_IOFUNCS
843 Define this to use i/o functions instead of macros
844 (some hardware wont work with macros)
845
dc02bada
HS
846 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
847 Define this if you have more then 3 PHYs.
848
b3dbf4a5
ML
849 CONFIG_FTGMAC100
850 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
851
852 CONFIG_FTGMAC100_EGIGA
853 Define this to use GE link update with gigabit PHY.
854 Define this if FTGMAC100 is connected to gigabit PHY.
855 If your system has 10/100 PHY only, it might not occur
856 wrong behavior. Because PHY usually return timeout or
857 useless data when polling gigabit status and gigabit
858 control registers. This behavior won't affect the
859 correctnessof 10/100 link speed update.
860
3d0075fa
YS
861 CONFIG_SH_ETHER
862 Support for Renesas on-chip Ethernet controller
863
864 CONFIG_SH_ETHER_USE_PORT
865 Define the number of ports to be used
866
867 CONFIG_SH_ETHER_PHY_ADDR
868 Define the ETH PHY's address
869
68260aab
YS
870 CONFIG_SH_ETHER_CACHE_WRITEBACK
871 If this option is set, the driver enables cache flush.
872
5e124724 873- TPM Support:
90899cc0
CC
874 CONFIG_TPM
875 Support TPM devices.
876
0766ad2f
CR
877 CONFIG_TPM_TIS_INFINEON
878 Support for Infineon i2c bus TPM devices. Only one device
1b393db5
TWHT
879 per system is supported at this time.
880
1b393db5
TWHT
881 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
882 Define the burst count bytes upper limit
883
3aa74088
CR
884 CONFIG_TPM_ST33ZP24
885 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
886
887 CONFIG_TPM_ST33ZP24_I2C
888 Support for STMicroelectronics ST33ZP24 I2C devices.
889 Requires TPM_ST33ZP24 and I2C.
890
b75fdc11
CR
891 CONFIG_TPM_ST33ZP24_SPI
892 Support for STMicroelectronics ST33ZP24 SPI devices.
893 Requires TPM_ST33ZP24 and SPI.
894
c01939c7
DE
895 CONFIG_TPM_ATMEL_TWI
896 Support for Atmel TWI TPM device. Requires I2C support.
897
90899cc0 898 CONFIG_TPM_TIS_LPC
5e124724
VB
899 Support for generic parallel port TPM devices. Only one device
900 per system is supported at this time.
901
902 CONFIG_TPM_TIS_BASE_ADDRESS
903 Base address where the generic TPM device is mapped
904 to. Contemporary x86 systems usually map it at
905 0xfed40000.
906
be6c1529
RP
907 CONFIG_TPM
908 Define this to enable the TPM support library which provides
909 functional interfaces to some TPM commands.
910 Requires support for a TPM device.
911
912 CONFIG_TPM_AUTH_SESSIONS
913 Define this to enable authorized functions in the TPM library.
914 Requires CONFIG_TPM and CONFIG_SHA1.
915
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WD
916- USB Support:
917 At the moment only the UHCI host controller is
064b55cf 918 supported (PIP405, MIP405); define
c609719b
WD
919 CONFIG_USB_UHCI to enable it.
920 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 921 and define CONFIG_USB_STORAGE to enable the USB
c609719b
WD
922 storage devices.
923 Note:
924 Supported are USB Keyboards and USB Floppy drives
925 (TEAC FD-05PUB).
4d13cbad 926
9ab4ce22
SG
927 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
928 txfilltuning field in the EHCI controller on reset.
929
6e9e0626
OT
930 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
931 HW module registers.
932
16c8d5e7
WD
933- USB Device:
934 Define the below if you wish to use the USB console.
935 Once firmware is rebuilt from a serial console issue the
936 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 937 attach your USB cable. The Unix command "dmesg" should print
16c8d5e7
WD
938 it has found a new device. The environment variable usbtty
939 can be set to gserial or cdc_acm to enable your device to
386eda02 940 appear to a USB host as a Linux gserial device or a
16c8d5e7
WD
941 Common Device Class Abstract Control Model serial device.
942 If you select usbtty = gserial you should be able to enumerate
943 a Linux host by
944 # modprobe usbserial vendor=0xVendorID product=0xProductID
945 else if using cdc_acm, simply setting the environment
946 variable usbtty to be cdc_acm should suffice. The following
947 might be defined in YourBoardName.h
386eda02 948
16c8d5e7
WD
949 CONFIG_USB_DEVICE
950 Define this to build a UDC device
951
952 CONFIG_USB_TTY
953 Define this to have a tty type of device available to
954 talk to the UDC device
386eda02 955
f9da0f89
VK
956 CONFIG_USBD_HS
957 Define this to enable the high speed support for usb
958 device and usbtty. If this feature is enabled, a routine
959 int is_usbd_high_speed(void)
960 also needs to be defined by the driver to dynamically poll
961 whether the enumeration has succeded at high speed or full
962 speed.
963
386eda02 964 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 965 define your own vendor specific values either in BoardName.h
386eda02 966 or directly in usbd_vendor_info.h. If you don't define
16c8d5e7
WD
967 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
968 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
969 should pretend to be a Linux device to it's target host.
970
971 CONFIG_USBD_MANUFACTURER
972 Define this string as the name of your company for
973 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 974
16c8d5e7
WD
975 CONFIG_USBD_PRODUCT_NAME
976 Define this string as the name of your product
977 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
978
979 CONFIG_USBD_VENDORID
980 Define this as your assigned Vendor ID from the USB
981 Implementors Forum. This *must* be a genuine Vendor ID
982 to avoid polluting the USB namespace.
983 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 984
16c8d5e7
WD
985 CONFIG_USBD_PRODUCTID
986 Define this as the unique Product ID
987 for your device
988 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 989
d70a560f
IG
990- ULPI Layer Support:
991 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
992 the generic ULPI layer. The generic layer accesses the ULPI PHY
993 via the platform viewport, so you need both the genric layer and
994 the viewport enabled. Currently only Chipidea/ARC based
995 viewport is supported.
996 To enable the ULPI layer support, define CONFIG_USB_ULPI and
997 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0
LS
998 If your ULPI phy needs a different reference clock than the
999 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1000 the appropriate value in Hz.
c609719b 1001
71f95118 1002- MMC Support:
8bde7f77
WD
1003 The MMC controller on the Intel PXA is supported. To
1004 enable this define CONFIG_MMC. The MMC can be
1005 accessed from the boot prompt by mapping the device
71f95118 1006 to physical memory similar to flash. Command line is
602ad3b3
JL
1007 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1008 the FAT fs. This is enabled with CONFIG_CMD_FAT.
71f95118 1009
afb35666
YS
1010 CONFIG_SH_MMCIF
1011 Support for Renesas on-chip MMCIF controller
1012
1013 CONFIG_SH_MMCIF_ADDR
1014 Define the base address of MMCIF registers
1015
1016 CONFIG_SH_MMCIF_CLK
1017 Define the clock frequency for MMCIF
1018
b3ba6e94 1019- USB Device Firmware Update (DFU) class support:
bb4059a5 1020 CONFIG_DFU_OVER_USB
b3ba6e94
TR
1021 This enables the USB portion of the DFU USB class
1022
c6631764
PA
1023 CONFIG_DFU_NAND
1024 This enables support for exposing NAND devices via DFU.
1025
a9479f04
AM
1026 CONFIG_DFU_RAM
1027 This enables support for exposing RAM via DFU.
1028 Note: DFU spec refer to non-volatile memory usage, but
1029 allow usages beyond the scope of spec - here RAM usage,
1030 one that would help mostly the developer.
1031
e7e75c70
HS
1032 CONFIG_SYS_DFU_DATA_BUF_SIZE
1033 Dfu transfer uses a buffer before writing data to the
1034 raw storage device. Make the size (in bytes) of this buffer
1035 configurable. The size of this buffer is also configurable
1036 through the "dfu_bufsiz" environment variable.
1037
ea2453d5
PA
1038 CONFIG_SYS_DFU_MAX_FILE_SIZE
1039 When updating files rather than the raw storage device,
1040 we use a static buffer to copy the file into and then write
1041 the buffer once we've been given the whole file. Define
1042 this to the maximum filesize (in bytes) for the buffer.
1043 Default is 4 MiB if undefined.
1044
001a8319
HS
1045 DFU_DEFAULT_POLL_TIMEOUT
1046 Poll timeout [ms], is the timeout a device can send to the
1047 host. The host must wait for this timeout before sending
1048 a subsequent DFU_GET_STATUS request to the device.
1049
1050 DFU_MANIFEST_POLL_TIMEOUT
1051 Poll timeout [ms], which the device sends to the host when
1052 entering dfuMANIFEST state. Host waits this timeout, before
1053 sending again an USB request to the device.
1054
6705d81e 1055- Journaling Flash filesystem support:
b2482dff 1056 CONFIG_JFFS2_NAND
6705d81e
WD
1057 Define these for a default partition on a NAND device
1058
6d0f6bcf
JCPV
1059 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1060 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
6705d81e
WD
1061 Define these for a default partition on a NOR device
1062
c609719b 1063- Keyboard Support:
39f615ed
SG
1064 See Kconfig help for available keyboard drivers.
1065
1066 CONFIG_KEYBOARD
1067
1068 Define this to enable a custom keyboard support.
1069 This simply calls drv_keyboard_init() which must be
1070 defined in your board-specific files. This option is deprecated
1071 and is only used by novena. For new boards, use driver model
1072 instead.
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WD
1073
1074- Video support:
7d3053fb 1075 CONFIG_FSL_DIU_FB
04e5ae79 1076 Enable the Freescale DIU video driver. Reference boards for
7d3053fb
TT
1077 SOCs that have a DIU should define this macro to enable DIU
1078 support, and should also define these other macros:
1079
1080 CONFIG_SYS_DIU_ADDR
1081 CONFIG_VIDEO
7d3053fb
TT
1082 CONFIG_CFB_CONSOLE
1083 CONFIG_VIDEO_SW_CURSOR
1084 CONFIG_VGA_AS_SINGLE_DEVICE
1085 CONFIG_VIDEO_LOGO
1086 CONFIG_VIDEO_BMP_LOGO
1087
ba8e76bd
TT
1088 The DIU driver will look for the 'video-mode' environment
1089 variable, and if defined, enable the DIU as a console during
8eca9439 1090 boot. See the documentation file doc/README.video for a
ba8e76bd 1091 description of this variable.
7d3053fb 1092
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WD
1093- LCD Support: CONFIG_LCD
1094
1095 Define this to enable LCD support (for output to LCD
1096 display); also select one of the supported displays
1097 by defining one of these:
1098
39cf4804
SP
1099 CONFIG_ATMEL_LCD:
1100
1101 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1102
fd3103bb 1103 CONFIG_NEC_NL6448AC33:
c609719b 1104
fd3103bb 1105 NEC NL6448AC33-18. Active, color, single scan.
c609719b 1106
fd3103bb 1107 CONFIG_NEC_NL6448BC20
c609719b 1108
fd3103bb
WD
1109 NEC NL6448BC20-08. 6.5", 640x480.
1110 Active, color, single scan.
1111
1112 CONFIG_NEC_NL6448BC33_54
1113
1114 NEC NL6448BC33-54. 10.4", 640x480.
c609719b
WD
1115 Active, color, single scan.
1116
1117 CONFIG_SHARP_16x9
1118
1119 Sharp 320x240. Active, color, single scan.
1120 It isn't 16x9, and I am not sure what it is.
1121
1122 CONFIG_SHARP_LQ64D341
1123
1124 Sharp LQ64D341 display, 640x480.
1125 Active, color, single scan.
1126
1127 CONFIG_HLD1045
1128
1129 HLD1045 display, 640x480.
1130 Active, color, single scan.
1131
1132 CONFIG_OPTREX_BW
1133
1134 Optrex CBL50840-2 NF-FW 99 22 M5
1135 or
1136 Hitachi LMG6912RPFC-00T
1137 or
1138 Hitachi SP14Q002
1139
1140 320x240. Black & white.
1141
676d319e
SG
1142 CONFIG_LCD_ALIGNMENT
1143
b445bbb4 1144 Normally the LCD is page-aligned (typically 4KB). If this is
676d319e
SG
1145 defined then the LCD will be aligned to this value instead.
1146 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1147 here, since it is cheaper to change data cache settings on
1148 a per-section basis.
1149
1150
604c7d4a
HP
1151 CONFIG_LCD_ROTATION
1152
1153 Sometimes, for example if the display is mounted in portrait
1154 mode or even if it's mounted landscape but rotated by 180degree,
1155 we need to rotate our content of the display relative to the
1156 framebuffer, so that user can read the messages which are
1157 printed out.
1158 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1159 initialized with a given rotation from "vl_rot" out of
1160 "vidinfo_t" which is provided by the board specific code.
1161 The value for vl_rot is coded as following (matching to
1162 fbcon=rotate:<n> linux-kernel commandline):
1163 0 = no rotation respectively 0 degree
1164 1 = 90 degree rotation
1165 2 = 180 degree rotation
1166 3 = 270 degree rotation
1167
1168 If CONFIG_LCD_ROTATION is not defined, the console will be
1169 initialized with 0degree rotation.
1170
45d7f525
TWHT
1171 CONFIG_LCD_BMP_RLE8
1172
1173 Support drawing of RLE8-compressed bitmaps on the LCD.
1174
17ea1177 1175- MII/PHY support:
17ea1177
WD
1176 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1177
1178 The clock frequency of the MII bus
1179
17ea1177
WD
1180 CONFIG_PHY_RESET_DELAY
1181
1182 Some PHY like Intel LXT971A need extra delay after
1183 reset before any MII register access is possible.
1184 For such PHY, set this option to the usec delay
1185 required. (minimum 300usec for LXT971A)
1186
1187 CONFIG_PHY_CMD_DELAY (ppc4xx)
1188
1189 Some PHY like Intel LXT971A need extra delay after
1190 command issued before MII status register can be read
1191
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WD
1192- IP address:
1193 CONFIG_IPADDR
1194
1195 Define a default value for the IP address to use for
11ccc33f 1196 the default Ethernet interface, in case this is not
c609719b 1197 determined through e.g. bootp.
1ebcd654 1198 (Environment variable "ipaddr")
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WD
1199
1200- Server IP address:
1201 CONFIG_SERVERIP
1202
11ccc33f 1203 Defines a default value for the IP address of a TFTP
c609719b 1204 server to contact when using the "tftboot" command.
1ebcd654 1205 (Environment variable "serverip")
c609719b 1206
97cfe861
RG
1207 CONFIG_KEEP_SERVERADDR
1208
1209 Keeps the server's MAC address, in the env 'serveraddr'
1210 for passing to bootargs (like Linux's netconsole option)
1211
1ebcd654
WD
1212- Gateway IP address:
1213 CONFIG_GATEWAYIP
1214
1215 Defines a default value for the IP address of the
1216 default router where packets to other networks are
1217 sent to.
1218 (Environment variable "gatewayip")
1219
1220- Subnet mask:
1221 CONFIG_NETMASK
1222
1223 Defines a default value for the subnet mask (or
1224 routing prefix) which is used to determine if an IP
1225 address belongs to the local subnet or needs to be
1226 forwarded through a router.
1227 (Environment variable "netmask")
1228
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WD
1229- BOOTP Recovery Mode:
1230 CONFIG_BOOTP_RANDOM_DELAY
1231
1232 If you have many targets in a network that try to
1233 boot using BOOTP, you may want to avoid that all
1234 systems send out BOOTP requests at precisely the same
1235 moment (which would happen for instance at recovery
1236 from a power failure, when all systems will try to
1237 boot, thus flooding the BOOTP server. Defining
1238 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1239 inserted before sending out BOOTP requests. The
6c33c785 1240 following delays are inserted then:
c609719b
WD
1241
1242 1st BOOTP request: delay 0 ... 1 sec
1243 2nd BOOTP request: delay 0 ... 2 sec
1244 3rd BOOTP request: delay 0 ... 4 sec
1245 4th and following
1246 BOOTP requests: delay 0 ... 8 sec
1247
92ac8acc
TR
1248 CONFIG_BOOTP_ID_CACHE_SIZE
1249
1250 BOOTP packets are uniquely identified using a 32-bit ID. The
1251 server will copy the ID from client requests to responses and
1252 U-Boot will use this to determine if it is the destination of
1253 an incoming response. Some servers will check that addresses
1254 aren't in use before handing them out (usually using an ARP
1255 ping) and therefore take up to a few hundred milliseconds to
1256 respond. Network congestion may also influence the time it
1257 takes for a response to make it back to the client. If that
1258 time is too long, U-Boot will retransmit requests. In order
1259 to allow earlier responses to still be accepted after these
1260 retransmissions, U-Boot's BOOTP client keeps a small cache of
1261 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1262 cache. The default is to keep IDs for up to four outstanding
1263 requests. Increasing this will allow U-Boot to accept offers
1264 from a BOOTP client in networks with unusually high latency.
1265
fe389a82 1266- DHCP Advanced Options:
1fe80d79
JL
1267 You can fine tune the DHCP functionality by defining
1268 CONFIG_BOOTP_* symbols:
1269
1fe80d79 1270 CONFIG_BOOTP_NISDOMAIN
1fe80d79 1271 CONFIG_BOOTP_BOOTFILESIZE
1fe80d79
JL
1272 CONFIG_BOOTP_NTPSERVER
1273 CONFIG_BOOTP_TIMEOFFSET
1274 CONFIG_BOOTP_VENDOREX
2c00e099 1275 CONFIG_BOOTP_MAY_FAIL
fe389a82 1276
5d110f0a
WC
1277 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1278 environment variable, not the BOOTP server.
fe389a82 1279
2c00e099
JH
1280 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1281 after the configured retry count, the call will fail
1282 instead of starting over. This can be used to fail over
1283 to Link-local IP address configuration if the DHCP server
1284 is not available.
1285
d9a2f416
AV
1286 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1287
1288 A 32bit value in microseconds for a delay between
1289 receiving a "DHCP Offer" and sending the "DHCP Request".
1290 This fixes a problem with certain DHCP servers that don't
1291 respond 100% of the time to a "DHCP request". E.g. On an
1292 AT91RM9200 processor running at 180MHz, this delay needed
1293 to be *at least* 15,000 usec before a Windows Server 2003
1294 DHCP server would reply 100% of the time. I recommend at
1295 least 50,000 usec to be safe. The alternative is to hope
1296 that one of the retries will be successful but note that
1297 the DHCP timeout and retry process takes a longer than
1298 this delay.
1299
d22c338e
JH
1300 - Link-local IP address negotiation:
1301 Negotiate with other link-local clients on the local network
1302 for an address that doesn't require explicit configuration.
1303 This is especially useful if a DHCP server cannot be guaranteed
1304 to exist in all environments that the device must operate.
1305
1306 See doc/README.link-local for more information.
1307
24acb83d
PK
1308 - MAC address from environment variables
1309
1310 FDT_SEQ_MACADDR_FROM_ENV
1311
1312 Fix-up device tree with MAC addresses fetched sequentially from
1313 environment variables. This config work on assumption that
1314 non-usable ethernet node of device-tree are either not present
1315 or their status has been marked as "disabled".
1316
a3d991bd 1317 - CDP Options:
6e592385 1318 CONFIG_CDP_DEVICE_ID
a3d991bd
WD
1319
1320 The device id used in CDP trigger frames.
1321
1322 CONFIG_CDP_DEVICE_ID_PREFIX
1323
1324 A two character string which is prefixed to the MAC address
1325 of the device.
1326
1327 CONFIG_CDP_PORT_ID
1328
1329 A printf format string which contains the ascii name of
1330 the port. Normally is set to "eth%d" which sets
11ccc33f 1331 eth0 for the first Ethernet, eth1 for the second etc.
a3d991bd
WD
1332
1333 CONFIG_CDP_CAPABILITIES
1334
1335 A 32bit integer which indicates the device capabilities;
1336 0x00000010 for a normal host which does not forwards.
1337
1338 CONFIG_CDP_VERSION
1339
1340 An ascii string containing the version of the software.
1341
1342 CONFIG_CDP_PLATFORM
1343
1344 An ascii string containing the name of the platform.
1345
1346 CONFIG_CDP_TRIGGER
1347
1348 A 32bit integer sent on the trigger.
1349
1350 CONFIG_CDP_POWER_CONSUMPTION
1351
1352 A 16bit integer containing the power consumption of the
1353 device in .1 of milliwatts.
1354
1355 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1356
1357 A byte containing the id of the VLAN.
1358
79267edd 1359- Status LED: CONFIG_LED_STATUS
c609719b
WD
1360
1361 Several configurations allow to display the current
1362 status using a LED. For instance, the LED will blink
1363 fast while running U-Boot code, stop blinking as
1364 soon as a reply to a BOOTP request was received, and
1365 start blinking slow once the Linux kernel is running
1366 (supported by a status LED driver in the Linux
79267edd 1367 kernel). Defining CONFIG_LED_STATUS enables this
c609719b
WD
1368 feature in U-Boot.
1369
1df7bbba
IG
1370 Additional options:
1371
79267edd 1372 CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1373 The status LED can be connected to a GPIO pin.
1374 In such cases, the gpio_led driver can be used as a
79267edd 1375 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
1df7bbba
IG
1376 to include the gpio_led driver in the U-Boot binary.
1377
9dfdcdfe
IG
1378 CONFIG_GPIO_LED_INVERTED_TABLE
1379 Some GPIO connected LEDs may have inverted polarity in which
1380 case the GPIO high value corresponds to LED off state and
1381 GPIO low value corresponds to LED on state.
1382 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1383 with a list of GPIO LEDs that have inverted polarity.
1384
55dabcc8 1385- I2C Support:
3f4978c7 1386 CONFIG_SYS_NUM_I2C_BUSES
945a18e6 1387 Hold the number of i2c buses you want to use.
3f4978c7
HS
1388
1389 CONFIG_SYS_I2C_DIRECT_BUS
1390 define this, if you don't use i2c muxes on your hardware.
1391 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1392 omit this define.
1393
1394 CONFIG_SYS_I2C_MAX_HOPS
1395 define how many muxes are maximal consecutively connected
1396 on one i2c bus. If you not use i2c muxes, omit this
1397 define.
1398
1399 CONFIG_SYS_I2C_BUSES
b445bbb4 1400 hold a list of buses you want to use, only used if
3f4978c7
HS
1401 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1402 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1403 CONFIG_SYS_NUM_I2C_BUSES = 9:
1404
1405 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1406 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1407 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1408 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1409 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1410 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1411 {1, {I2C_NULL_HOP}}, \
1412 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1413 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1414 }
1415
1416 which defines
1417 bus 0 on adapter 0 without a mux
ea818dbb
HS
1418 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1419 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1420 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1421 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1422 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 1423 bus 6 on adapter 1 without a mux
ea818dbb
HS
1424 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1425 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
1426
1427 If you do not have i2c muxes on your board, omit this define.
1428
ce3b5d69 1429- Legacy I2C Support:
ea818dbb 1430 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
1431 then the following macros need to be defined (examples are
1432 from include/configs/lwmon.h):
c609719b
WD
1433
1434 I2C_INIT
1435
b37c7e5e 1436 (Optional). Any commands necessary to enable the I2C
43d9616c 1437 controller or configure ports.
c609719b 1438
ba56f625 1439 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 1440
c609719b
WD
1441 I2C_ACTIVE
1442
1443 The code necessary to make the I2C data line active
1444 (driven). If the data line is open collector, this
1445 define can be null.
1446
b37c7e5e
WD
1447 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1448
c609719b
WD
1449 I2C_TRISTATE
1450
1451 The code necessary to make the I2C data line tri-stated
1452 (inactive). If the data line is open collector, this
1453 define can be null.
1454
b37c7e5e
WD
1455 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1456
c609719b
WD
1457 I2C_READ
1458
472d5460
YS
1459 Code that returns true if the I2C data line is high,
1460 false if it is low.
c609719b 1461
b37c7e5e
WD
1462 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1463
c609719b
WD
1464 I2C_SDA(bit)
1465
472d5460
YS
1466 If <bit> is true, sets the I2C data line high. If it
1467 is false, it clears it (low).
c609719b 1468
b37c7e5e 1469 eg: #define I2C_SDA(bit) \
2535d602 1470 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 1471 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 1472
c609719b
WD
1473 I2C_SCL(bit)
1474
472d5460
YS
1475 If <bit> is true, sets the I2C clock line high. If it
1476 is false, it clears it (low).
c609719b 1477
b37c7e5e 1478 eg: #define I2C_SCL(bit) \
2535d602 1479 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 1480 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 1481
c609719b
WD
1482 I2C_DELAY
1483
1484 This delay is invoked four times per clock cycle so this
1485 controls the rate of data transfer. The data rate thus
b37c7e5e 1486 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
1487 like:
1488
b37c7e5e 1489 #define I2C_DELAY udelay(2)
c609719b 1490
793b5726
MF
1491 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1492
1493 If your arch supports the generic GPIO framework (asm/gpio.h),
1494 then you may alternatively define the two GPIOs that are to be
1495 used as SCL / SDA. Any of the previous I2C_xxx macros will
1496 have GPIO-based defaults assigned to them as appropriate.
1497
1498 You should define these to the GPIO value as given directly to
1499 the generic GPIO functions.
1500
6d0f6bcf 1501 CONFIG_SYS_I2C_INIT_BOARD
47cd00fa 1502
8bde7f77
WD
1503 When a board is reset during an i2c bus transfer
1504 chips might think that the current transfer is still
1505 in progress. On some boards it is possible to access
1506 the i2c SCLK line directly, either by using the
1507 processor pin as a GPIO or by having a second pin
1508 connected to the bus. If this option is defined a
1509 custom i2c_init_board() routine in boards/xxx/board.c
1510 is run early in the boot sequence.
47cd00fa 1511
bb99ad6d
BW
1512 CONFIG_I2C_MULTI_BUS
1513
1514 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
1515 must have a controller. At any point in time, only one bus is
1516 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
1517 Note that bus numbering is zero-based.
1518
6d0f6bcf 1519 CONFIG_SYS_I2C_NOPROBES
bb99ad6d
BW
1520
1521 This option specifies a list of I2C devices that will be skipped
c0f40859 1522 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
0f89c54b
PT
1523 is set, specify a list of bus-device pairs. Otherwise, specify
1524 a 1D array of device addresses
bb99ad6d
BW
1525
1526 e.g.
1527 #undef CONFIG_I2C_MULTI_BUS
c0f40859 1528 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
1529
1530 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1531
c0f40859 1532 #define CONFIG_I2C_MULTI_BUS
945a18e6 1533 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
bb99ad6d
BW
1534
1535 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1536
6d0f6bcf 1537 CONFIG_SYS_SPD_BUS_NUM
be5e6181
TT
1538
1539 If defined, then this indicates the I2C bus number for DDR SPD.
1540 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1541
6d0f6bcf 1542 CONFIG_SYS_RTC_BUS_NUM
0dc018ec
SR
1543
1544 If defined, then this indicates the I2C bus number for the RTC.
1545 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1546
2ac6985a
AD
1547 CONFIG_SOFT_I2C_READ_REPEATED_START
1548
1549 defining this will force the i2c_read() function in
1550 the soft_i2c driver to perform an I2C repeated start
1551 between writing the address pointer and reading the
1552 data. If this define is omitted the default behaviour
1553 of doing a stop-start sequence will be used. Most I2C
1554 devices can use either method, but some require one or
1555 the other.
be5e6181 1556
c609719b
WD
1557- SPI Support: CONFIG_SPI
1558
1559 Enables SPI driver (so far only tested with
1560 SPI EEPROM, also an instance works with Crystal A/D and
1561 D/As on the SACSng board)
1562
c609719b
WD
1563 CONFIG_SOFT_SPI
1564
43d9616c
WD
1565 Enables a software (bit-bang) SPI driver rather than
1566 using hardware support. This is a general purpose
1567 driver that only requires three general I/O port pins
1568 (two outputs, one input) to function. If this is
1569 defined, the board configuration must define several
1570 SPI configuration items (port pins to use, etc). For
1571 an example, see include/configs/sacsng.h.
c609719b 1572
f659b573
HS
1573 CONFIG_SYS_SPI_MXC_WAIT
1574 Timeout for waiting until spi transfer completed.
1575 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1576
0133502e 1577- FPGA Support: CONFIG_FPGA
c609719b 1578
0133502e
MF
1579 Enables FPGA subsystem.
1580
1581 CONFIG_FPGA_<vendor>
1582
1583 Enables support for specific chip vendors.
1584 (ALTERA, XILINX)
c609719b 1585
0133502e 1586 CONFIG_FPGA_<family>
c609719b 1587
0133502e
MF
1588 Enables support for FPGA family.
1589 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1590
1591 CONFIG_FPGA_COUNT
1592
1593 Specify the number of FPGA devices to support.
c609719b 1594
6d0f6bcf 1595 CONFIG_SYS_FPGA_PROG_FEEDBACK
c609719b 1596
8bde7f77 1597 Enable printing of hash marks during FPGA configuration.
c609719b 1598
6d0f6bcf 1599 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 1600
43d9616c
WD
1601 Enable checks on FPGA configuration interface busy
1602 status by the configuration function. This option
1603 will require a board or device specific function to
1604 be written.
c609719b
WD
1605
1606 CONFIG_FPGA_DELAY
1607
1608 If defined, a function that provides delays in the FPGA
1609 configuration driver.
1610
6d0f6bcf 1611 CONFIG_SYS_FPGA_CHECK_CTRLC
c609719b
WD
1612 Allow Control-C to interrupt FPGA configuration
1613
6d0f6bcf 1614 CONFIG_SYS_FPGA_CHECK_ERROR
c609719b 1615
43d9616c
WD
1616 Check for configuration errors during FPGA bitfile
1617 loading. For example, abort during Virtex II
1618 configuration if the INIT_B line goes low (which
1619 indicated a CRC error).
c609719b 1620
6d0f6bcf 1621 CONFIG_SYS_FPGA_WAIT_INIT
c609719b 1622
b445bbb4
JM
1623 Maximum time to wait for the INIT_B line to de-assert
1624 after PROB_B has been de-asserted during a Virtex II
43d9616c 1625 FPGA configuration sequence. The default time is 500
11ccc33f 1626 ms.
c609719b 1627
6d0f6bcf 1628 CONFIG_SYS_FPGA_WAIT_BUSY
c609719b 1629
b445bbb4 1630 Maximum time to wait for BUSY to de-assert during
11ccc33f 1631 Virtex II FPGA configuration. The default is 5 ms.
c609719b 1632
6d0f6bcf 1633 CONFIG_SYS_FPGA_WAIT_CONFIG
c609719b 1634
43d9616c 1635 Time to wait after FPGA configuration. The default is
11ccc33f 1636 200 ms.
c609719b
WD
1637
1638- Configuration Management:
b2b8a696 1639
c609719b
WD
1640 CONFIG_IDENT_STRING
1641
43d9616c
WD
1642 If defined, this string will be added to the U-Boot
1643 version information (U_BOOT_VERSION)
c609719b
WD
1644
1645- Vendor Parameter Protection:
1646
43d9616c
WD
1647 U-Boot considers the values of the environment
1648 variables "serial#" (Board Serial Number) and
7152b1d0 1649 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
1650 are set once by the board vendor / manufacturer, and
1651 protects these variables from casual modification by
1652 the user. Once set, these variables are read-only,
1653 and write or delete attempts are rejected. You can
11ccc33f 1654 change this behaviour:
c609719b
WD
1655
1656 If CONFIG_ENV_OVERWRITE is #defined in your config
1657 file, the write protection for vendor parameters is
47cd00fa 1658 completely disabled. Anybody can change or delete
c609719b
WD
1659 these parameters.
1660
92ac5208
JH
1661 Alternatively, if you define _both_ an ethaddr in the
1662 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
11ccc33f 1663 Ethernet address is installed in the environment,
c609719b
WD
1664 which can be changed exactly ONCE by the user. [The
1665 serial# is unaffected by this, i. e. it remains
1666 read-only.]
1667
2598090b
JH
1668 The same can be accomplished in a more flexible way
1669 for any variable by configuring the type of access
1670 to allow for those variables in the ".flags" variable
1671 or define CONFIG_ENV_FLAGS_LIST_STATIC.
1672
c609719b
WD
1673- Protected RAM:
1674 CONFIG_PRAM
1675
1676 Define this variable to enable the reservation of
1677 "protected RAM", i. e. RAM which is not overwritten
1678 by U-Boot. Define CONFIG_PRAM to hold the number of
1679 kB you want to reserve for pRAM. You can overwrite
1680 this default value by defining an environment
1681 variable "pram" to the number of kB you want to
1682 reserve. Note that the board info structure will
1683 still show the full amount of RAM. If pRAM is
1684 reserved, a new environment variable "mem" will
1685 automatically be defined to hold the amount of
1686 remaining RAM in a form that can be passed as boot
1687 argument to Linux, for instance like that:
1688
fe126d8b 1689 setenv bootargs ... mem=\${mem}
c609719b
WD
1690 saveenv
1691
1692 This way you can tell Linux not to use this memory,
1693 either, which results in a memory region that will
1694 not be affected by reboots.
1695
1696 *WARNING* If your board configuration uses automatic
1697 detection of the RAM size, you must make sure that
1698 this memory test is non-destructive. So far, the
1699 following board configurations are known to be
1700 "pRAM-clean":
1701
5b8e76c3 1702 IVMS8, IVML24, SPD8xx,
1b0757ec 1703 HERMES, IP860, RPXlite, LWMON,
2eb48ff7 1704 FLAGADM
c609719b 1705
40fef049
GB
1706- Access to physical memory region (> 4GB)
1707 Some basic support is provided for operations on memory not
1708 normally accessible to U-Boot - e.g. some architectures
1709 support access to more than 4GB of memory on 32-bit
1710 machines using physical address extension or similar.
1711 Define CONFIG_PHYSMEM to access this basic support, which
1712 currently only supports clearing the memory.
1713
c609719b 1714- Error Recovery:
c609719b
WD
1715 CONFIG_NET_RETRY_COUNT
1716
43d9616c
WD
1717 This variable defines the number of retries for
1718 network operations like ARP, RARP, TFTP, or BOOTP
1719 before giving up the operation. If not defined, a
1720 default value of 5 is used.
c609719b 1721
40cb90ee
GL
1722 CONFIG_ARP_TIMEOUT
1723
1724 Timeout waiting for an ARP reply in milliseconds.
1725
48a3e999
TK
1726 CONFIG_NFS_TIMEOUT
1727
1728 Timeout in milliseconds used in NFS protocol.
1729 If you encounter "ERROR: Cannot umount" in nfs command,
1730 try longer timeout such as
1731 #define CONFIG_NFS_TIMEOUT 10000UL
1732
c609719b
WD
1733 Note:
1734
8bde7f77
WD
1735 In the current implementation, the local variables
1736 space and global environment variables space are
1737 separated. Local variables are those you define by
1738 simply typing `name=value'. To access a local
1739 variable later on, you have write `$name' or
1740 `${name}'; to execute the contents of a variable
1741 directly type `$name' at the command prompt.
c609719b 1742
43d9616c
WD
1743 Global environment variables are those you use
1744 setenv/printenv to work with. To run a command stored
1745 in such a variable, you need to use the run command,
1746 and you must not use the '$' sign to access them.
c609719b
WD
1747
1748 To store commands and special characters in a
1749 variable, please use double quotation marks
1750 surrounding the whole text of the variable, instead
1751 of the backslashes before semicolons and special
1752 symbols.
1753
b445bbb4 1754- Command Line Editing and History:
f3b267b3
MV
1755 CONFIG_CMDLINE_PS_SUPPORT
1756
1757 Enable support for changing the command prompt string
1758 at run-time. Only static string is supported so far.
1759 The string is obtained from environment variables PS1
1760 and PS2.
1761
a8c7c708 1762- Default Environment:
c609719b
WD
1763 CONFIG_EXTRA_ENV_SETTINGS
1764
43d9616c
WD
1765 Define this to contain any number of null terminated
1766 strings (variable = value pairs) that will be part of
7152b1d0 1767 the default environment compiled into the boot image.
2262cfee 1768
43d9616c
WD
1769 For example, place something like this in your
1770 board's config file:
c609719b
WD
1771
1772 #define CONFIG_EXTRA_ENV_SETTINGS \
1773 "myvar1=value1\0" \
1774 "myvar2=value2\0"
1775
43d9616c
WD
1776 Warning: This method is based on knowledge about the
1777 internal format how the environment is stored by the
1778 U-Boot code. This is NOT an official, exported
1779 interface! Although it is unlikely that this format
7152b1d0 1780 will change soon, there is no guarantee either.
c609719b
WD
1781 You better know what you are doing here.
1782
43d9616c
WD
1783 Note: overly (ab)use of the default environment is
1784 discouraged. Make sure to check other ways to preset
74de7aef 1785 the environment like the "source" command or the
43d9616c 1786 boot command first.
c609719b 1787
06fd8538
SG
1788 CONFIG_DELAY_ENVIRONMENT
1789
1790 Normally the environment is loaded when the board is
b445bbb4 1791 initialised so that it is available to U-Boot. This inhibits
06fd8538
SG
1792 that so that the environment is not available until
1793 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
1794 this is instead controlled by the value of
1795 /config/load-environment.
1796
ecb0ccd9
WD
1797- TFTP Fixed UDP Port:
1798 CONFIG_TFTP_PORT
1799
28cb9375 1800 If this is defined, the environment variable tftpsrcp
ecb0ccd9 1801 is used to supply the TFTP UDP source port value.
28cb9375 1802 If tftpsrcp isn't defined, the normal pseudo-random port
ecb0ccd9
WD
1803 number generator is used.
1804
28cb9375
WD
1805 Also, the environment variable tftpdstp is used to supply
1806 the TFTP UDP destination port value. If tftpdstp isn't
1807 defined, the normal port 69 is used.
1808
1809 The purpose for tftpsrcp is to allow a TFTP server to
ecb0ccd9
WD
1810 blindly start the TFTP transfer using the pre-configured
1811 target IP address and UDP port. This has the effect of
1812 "punching through" the (Windows XP) firewall, allowing
1813 the remainder of the TFTP transfer to proceed normally.
1814 A better solution is to properly configure the firewall,
1815 but sometimes that is not allowed.
1816
4cf2609b
WD
1817 CONFIG_STANDALONE_LOAD_ADDR
1818
6feff899
WD
1819 This option defines a board specific value for the
1820 address where standalone program gets loaded, thus
1821 overwriting the architecture dependent default
4cf2609b
WD
1822 settings.
1823
1824- Frame Buffer Address:
1825 CONFIG_FB_ADDR
1826
1827 Define CONFIG_FB_ADDR if you want to use specific
44a53b57
WD
1828 address for frame buffer. This is typically the case
1829 when using a graphics controller has separate video
1830 memory. U-Boot will then place the frame buffer at
1831 the given address instead of dynamically reserving it
1832 in system RAM by calling lcd_setmem(), which grabs
1833 the memory for the frame buffer depending on the
1834 configured panel size.
4cf2609b
WD
1835
1836 Please see board_init_f function.
1837
cccfc2ab
DZ
1838- Automatic software updates via TFTP server
1839 CONFIG_UPDATE_TFTP
1840 CONFIG_UPDATE_TFTP_CNT_MAX
1841 CONFIG_UPDATE_TFTP_MSEC_MAX
1842
1843 These options enable and control the auto-update feature;
1844 for a more detailed description refer to doc/README.update.
1845
1846- MTD Support (mtdparts command, UBI support)
ff94bc40
HS
1847 CONFIG_MTD_UBI_WL_THRESHOLD
1848 This parameter defines the maximum difference between the highest
1849 erase counter value and the lowest erase counter value of eraseblocks
1850 of UBI devices. When this threshold is exceeded, UBI starts performing
1851 wear leveling by means of moving data from eraseblock with low erase
1852 counter to eraseblocks with high erase counter.
1853
1854 The default value should be OK for SLC NAND flashes, NOR flashes and
1855 other flashes which have eraseblock life-cycle 100000 or more.
1856 However, in case of MLC NAND flashes which typically have eraseblock
1857 life-cycle less than 10000, the threshold should be lessened (e.g.,
1858 to 128 or 256, although it does not have to be power of 2).
1859
1860 default: 4096
c654b517 1861
ff94bc40
HS
1862 CONFIG_MTD_UBI_BEB_LIMIT
1863 This option specifies the maximum bad physical eraseblocks UBI
1864 expects on the MTD device (per 1024 eraseblocks). If the
1865 underlying flash does not admit of bad eraseblocks (e.g. NOR
1866 flash), this value is ignored.
1867
1868 NAND datasheets often specify the minimum and maximum NVM
1869 (Number of Valid Blocks) for the flashes' endurance lifetime.
1870 The maximum expected bad eraseblocks per 1024 eraseblocks
1871 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
1872 which gives 20 for most NANDs (MaxNVB is basically the total
1873 count of eraseblocks on the chip).
1874
1875 To put it differently, if this value is 20, UBI will try to
1876 reserve about 1.9% of physical eraseblocks for bad blocks
1877 handling. And that will be 1.9% of eraseblocks on the entire
1878 NAND chip, not just the MTD partition UBI attaches. This means
1879 that if you have, say, a NAND flash chip admits maximum 40 bad
1880 eraseblocks, and it is split on two MTD partitions of the same
1881 size, UBI will reserve 40 eraseblocks when attaching a
1882 partition.
1883
1884 default: 20
1885
1886 CONFIG_MTD_UBI_FASTMAP
1887 Fastmap is a mechanism which allows attaching an UBI device
1888 in nearly constant time. Instead of scanning the whole MTD device it
1889 only has to locate a checkpoint (called fastmap) on the device.
1890 The on-flash fastmap contains all information needed to attach
1891 the device. Using fastmap makes only sense on large devices where
1892 attaching by scanning takes long. UBI will not automatically install
1893 a fastmap on old images, but you can set the UBI parameter
1894 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
1895 that fastmap-enabled images are still usable with UBI implementations
1896 without fastmap support. On typical flash devices the whole fastmap
1897 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
1898
1899 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
1900 Set this parameter to enable fastmap automatically on images
1901 without a fastmap.
1902 default: 0
1903
0195a7bb
HS
1904 CONFIG_MTD_UBI_FM_DEBUG
1905 Enable UBI fastmap debug
1906 default: 0
1907
6a11cf48 1908- SPL framework
04e5ae79
WD
1909 CONFIG_SPL
1910 Enable building of SPL globally.
6a11cf48 1911
6ebc3461
AA
1912 CONFIG_SPL_MAX_FOOTPRINT
1913 Maximum size in memory allocated to the SPL, BSS included.
1914 When defined, the linker checks that the actual memory
1915 used by SPL from _start to __bss_end does not exceed it.
8960af8b 1916 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1917 must not be both defined at the same time.
1918
95579793 1919 CONFIG_SPL_MAX_SIZE
6ebc3461
AA
1920 Maximum size of the SPL image (text, data, rodata, and
1921 linker lists sections), BSS excluded.
1922 When defined, the linker checks that the actual size does
1923 not exceed it.
95579793 1924
94a45bb1
SW
1925 CONFIG_SPL_RELOC_TEXT_BASE
1926 Address to relocate to. If unspecified, this is equal to
1927 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
1928
95579793
TR
1929 CONFIG_SPL_BSS_START_ADDR
1930 Link address for the BSS within the SPL binary.
1931
1932 CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
1933 Maximum size in memory allocated to the SPL BSS.
1934 When defined, the linker checks that the actual memory used
1935 by SPL from __bss_start to __bss_end does not exceed it.
8960af8b 1936 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461 1937 must not be both defined at the same time.
95579793
TR
1938
1939 CONFIG_SPL_STACK
1940 Adress of the start of the stack SPL will use
1941
8c80eb3b
AA
1942 CONFIG_SPL_PANIC_ON_RAW_IMAGE
1943 When defined, SPL will panic() if the image it has
1944 loaded does not have a signature.
1945 Defining this is useful when code which loads images
1946 in SPL cannot guarantee that absolutely all read errors
1947 will be caught.
1948 An example is the LPC32XX MLC NAND driver, which will
1949 consider that a completely unreadable NAND block is bad,
1950 and thus should be skipped silently.
1951
94a45bb1
SW
1952 CONFIG_SPL_RELOC_STACK
1953 Adress of the start of the stack SPL will use after
1954 relocation. If unspecified, this is equal to
1955 CONFIG_SPL_STACK.
1956
95579793
TR
1957 CONFIG_SYS_SPL_MALLOC_START
1958 Starting address of the malloc pool used in SPL.
9ac4fc82
FE
1959 When this option is set the full malloc is used in SPL and
1960 it is set up by spl_init() and before that, the simple malloc()
1961 can be used if CONFIG_SYS_MALLOC_F is defined.
95579793
TR
1962
1963 CONFIG_SYS_SPL_MALLOC_SIZE
1964 The size of the malloc pool used in SPL.
6a11cf48 1965
861a86f4
TR
1966 CONFIG_SPL_DISPLAY_PRINT
1967 For ARM, enable an optional function to print more information
1968 about the running system.
1969
4b919725
SW
1970 CONFIG_SPL_INIT_MINIMAL
1971 Arch init code should be built for a very small image
1972
b97300b6
PK
1973 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
1974 Partition on the MMC to load U-Boot from when the MMC is being
1975 used in raw mode
1976
2b75b0ad
PK
1977 CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
1978 Sector to load kernel uImage from when MMC is being
1979 used in raw mode (for Falcon mode)
1980
1981 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
1982 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
1983 Sector and number of sectors to load kernel argument
1984 parameters from when MMC is being used in raw mode
1985 (for falcon mode)
1986
fae81c72
GG
1987 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
1988 Filename to read to load U-Boot when reading from filesystem
1989
1990 CONFIG_SPL_FS_LOAD_KERNEL_NAME
7ad2cc79 1991 Filename to read to load kernel uImage when reading
fae81c72 1992 from filesystem (for Falcon mode)
7ad2cc79 1993
fae81c72 1994 CONFIG_SPL_FS_LOAD_ARGS_NAME
7ad2cc79 1995 Filename to read to load kernel argument parameters
fae81c72 1996 when reading from filesystem (for Falcon mode)
7ad2cc79 1997
06f60ae3
SW
1998 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
1999 Set this for NAND SPL on PPC mpc83xx targets, so that
2000 start.S waits for the rest of the SPL to load before
2001 continuing (the hardware starts execution after just
2002 loading the first page rather than the full 4K).
2003
651fcf60
PK
2004 CONFIG_SPL_SKIP_RELOCATE
2005 Avoid SPL relocation
2006
15e207fa
JK
2007 CONFIG_SPL_NAND_IDENT
2008 SPL uses the chip ID list to identify the NAND flash.
2009 Requires CONFIG_SPL_NAND_BASE.
2010
6f4e7d3c
TG
2011 CONFIG_SPL_UBI
2012 Support for a lightweight UBI (fastmap) scanner and
2013 loader
2014
0c3117b1
HS
2015 CONFIG_SPL_NAND_RAW_ONLY
2016 Support to boot only raw u-boot.bin images. Use this only
2017 if you need to save space.
2018
7c8eea59
YZ
2019 CONFIG_SPL_COMMON_INIT_DDR
2020 Set for common ddr init with serial presence detect in
2021 SPL binary.
2022
95579793
TR
2023 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
2024 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
2025 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
2026 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
2027 CONFIG_SYS_NAND_ECCBYTES
2028 Defines the size and behavior of the NAND that SPL uses
7d4b7955 2029 to read U-Boot
95579793 2030
7d4b7955
SW
2031 CONFIG_SYS_NAND_U_BOOT_DST
2032 Location in memory to load U-Boot to
2033
2034 CONFIG_SYS_NAND_U_BOOT_SIZE
2035 Size of image to load
95579793
TR
2036
2037 CONFIG_SYS_NAND_U_BOOT_START
7d4b7955 2038 Entry point in loaded image to jump to
95579793
TR
2039
2040 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
2041 Define this if you need to first read the OOB and then the
b445bbb4 2042 data. This is used, for example, on davinci platforms.
95579793 2043
c57b953d
PM
2044 CONFIG_SPL_RAM_DEVICE
2045 Support for running image already present in ram, in SPL binary
6a11cf48 2046
74752baa 2047 CONFIG_SPL_PAD_TO
6113d3f2
BT
2048 Image offset to which the SPL should be padded before appending
2049 the SPL payload. By default, this is defined as
2050 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
2051 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
2052 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
74752baa 2053
ca2fca22
SW
2054 CONFIG_SPL_TARGET
2055 Final target image containing SPL and payload. Some SPLs
2056 use an arch-specific makefile fragment instead, for
2057 example if more than one image needs to be produced.
2058
b527b9c6 2059 CONFIG_SPL_FIT_PRINT
87ebee39
SG
2060 Printing information about a FIT image adds quite a bit of
2061 code to SPL. So this is normally disabled in SPL. Use this
2062 option to re-enable it. This will affect the output of the
2063 bootm command when booting a FIT image.
2064
3aa29de0
YZ
2065- TPL framework
2066 CONFIG_TPL
2067 Enable building of TPL globally.
2068
2069 CONFIG_TPL_PAD_TO
2070 Image offset to which the TPL should be padded before appending
2071 the TPL payload. By default, this is defined as
93e14596
WD
2072 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
2073 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
2074 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
3aa29de0 2075
a8c7c708
WD
2076- Interrupt support (PPC):
2077
d4ca31c4
WD
2078 There are common interrupt_init() and timer_interrupt()
2079 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 2080 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 2081 should set decrementer_count to appropriate value. If
11ccc33f 2082 CPU resets decrementer automatically after interrupt
d4ca31c4 2083 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 2084 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
2085 specific handling. If board has watchdog / status_led
2086 / other_activity_monitor it works automatically from
2087 general timer_interrupt().
a8c7c708 2088
c609719b 2089
9660e442
HR
2090Board initialization settings:
2091------------------------------
2092
2093During Initialization u-boot calls a number of board specific functions
2094to allow the preparation of board specific prerequisites, e.g. pin setup
2095before drivers are initialized. To enable these callbacks the
2096following configuration macros have to be defined. Currently this is
2097architecture specific, so please check arch/your_architecture/lib/board.c
2098typically in board_init_f() and board_init_r().
2099
2100- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
2101- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
2102- CONFIG_BOARD_LATE_INIT: Call board_late_init()
2103- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
c609719b 2104
c609719b
WD
2105Configuration Settings:
2106-----------------------
2107
4d979bfd 2108- MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
4d1fd7f1
YS
2109 Optionally it can be defined to support 64-bit memory commands.
2110
6d0f6bcf 2111- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
2112 undefine this when you're short of memory.
2113
2fb2604d
PT
2114- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
2115 width of the commands listed in the 'help' command output.
2116
6d0f6bcf 2117- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
2118 prompt for user input.
2119
6d0f6bcf 2120- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
c609719b 2121
6d0f6bcf 2122- CONFIG_SYS_PBSIZE: Buffer size for Console output
c609719b 2123
6d0f6bcf 2124- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
c609719b 2125
6d0f6bcf 2126- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
c609719b
WD
2127 the application (usually a Linux kernel) when it is
2128 booted
2129
6d0f6bcf 2130- CONFIG_SYS_BAUDRATE_TABLE:
c609719b
WD
2131 List of legal baudrate settings for this board.
2132
e8149522 2133- CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 2134 Only implemented for ARMv8 for now.
e8149522
YS
2135 If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
2136 is substracted from total RAM and won't be reported to OS.
2137 This memory can be used as secure memory. A variable
e61a7534 2138 gd->arch.secure_ram is used to track the location. In systems
e8149522
YS
2139 the RAM base is not zero, or RAM is divided into banks,
2140 this variable needs to be recalcuated to get the address.
2141
aabd7ddb 2142- CONFIG_SYS_MEM_TOP_HIDE:
6d0f6bcf 2143 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
14f73ca6 2144 this specified memory area will get subtracted from the top
11ccc33f 2145 (end) of RAM and won't get "touched" at all by U-Boot. By
14f73ca6
SR
2146 fixing up gd->ram_size the Linux kernel should gets passed
2147 the now "corrected" memory size and won't touch it either.
2148 This should work for arch/ppc and arch/powerpc. Only Linux
5e12e75d 2149 board ports in arch/powerpc with bootwrapper support that
14f73ca6 2150 recalculate the memory size from the SDRAM controller setup
5e12e75d 2151 will have to get fixed in Linux additionally.
14f73ca6
SR
2152
2153 This option can be used as a workaround for the 440EPx/GRx
2154 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
2155 be touched.
2156
2157 WARNING: Please make sure that this value is a multiple of
2158 the Linux page size (normally 4k). If this is not the case,
2159 then the end address of the Linux memory will be located at a
2160 non page size aligned address and this could cause major
2161 problems.
2162
6d0f6bcf 2163- CONFIG_SYS_LOADS_BAUD_CHANGE:
c609719b
WD
2164 Enable temporary baudrate change while serial download
2165
6d0f6bcf 2166- CONFIG_SYS_SDRAM_BASE:
c609719b
WD
2167 Physical start address of SDRAM. _Must_ be 0 here.
2168
6d0f6bcf 2169- CONFIG_SYS_FLASH_BASE:
c609719b
WD
2170 Physical start address of Flash memory.
2171
6d0f6bcf 2172- CONFIG_SYS_MONITOR_BASE:
c609719b
WD
2173 Physical start address of boot monitor code (set by
2174 make config files to be same as the text base address
14d0a02a 2175 (CONFIG_SYS_TEXT_BASE) used when linking) - same as
6d0f6bcf 2176 CONFIG_SYS_FLASH_BASE when booting from flash.
c609719b 2177
6d0f6bcf 2178- CONFIG_SYS_MONITOR_LEN:
8bde7f77
WD
2179 Size of memory reserved for monitor code, used to
2180 determine _at_compile_time_ (!) if the environment is
2181 embedded within the U-Boot image, or in a separate
2182 flash sector.
c609719b 2183
6d0f6bcf 2184- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
2185 Size of DRAM reserved for malloc() use.
2186
d59476b6
SG
2187- CONFIG_SYS_MALLOC_F_LEN
2188 Size of the malloc() pool for use before relocation. If
2189 this is defined, then a very simple malloc() implementation
2190 will become available before relocation. The address is just
2191 below the global data, and the stack is moved down to make
2192 space.
2193
2194 This feature allocates regions with increasing addresses
2195 within the region. calloc() is supported, but realloc()
2196 is not available. free() is supported but does nothing.
b445bbb4 2197 The memory will be freed (or in fact just forgotten) when
d59476b6
SG
2198 U-Boot relocates itself.
2199
38687ae6
SG
2200- CONFIG_SYS_MALLOC_SIMPLE
2201 Provides a simple and small malloc() and calloc() for those
2202 boards which do not use the full malloc in SPL (which is
2203 enabled with CONFIG_SYS_SPL_MALLOC_START).
2204
1dfdd9ba
TR
2205- CONFIG_SYS_NONCACHED_MEMORY:
2206 Size of non-cached memory area. This area of memory will be
2207 typically located right below the malloc() area and mapped
2208 uncached in the MMU. This is useful for drivers that would
2209 otherwise require a lot of explicit cache maintenance. For
2210 some drivers it's also impossible to properly maintain the
2211 cache. For example if the regions that need to be flushed
2212 are not a multiple of the cache-line size, *and* padding
2213 cannot be allocated between the regions to align them (i.e.
2214 if the HW requires a contiguous array of regions, and the
2215 size of each region is not cache-aligned), then a flush of
2216 one region may result in overwriting data that hardware has
2217 written to another region in the same cache-line. This can
2218 happen for example in network drivers where descriptors for
2219 buffers are typically smaller than the CPU cache-line (e.g.
2220 16 bytes vs. 32 or 64 bytes).
2221
2222 Non-cached memory is only supported on 32-bit ARM at present.
2223
6d0f6bcf 2224- CONFIG_SYS_BOOTM_LEN:
15940c9a
SR
2225 Normally compressed uImages are limited to an
2226 uncompressed size of 8 MBytes. If this is not enough,
6d0f6bcf 2227 you can define CONFIG_SYS_BOOTM_LEN in your board config file
15940c9a
SR
2228 to adjust this setting to your needs.
2229
6d0f6bcf 2230- CONFIG_SYS_BOOTMAPSZ:
c609719b
WD
2231 Maximum size of memory mapped by the startup code of
2232 the Linux kernel; all data that must be processed by
7d721e34
BS
2233 the Linux kernel (bd_info, boot arguments, FDT blob if
2234 used) must be put below this limit, unless "bootm_low"
1bce2aeb 2235 environment variable is defined and non-zero. In such case
7d721e34 2236 all data for the Linux kernel must be between "bootm_low"
c0f40859 2237 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
c3624e6e
GL
2238 variable "bootm_mapsize" will override the value of
2239 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
2240 then the value in "bootm_size" will be used instead.
c609719b 2241
fca43cc8
JR
2242- CONFIG_SYS_BOOT_RAMDISK_HIGH:
2243 Enable initrd_high functionality. If defined then the
2244 initrd_high feature is enabled and the bootm ramdisk subcommand
2245 is enabled.
2246
2247- CONFIG_SYS_BOOT_GET_CMDLINE:
2248 Enables allocating and saving kernel cmdline in space between
2249 "bootm_low" and "bootm_low" + BOOTMAPSZ.
2250
2251- CONFIG_SYS_BOOT_GET_KBD:
2252 Enables allocating and saving a kernel copy of the bd_info in
2253 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
2254
6d0f6bcf 2255- CONFIG_SYS_MAX_FLASH_BANKS:
c609719b
WD
2256 Max number of Flash memory banks
2257
6d0f6bcf 2258- CONFIG_SYS_MAX_FLASH_SECT:
c609719b
WD
2259 Max number of sectors on a Flash chip
2260
6d0f6bcf 2261- CONFIG_SYS_FLASH_ERASE_TOUT:
c609719b
WD
2262 Timeout for Flash erase operations (in ms)
2263
6d0f6bcf 2264- CONFIG_SYS_FLASH_WRITE_TOUT:
c609719b
WD
2265 Timeout for Flash write operations (in ms)
2266
6d0f6bcf 2267- CONFIG_SYS_FLASH_LOCK_TOUT
8564acf9
WD
2268 Timeout for Flash set sector lock bit operation (in ms)
2269
6d0f6bcf 2270- CONFIG_SYS_FLASH_UNLOCK_TOUT
8564acf9
WD
2271 Timeout for Flash clear lock bits operation (in ms)
2272
6d0f6bcf 2273- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
2274 If defined, hardware flash sectors protection is used
2275 instead of U-Boot software protection.
2276
6d0f6bcf 2277- CONFIG_SYS_DIRECT_FLASH_TFTP:
c609719b
WD
2278
2279 Enable TFTP transfers directly to flash memory;
2280 without this option such a download has to be
2281 performed in two steps: (1) download to RAM, and (2)
2282 copy from RAM to flash.
2283
2284 The two-step approach is usually more reliable, since
2285 you can check if the download worked before you erase
11ccc33f
MZ
2286 the flash, but in some situations (when system RAM is
2287 too limited to allow for a temporary copy of the
c609719b
WD
2288 downloaded image) this option may be very useful.
2289
6d0f6bcf 2290- CONFIG_SYS_FLASH_CFI:
43d9616c 2291 Define if the flash driver uses extra elements in the
5653fc33
WD
2292 common flash structure for storing flash geometry.
2293
00b1883a 2294- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
2295 This option also enables the building of the cfi_flash driver
2296 in the drivers directory
c609719b 2297
91809ed5
PZ
2298- CONFIG_FLASH_CFI_MTD
2299 This option enables the building of the cfi_mtd driver
2300 in the drivers directory. The driver exports CFI flash
2301 to the MTD layer.
2302
6d0f6bcf 2303- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
2304 Use buffered writes to flash.
2305
2306- CONFIG_FLASH_SPANSION_S29WS_N
2307 s29ws-n MirrorBit flash has non-standard addresses for buffered
2308 write commands.
2309
6d0f6bcf 2310- CONFIG_SYS_FLASH_QUIET_TEST
5568e613
SR
2311 If this option is defined, the common CFI flash doesn't
2312 print it's warning upon not recognized FLASH banks. This
2313 is useful, if some of the configured banks are only
2314 optionally available.
2315
9a042e9c
JVB
2316- CONFIG_FLASH_SHOW_PROGRESS
2317 If defined (must be an integer), print out countdown
2318 digits and dots. Recommended value: 45 (9..1) for 80
2319 column displays, 15 (3..1) for 40 column displays.
2320
352ef3f1
SR
2321- CONFIG_FLASH_VERIFY
2322 If defined, the content of the flash (destination) is compared
2323 against the source after the write operation. An error message
2324 will be printed when the contents are not identical.
2325 Please note that this option is useless in nearly all cases,
2326 since such flash programming errors usually are detected earlier
2327 while unprotecting/erasing/programming. Please only enable
2328 this option if you really know what you are doing.
2329
6d0f6bcf 2330- CONFIG_SYS_RX_ETH_BUFFER:
11ccc33f
MZ
2331 Defines the number of Ethernet receive buffers. On some
2332 Ethernet controllers it is recommended to set this value
53cf9435
SR
2333 to 8 or even higher (EEPRO100 or 405 EMAC), since all
2334 buffers can be full shortly after enabling the interface
11ccc33f 2335 on high Ethernet traffic.
53cf9435
SR
2336 Defaults to 4 if not defined.
2337
ea882baf
WD
2338- CONFIG_ENV_MAX_ENTRIES
2339
071bc923
WD
2340 Maximum number of entries in the hash table that is used
2341 internally to store the environment settings. The default
2342 setting is supposed to be generous and should work in most
2343 cases. This setting can be used to tune behaviour; see
2344 lib/hashtable.c for details.
ea882baf 2345
2598090b
JH
2346- CONFIG_ENV_FLAGS_LIST_DEFAULT
2347- CONFIG_ENV_FLAGS_LIST_STATIC
1bce2aeb 2348 Enable validation of the values given to environment variables when
2598090b
JH
2349 calling env set. Variables can be restricted to only decimal,
2350 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
2351 the variables can also be restricted to IP address or MAC address.
2352
2353 The format of the list is:
2354 type_attribute = [s|d|x|b|i|m]
b445bbb4
JM
2355 access_attribute = [a|r|o|c]
2356 attributes = type_attribute[access_attribute]
2598090b
JH
2357 entry = variable_name[:attributes]
2358 list = entry[,list]
2359
2360 The type attributes are:
2361 s - String (default)
2362 d - Decimal
2363 x - Hexadecimal
2364 b - Boolean ([1yYtT|0nNfF])
2365 i - IP address
2366 m - MAC address
2367
267541f7
JH
2368 The access attributes are:
2369 a - Any (default)
2370 r - Read-only
2371 o - Write-once
2372 c - Change-default
2373
2598090b
JH
2374 - CONFIG_ENV_FLAGS_LIST_DEFAULT
2375 Define this to a list (string) to define the ".flags"
b445bbb4 2376 environment variable in the default or embedded environment.
2598090b
JH
2377
2378 - CONFIG_ENV_FLAGS_LIST_STATIC
2379 Define this to a list (string) to define validation that
2380 should be done if an entry is not found in the ".flags"
2381 environment variable. To override a setting in the static
2382 list, simply add an entry for the same variable name to the
2383 ".flags" variable.
2384
bdf1fe4e
JH
2385 If CONFIG_REGEX is defined, the variable_name above is evaluated as a
2386 regular expression. This allows multiple variables to define the same
2387 flags without explicitly listing them for each variable.
2388
c609719b
WD
2389The following definitions that deal with the placement and management
2390of environment data (variable area); in general, we support the
2391following configurations:
2392
c3eb3fe4
MF
2393- CONFIG_BUILD_ENVCRC:
2394
2395 Builds up envcrc with the target environment so that external utils
2396 may easily extract it and embed it in final U-Boot images.
2397
c609719b 2398BE CAREFUL! The first access to the environment happens quite early
b445bbb4 2399in U-Boot initialization (when we try to get the setting of for the
11ccc33f 2400console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
2401U-Boot will hang.
2402
2403Please note that even with NVRAM we still use a copy of the
2404environment in RAM: we could work on NVRAM directly, but we want to
2405keep settings there always unmodified except somebody uses "saveenv"
2406to save the current settings.
2407
0a85a9e7
LG
2408BE CAREFUL! For some special cases, the local device can not use
2409"saveenv" command. For example, the local device will get the
fc54c7fa
LG
2410environment stored in a remote NOR flash by SRIO or PCIE link,
2411but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 2412
b74ab737
GL
2413- CONFIG_NAND_ENV_DST
2414
2415 Defines address in RAM to which the nand_spl code should copy the
2416 environment. If redundant environment is used, it will be copied to
2417 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
2418
e881cb56 2419Please note that the environment is read-only until the monitor
c609719b 2420has been relocated to RAM and a RAM copy of the environment has been
00caae6d 2421created; also, when using EEPROM you will have to use env_get_f()
c609719b
WD
2422until then to read environment variables.
2423
85ec0bcc
WD
2424The environment is protected by a CRC32 checksum. Before the monitor
2425is relocated into RAM, as a result of a bad CRC you will be working
2426with the compiled-in default environment - *silently*!!! [This is
2427necessary, because the first environment variable we need is the
2428"baudrate" setting for the console - if we have a bad CRC, we don't
2429have any device yet where we could complain.]
c609719b
WD
2430
2431Note: once the monitor has been relocated, then it will complain if
2432the default environment is used; a new CRC is computed as soon as you
85ec0bcc 2433use the "saveenv" command to store a valid environment.
c609719b 2434
6d0f6bcf 2435- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
42d1f039 2436 Echo the inverted Ethernet link state to the fault LED.
fc3e2165 2437
6d0f6bcf 2438 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
fc3e2165
WD
2439 also needs to be defined.
2440
6d0f6bcf 2441- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 2442 MII address of the PHY to check for the Ethernet link state.
c609719b 2443
f5675aa5
RM
2444- CONFIG_NS16550_MIN_FUNCTIONS:
2445 Define this if you desire to only have use of the NS16550_init
2446 and NS16550_putc functions for the serial driver located at
2447 drivers/serial/ns16550.c. This option is useful for saving
2448 space for already greatly restricted images, including but not
2449 limited to NAND_SPL configurations.
2450
b2b92f53
SG
2451- CONFIG_DISPLAY_BOARDINFO
2452 Display information about the board that U-Boot is running on
2453 when U-Boot starts up. The board function checkboard() is called
2454 to do this.
2455
e2e3e2b1
SG
2456- CONFIG_DISPLAY_BOARDINFO_LATE
2457 Similar to the previous option, but display this information
2458 later, once stdio is running and output goes to the LCD, if
2459 present.
2460
feb85801
SS
2461- CONFIG_BOARD_SIZE_LIMIT:
2462 Maximum size of the U-Boot image. When defined, the
2463 build system checks that the actual size does not
2464 exceed it.
2465
c609719b 2466Low Level (hardware related) configuration options:
dc7c9a1a 2467---------------------------------------------------
c609719b 2468
6d0f6bcf 2469- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
2470 Cache Line Size of the CPU.
2471
e46fedfe
TT
2472- CONFIG_SYS_CCSRBAR_DEFAULT:
2473 Default (power-on reset) physical address of CCSR on Freescale
2474 PowerPC SOCs.
2475
2476- CONFIG_SYS_CCSRBAR:
2477 Virtual address of CCSR. On a 32-bit build, this is typically
2478 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
2479
e46fedfe
TT
2480- CONFIG_SYS_CCSRBAR_PHYS:
2481 Physical address of CCSR. CCSR can be relocated to a new
2482 physical address, if desired. In this case, this macro should
c0f40859 2483 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
2484 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
2485 is typically relocated on 36-bit builds. It is recommended
2486 that this macro be defined via the _HIGH and _LOW macros:
2487
2488 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
2489 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
2490
2491- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
4cf2609b
WD
2492 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
2493 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
2494 used in assembly code, so it must not contain typecasts or
2495 integer size suffixes (e.g. "ULL").
2496
2497- CONFIG_SYS_CCSRBAR_PHYS_LOW:
2498 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
2499 used in assembly code, so it must not contain typecasts or
2500 integer size suffixes (e.g. "ULL").
2501
2502- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
2503 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
2504 forced to a value that ensures that CCSR is not relocated.
2505
0abddf82
ML
2506- CONFIG_IDE_AHB:
2507 Most IDE controllers were designed to be connected with PCI
2508 interface. Only few of them were designed for AHB interface.
2509 When software is doing ATA command and data transfer to
2510 IDE devices through IDE-AHB controller, some additional
2511 registers accessing to these kind of IDE-AHB controller
b445bbb4 2512 is required.
0abddf82 2513
6d0f6bcf 2514- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 2515 DO NOT CHANGE unless you know exactly what you're
907208c4 2516 doing! (11-4) [MPC8xx systems only]
c609719b 2517
6d0f6bcf 2518- CONFIG_SYS_INIT_RAM_ADDR:
c609719b 2519
7152b1d0 2520 Start address of memory area that can be used for
c609719b
WD
2521 initial data and stack; please note that this must be
2522 writable memory that is working WITHOUT special
2523 initialization, i. e. you CANNOT use normal RAM which
2524 will become available only after programming the
2525 memory controller and running certain initialization
2526 sequences.
2527
2528 U-Boot uses the following memory types:
907208c4 2529 - MPC8xx: IMMR (internal memory of the CPU)
c609719b 2530
6d0f6bcf 2531- CONFIG_SYS_GBL_DATA_OFFSET:
c609719b
WD
2532
2533 Offset of the initial data structure in the memory
6d0f6bcf
JCPV
2534 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
2535 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
c609719b 2536 data is located at the end of the available space
553f0982 2537 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
acd51f9d 2538 GENERATED_GBL_DATA_SIZE), and the initial stack is just
6d0f6bcf
JCPV
2539 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
2540 CONFIG_SYS_GBL_DATA_OFFSET) downward.
c609719b
WD
2541
2542 Note:
2543 On the MPC824X (or other systems that use the data
2544 cache for initial memory) the address chosen for
6d0f6bcf 2545 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
c609719b
WD
2546 point to an otherwise UNUSED address space between
2547 the top of RAM and the start of the PCI space.
2548
6d0f6bcf 2549- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 2550
6d0f6bcf 2551- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
2552 SDRAM timing
2553
6d0f6bcf 2554- CONFIG_SYS_MAMR_PTA:
c609719b
WD
2555 periodic timer for refresh
2556
6d0f6bcf
JCPV
2557- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
2558 CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
2559 CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,
2560 CONFIG_SYS_BR1_PRELIM:
c609719b
WD
2561 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)
2562
2563- SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,
6d0f6bcf
JCPV
2564 CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,
2565 CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
c609719b
WD
2566 Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
2567
a09b9b68
KG
2568- CONFIG_SYS_SRIO:
2569 Chip has SRIO or not
2570
2571- CONFIG_SRIO1:
2572 Board has SRIO 1 port available
2573
2574- CONFIG_SRIO2:
2575 Board has SRIO 2 port available
2576
c8b28152
LG
2577- CONFIG_SRIO_PCIE_BOOT_MASTER
2578 Board can support master function for Boot from SRIO and PCIE
2579
a09b9b68
KG
2580- CONFIG_SYS_SRIOn_MEM_VIRT:
2581 Virtual Address of SRIO port 'n' memory region
2582
62f9b654 2583- CONFIG_SYS_SRIOn_MEM_PHYxS:
a09b9b68
KG
2584 Physical Address of SRIO port 'n' memory region
2585
2586- CONFIG_SYS_SRIOn_MEM_SIZE:
2587 Size of SRIO port 'n' memory region
2588
66bd1846
FE
2589- CONFIG_SYS_NAND_BUSWIDTH_16BIT
2590 Defined to tell the NAND controller that the NAND chip is using
2591 a 16 bit bus.
2592 Not all NAND drivers use this symbol.
a430e916 2593 Example of drivers that use it:
a430fa06
MR
2594 - drivers/mtd/nand/raw/ndfc.c
2595 - drivers/mtd/nand/raw/mxc_nand.c
eced4626
AW
2596
2597- CONFIG_SYS_NDFC_EBC0_CFG
2598 Sets the EBC0_CFG register for the NDFC. If not defined
2599 a default value will be used.
2600
bb99ad6d 2601- CONFIG_SPD_EEPROM
218ca724
WD
2602 Get DDR timing information from an I2C EEPROM. Common
2603 with pluggable memory modules such as SODIMMs
2604
bb99ad6d
BW
2605 SPD_EEPROM_ADDRESS
2606 I2C address of the SPD EEPROM
2607
6d0f6bcf 2608- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
2609 If SPD EEPROM is on an I2C bus other than the first
2610 one, specify here. Note that the value must resolve
2611 to something your driver can deal with.
bb99ad6d 2612
1b3e3c4f
YS
2613- CONFIG_SYS_DDR_RAW_TIMING
2614 Get DDR timing information from other than SPD. Common with
2615 soldered DDR chips onboard without SPD. DDR raw timing
2616 parameters are extracted from datasheet and hard-coded into
2617 header files or board specific files.
2618
6f5e1dc5
YS
2619- CONFIG_FSL_DDR_INTERACTIVE
2620 Enable interactive DDR debugging. See doc/README.fsl-ddr.
2621
e32d59a2
YS
2622- CONFIG_FSL_DDR_SYNC_REFRESH
2623 Enable sync of refresh for multiple controllers.
2624
4516ff81
YS
2625- CONFIG_FSL_DDR_BIST
2626 Enable built-in memory test for Freescale DDR controllers.
2627
6d0f6bcf 2628- CONFIG_SYS_83XX_DDR_USES_CS0
218ca724
WD
2629 Only for 83xx systems. If specified, then DDR should
2630 be configured using CS0 and CS1 instead of CS2 and CS3.
2ad6b513 2631
c26e454d
WD
2632- CONFIG_RMII
2633 Enable RMII mode for all FECs.
2634 Note that this is a global option, we can't
2635 have one FEC in standard MII mode and another in RMII mode.
2636
5cf91d6b
WD
2637- CONFIG_CRC32_VERIFY
2638 Add a verify option to the crc32 command.
2639 The syntax is:
2640
2641 => crc32 -v <address> <count> <crc32>
2642
2643 Where address/count indicate a memory area
2644 and crc32 is the correct crc32 which the
2645 area should have.
2646
56523f12
WD
2647- CONFIG_LOOPW
2648 Add the "loopw" memory command. This only takes effect if
493f420e 2649 the memory commands are activated globally (CONFIG_CMD_MEMORY).
56523f12 2650
72732318 2651- CONFIG_CMD_MX_CYCLIC
7b466641
SR
2652 Add the "mdc" and "mwc" memory commands. These are cyclic
2653 "md/mw" commands.
2654 Examples:
2655
efe2a4d5 2656 => mdc.b 10 4 500
7b466641
SR
2657 This command will print 4 bytes (10,11,12,13) each 500 ms.
2658
efe2a4d5 2659 => mwc.l 100 12345678 10
7b466641
SR
2660 This command will write 12345678 to address 100 all 10 ms.
2661
efe2a4d5 2662 This only takes effect if the memory commands are activated
493f420e 2663 globally (CONFIG_CMD_MEMORY).
7b466641 2664
401bb30b 2665- CONFIG_SPL_BUILD
32f2ca2a
TH
2666 Set when the currently-running compilation is for an artifact
2667 that will end up in the SPL (as opposed to the TPL or U-Boot
2668 proper). Code that needs stage-specific behavior should check
2669 this.
400558b5 2670
3aa29de0 2671- CONFIG_TPL_BUILD
32f2ca2a
TH
2672 Set when the currently-running compilation is for an artifact
2673 that will end up in the TPL (as opposed to the SPL or U-Boot
2674 proper). Code that needs stage-specific behavior should check
2675 this.
3aa29de0 2676
5df572f0
YZ
2677- CONFIG_SYS_MPC85XX_NO_RESETVEC
2678 Only for 85xx systems. If this variable is specified, the section
2679 .resetvec is not kept and the section .bootpg is placed in the
2680 previous 4k of the .text section.
2681
4213fc29
SG
2682- CONFIG_ARCH_MAP_SYSMEM
2683 Generally U-Boot (and in particular the md command) uses
2684 effective address. It is therefore not necessary to regard
2685 U-Boot address as virtual addresses that need to be translated
2686 to physical addresses. However, sandbox requires this, since
2687 it maintains its own little RAM buffer which contains all
2688 addressable memory. This option causes some memory accesses
2689 to be mapped through map_sysmem() / unmap_sysmem().
2690
588a13f7
SG
2691- CONFIG_X86_RESET_VECTOR
2692 If defined, the x86 reset vector code is included. This is not
2693 needed when U-Boot is running from Coreboot.
b16f521a 2694
999d7d32
KM
2695- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
2696 Option to disable subpage write in NAND driver
2697 driver that uses this:
a430fa06 2698 drivers/mtd/nand/raw/davinci_nand.c
999d7d32 2699
f2717b47
TT
2700Freescale QE/FMAN Firmware Support:
2701-----------------------------------
2702
2703The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
2704loading of "firmware", which is encoded in the QE firmware binary format.
2705This firmware often needs to be loaded during U-Boot booting, so macros
2706are used to identify the storage device (NOR flash, SPI, etc) and the address
2707within that device.
2708
dcf1d774
ZQ
2709- CONFIG_SYS_FMAN_FW_ADDR
2710 The address in the storage device where the FMAN microcode is located. The
cc1e98b5 2711 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
dcf1d774
ZQ
2712 is also specified.
2713
2714- CONFIG_SYS_QE_FW_ADDR
2715 The address in the storage device where the QE microcode is located. The
cc1e98b5 2716 meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro
f2717b47
TT
2717 is also specified.
2718
2719- CONFIG_SYS_QE_FMAN_FW_LENGTH
2720 The maximum possible size of the firmware. The firmware binary format
2721 has a field that specifies the actual size of the firmware, but it
2722 might not be possible to read any part of the firmware unless some
2723 local storage is allocated to hold the entire firmware first.
2724
2725- CONFIG_SYS_QE_FMAN_FW_IN_NOR
2726 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
2727 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
2728 virtual address in NOR flash.
2729
2730- CONFIG_SYS_QE_FMAN_FW_IN_NAND
2731 Specifies that QE/FMAN firmware is located in NAND flash.
2732 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
2733
2734- CONFIG_SYS_QE_FMAN_FW_IN_MMC
2735 Specifies that QE/FMAN firmware is located on the primary SD/MMC
2736 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
2737
292dc6c5
LG
2738- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
2739 Specifies that QE/FMAN firmware is located in the remote (master)
2740 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
2741 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
2742 window->master inbound window->master LAW->the ucode address in
2743 master's memory space.
f2717b47 2744
b940ca64
GR
2745Freescale Layerscape Management Complex Firmware Support:
2746---------------------------------------------------------
2747The Freescale Layerscape Management Complex (MC) supports the loading of
2748"firmware".
2749This firmware often needs to be loaded during U-Boot booting, so macros
2750are used to identify the storage device (NOR flash, SPI, etc) and the address
2751within that device.
2752
2753- CONFIG_FSL_MC_ENET
2754 Enable the MC driver for Layerscape SoCs.
2755
5c055089
PK
2756Freescale Layerscape Debug Server Support:
2757-------------------------------------------
2758The Freescale Layerscape Debug Server Support supports the loading of
2759"Debug Server firmware" and triggering SP boot-rom.
2760This firmware often needs to be loaded during U-Boot booting.
2761
c0492141
YS
2762- CONFIG_SYS_MC_RSV_MEM_ALIGN
2763 Define alignment of reserved memory MC requires
5c055089 2764
f3f431a7
PK
2765Reproducible builds
2766-------------------
2767
2768In order to achieve reproducible builds, timestamps used in the U-Boot build
2769process have to be set to a fixed value.
2770
2771This is done using the SOURCE_DATE_EPOCH environment variable.
2772SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
2773option for U-Boot or an environment variable in U-Boot.
2774
2775SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
2776
c609719b
WD
2777Building the Software:
2778======================
2779
218ca724
WD
2780Building U-Boot has been tested in several native build environments
2781and in many different cross environments. Of course we cannot support
2782all possibly existing versions of cross development tools in all
2783(potentially obsolete) versions. In case of tool chain problems we
047f6ec0 2784recommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK)
218ca724 2785which is extensively used to build and test U-Boot.
c609719b 2786
218ca724
WD
2787If you are not using a native environment, it is assumed that you
2788have GNU cross compiling tools available in your path. In this case,
2789you must set the environment variable CROSS_COMPILE in your shell.
2790Note that no changes to the Makefile or any other source files are
2791necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 2792
218ca724
WD
2793 $ CROSS_COMPILE=ppc_4xx-
2794 $ export CROSS_COMPILE
c609719b 2795
218ca724
WD
2796U-Boot is intended to be simple to build. After installing the
2797sources you must configure U-Boot for one specific board type. This
c609719b
WD
2798is done by typing:
2799
ab584d67 2800 make NAME_defconfig
c609719b 2801
ab584d67 2802where "NAME_defconfig" is the name of one of the existing configu-
ecb3a0a1 2803rations; see configs/*_defconfig for supported names.
db01a2ea 2804
ecb3a0a1 2805Note: for some boards special configuration names may exist; check if
2729af9d
WD
2806 additional information is available from the board vendor; for
2807 instance, the TQM823L systems are available without (standard)
2808 or with LCD support. You can select such additional "features"
11ccc33f 2809 when choosing the configuration, i. e.
2729af9d 2810
ab584d67 2811 make TQM823L_defconfig
2729af9d
WD
2812 - will configure for a plain TQM823L, i. e. no LCD support
2813
ab584d67 2814 make TQM823L_LCD_defconfig
2729af9d
WD
2815 - will configure for a TQM823L with U-Boot console on LCD
2816
2817 etc.
2818
2819
2820Finally, type "make all", and you should get some working U-Boot
2821images ready for download to / installation on your system:
2822
2823- "u-boot.bin" is a raw binary image
2824- "u-boot" is an image in ELF binary format
2825- "u-boot.srec" is in Motorola S-Record format
2826
baf31249
MB
2827By default the build is performed locally and the objects are saved
2828in the source directory. One of the two methods can be used to change
2829this behavior and build U-Boot to some external directory:
2830
28311. Add O= to the make command line invocations:
2832
2833 make O=/tmp/build distclean
ab584d67 2834 make O=/tmp/build NAME_defconfig
baf31249
MB
2835 make O=/tmp/build all
2836
adbba996 28372. Set environment variable KBUILD_OUTPUT to point to the desired location:
baf31249 2838
adbba996 2839 export KBUILD_OUTPUT=/tmp/build
baf31249 2840 make distclean
ab584d67 2841 make NAME_defconfig
baf31249
MB
2842 make all
2843
adbba996 2844Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
baf31249
MB
2845variable.
2846
215bb1c1
DS
2847User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
2848setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
2849For example to treat all compiler warnings as errors:
2850
2851 make KCFLAGS=-Werror
2729af9d
WD
2852
2853Please be aware that the Makefiles assume you are using GNU make, so
2854for instance on NetBSD you might need to use "gmake" instead of
2855native "make".
2856
2857
2858If the system board that you have is not listed, then you will need
2859to port U-Boot to your hardware platform. To do this, follow these
2860steps:
2861
3c1496cd 28621. Create a new directory to hold your board specific code. Add any
2729af9d 2863 files you need. In your board directory, you will need at least
3c1496cd
PS
2864 the "Makefile" and a "<board>.c".
28652. Create a new configuration file "include/configs/<board>.h" for
2866 your board.
2729af9d
WD
28673. If you're porting U-Boot to a new CPU, then also create a new
2868 directory to hold your CPU specific code. Add any files you need.
ab584d67 28694. Run "make <board>_defconfig" with your new name.
2729af9d
WD
28705. Type "make", and you should get a working "u-boot.srec" file
2871 to be installed on your target system.
28726. Debug and solve any problems that might arise.
2873 [Of course, this last step is much harder than it sounds.]
2874
2875
2876Testing of U-Boot Modifications, Ports to New Hardware, etc.:
2877==============================================================
2878
218ca724
WD
2879If you have modified U-Boot sources (for instance added a new board
2880or support for new devices, a new CPU, etc.) you are expected to
2729af9d 2881provide feedback to the other developers. The feedback normally takes
32f2ca2a 2882the form of a "patch", i.e. a context diff against a certain (latest
218ca724 2883official or latest in the git repository) version of U-Boot sources.
2729af9d 2884
218ca724
WD
2885But before you submit such a patch, please verify that your modifi-
2886cation did not break existing code. At least make sure that *ALL* of
2729af9d 2887the supported boards compile WITHOUT ANY compiler warnings. To do so,
6de80f21
SG
2888just run the buildman script (tools/buildman/buildman), which will
2889configure and build U-Boot for ALL supported system. Be warned, this
2890will take a while. Please see the buildman README, or run 'buildman -H'
2891for documentation.
baf31249
MB
2892
2893
2729af9d
WD
2894See also "U-Boot Porting Guide" below.
2895
2896
2897Monitor Commands - Overview:
2898============================
2899
2900go - start application at address 'addr'
2901run - run commands in an environment variable
2902bootm - boot application image from memory
2903bootp - boot image via network using BootP/TFTP protocol
44f074c7 2904bootz - boot zImage from memory
2729af9d
WD
2905tftpboot- boot image via network using TFTP protocol
2906 and env variables "ipaddr" and "serverip"
2907 (and eventually "gatewayip")
1fb7cd49 2908tftpput - upload a file via network using TFTP protocol
2729af9d
WD
2909rarpboot- boot image via network using RARP/TFTP protocol
2910diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
2911loads - load S-Record file over serial line
2912loadb - load binary file over serial line (kermit mode)
2913md - memory display
2914mm - memory modify (auto-incrementing)
2915nm - memory modify (constant address)
2916mw - memory write (fill)
bdded201 2917ms - memory search
2729af9d
WD
2918cp - memory copy
2919cmp - memory compare
2920crc32 - checksum calculation
0f89c54b 2921i2c - I2C sub-system
2729af9d
WD
2922sspi - SPI utility commands
2923base - print or set address offset
2924printenv- print environment variables
9e9a530a 2925pwm - control pwm channels
2729af9d
WD
2926setenv - set environment variables
2927saveenv - save environment variables to persistent storage
2928protect - enable or disable FLASH write protection
2929erase - erase FLASH memory
2930flinfo - print FLASH memory information
10635afa 2931nand - NAND memory operations (see doc/README.nand)
2729af9d
WD
2932bdinfo - print Board Info structure
2933iminfo - print header information for application image
2934coninfo - print console devices and informations
2935ide - IDE sub-system
2936loop - infinite loop on address range
56523f12 2937loopw - infinite write loop on address range
2729af9d
WD
2938mtest - simple RAM test
2939icache - enable or disable instruction cache
2940dcache - enable or disable data cache
2941reset - Perform RESET of the CPU
2942echo - echo args to console
2943version - print monitor version
2944help - print online help
2945? - alias for 'help'
2946
2947
2948Monitor Commands - Detailed Description:
2949========================================
2950
2951TODO.
2952
2953For now: just type "help <command>".
2954
2955
2729af9d
WD
2956Note for Redundant Ethernet Interfaces:
2957=======================================
c609719b 2958
11ccc33f 2959Some boards come with redundant Ethernet interfaces; U-Boot supports
2729af9d
WD
2960such configurations and is capable of automatic selection of a
2961"working" interface when needed. MAC assignment works as follows:
c609719b 2962
2729af9d
WD
2963Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
2964MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
2965"eth1addr" (=>eth1), "eth2addr", ...
c609719b 2966
2729af9d
WD
2967If the network interface stores some valid MAC address (for instance
2968in SROM), this is used as default address if there is NO correspon-
2969ding setting in the environment; if the corresponding environment
2970variable is set, this overrides the settings in the card; that means:
c609719b 2971
2729af9d
WD
2972o If the SROM has a valid MAC address, and there is no address in the
2973 environment, the SROM's address is used.
c609719b 2974
2729af9d
WD
2975o If there is no valid address in the SROM, and a definition in the
2976 environment exists, then the value from the environment variable is
2977 used.
c609719b 2978
2729af9d
WD
2979o If both the SROM and the environment contain a MAC address, and
2980 both addresses are the same, this MAC address is used.
c609719b 2981
2729af9d
WD
2982o If both the SROM and the environment contain a MAC address, and the
2983 addresses differ, the value from the environment is used and a
2984 warning is printed.
c609719b 2985
2729af9d 2986o If neither SROM nor the environment contain a MAC address, an error
bef1014b
JH
2987 is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
2988 a random, locally-assigned MAC is used.
c609719b 2989
ecee9324 2990If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 2991will be programmed into hardware as part of the initialization process. This
ecee9324
BW
2992may be skipped by setting the appropriate 'ethmacskip' environment variable.
2993The naming convention is as follows:
2994"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 2995
2729af9d
WD
2996Image Formats:
2997==============
c609719b 2998
3310c549
MB
2999U-Boot is capable of booting (and performing other auxiliary operations on)
3000images in two formats:
3001
3002New uImage format (FIT)
3003-----------------------
3004
3005Flexible and powerful format based on Flattened Image Tree -- FIT (similar
3006to Flattened Device Tree). It allows the use of images with multiple
3007components (several kernels, ramdisks, etc.), with contents protected by
3008SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
3009
3010
3011Old uImage format
3012-----------------
3013
3014Old image format is based on binary files which can be basically anything,
3015preceded by a special header; see the definitions in include/image.h for
3016details; basically, the header defines the following image properties:
c609719b 3017
2729af9d
WD
3018* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
3019 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39
PT
3020 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
3021 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
3022 INTEGRITY).
daab59ac 3023* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
afc1ce82 3024 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
daab59ac 3025 Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
2729af9d
WD
3026* Compression Type (uncompressed, gzip, bzip2)
3027* Load Address
3028* Entry Point
3029* Image Name
3030* Image Timestamp
c609719b 3031
2729af9d
WD
3032The header is marked by a special Magic Number, and both the header
3033and the data portions of the image are secured against corruption by
3034CRC32 checksums.
c609719b
WD
3035
3036
2729af9d
WD
3037Linux Support:
3038==============
c609719b 3039
2729af9d
WD
3040Although U-Boot should support any OS or standalone application
3041easily, the main focus has always been on Linux during the design of
3042U-Boot.
c609719b 3043
2729af9d
WD
3044U-Boot includes many features that so far have been part of some
3045special "boot loader" code within the Linux kernel. Also, any
3046"initrd" images to be used are no longer part of one big Linux image;
3047instead, kernel and "initrd" are separate images. This implementation
3048serves several purposes:
c609719b 3049
2729af9d
WD
3050- the same features can be used for other OS or standalone
3051 applications (for instance: using compressed images to reduce the
3052 Flash memory footprint)
c609719b 3053
2729af9d
WD
3054- it becomes much easier to port new Linux kernel versions because
3055 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 3056
2729af9d
WD
3057- the same Linux kernel image can now be used with different "initrd"
3058 images; of course this also means that different kernel images can
3059 be run with the same "initrd". This makes testing easier (you don't
3060 have to build a new "zImage.initrd" Linux image when you just
3061 change a file in your "initrd"). Also, a field-upgrade of the
3062 software is easier now.
c609719b 3063
c609719b 3064
2729af9d
WD
3065Linux HOWTO:
3066============
c609719b 3067
2729af9d
WD
3068Porting Linux to U-Boot based systems:
3069---------------------------------------
c609719b 3070
2729af9d
WD
3071U-Boot cannot save you from doing all the necessary modifications to
3072configure the Linux device drivers for use with your target hardware
3073(no, we don't intend to provide a full virtual machine interface to
3074Linux :-).
c609719b 3075
a47a12be 3076But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 3077
2729af9d
WD
3078Just make sure your machine specific header file (for instance
3079include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
3080Information structure as we define in include/asm-<arch>/u-boot.h,
3081and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 3082as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 3083
2eb31b13
SG
3084Note that U-Boot now has a driver model, a unified model for drivers.
3085If you are adding a new driver, plumb it into driver model. If there
3086is no uclass available, you are encouraged to create one. See
3087doc/driver-model.
3088
c609719b 3089
2729af9d
WD
3090Configuring the Linux kernel:
3091-----------------------------
c609719b 3092
2729af9d
WD
3093No specific requirements for U-Boot. Make sure you have some root
3094device (initial ramdisk, NFS) for your target system.
3095
3096
3097Building a Linux Image:
3098-----------------------
c609719b 3099
2729af9d
WD
3100With U-Boot, "normal" build targets like "zImage" or "bzImage" are
3101not used. If you use recent kernel source, a new build target
3102"uImage" will exist which automatically builds an image usable by
3103U-Boot. Most older kernels also have support for a "pImage" target,
3104which was introduced for our predecessor project PPCBoot and uses a
3105100% compatible format.
3106
3107Example:
3108
ab584d67 3109 make TQM850L_defconfig
2729af9d
WD
3110 make oldconfig
3111 make dep
3112 make uImage
3113
3114The "uImage" build target uses a special tool (in 'tools/mkimage') to
3115encapsulate a compressed Linux kernel image with header information,
3116CRC32 checksum etc. for use with U-Boot. This is what we are doing:
3117
3118* build a standard "vmlinux" kernel image (in ELF binary format):
3119
3120* convert the kernel into a raw binary image:
3121
3122 ${CROSS_COMPILE}-objcopy -O binary \
3123 -R .note -R .comment \
3124 -S vmlinux linux.bin
3125
3126* compress the binary image:
3127
3128 gzip -9 linux.bin
3129
3130* package compressed binary image for U-Boot:
3131
3132 mkimage -A ppc -O linux -T kernel -C gzip \
3133 -a 0 -e 0 -n "Linux Kernel Image" \
3134 -d linux.bin.gz uImage
c609719b 3135
c609719b 3136
2729af9d
WD
3137The "mkimage" tool can also be used to create ramdisk images for use
3138with U-Boot, either separated from the Linux kernel image, or
3139combined into one file. "mkimage" encapsulates the images with a 64
3140byte header containing information about target architecture,
3141operating system, image type, compression method, entry points, time
3142stamp, CRC32 checksums, etc.
3143
3144"mkimage" can be called in two ways: to verify existing images and
3145print the header information, or to build new images.
3146
3147In the first form (with "-l" option) mkimage lists the information
3148contained in the header of an existing U-Boot image; this includes
3149checksum verification:
c609719b 3150
2729af9d
WD
3151 tools/mkimage -l image
3152 -l ==> list image header information
3153
3154The second form (with "-d" option) is used to build a U-Boot image
3155from a "data file" which is used as image payload:
3156
3157 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
3158 -n name -d data_file image
3159 -A ==> set architecture to 'arch'
3160 -O ==> set operating system to 'os'
3161 -T ==> set image type to 'type'
3162 -C ==> set compression type 'comp'
3163 -a ==> set load address to 'addr' (hex)
3164 -e ==> set entry point to 'ep' (hex)
3165 -n ==> set image name to 'name'
3166 -d ==> use image data from 'datafile'
3167
69459791
WD
3168Right now, all Linux kernels for PowerPC systems use the same load
3169address (0x00000000), but the entry point address depends on the
3170kernel version:
2729af9d
WD
3171
3172- 2.2.x kernels have the entry point at 0x0000000C,
3173- 2.3.x and later kernels have the entry point at 0x00000000.
3174
3175So a typical call to build a U-Boot image would read:
3176
3177 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
3178 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 3179 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
2729af9d
WD
3180 > examples/uImage.TQM850L
3181 Image Name: 2.4.4 kernel for TQM850L
3182 Created: Wed Jul 19 02:34:59 2000
3183 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3184 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
3185 Load Address: 0x00000000
3186 Entry Point: 0x00000000
3187
3188To verify the contents of the image (or check for corruption):
3189
3190 -> tools/mkimage -l examples/uImage.TQM850L
3191 Image Name: 2.4.4 kernel for TQM850L
3192 Created: Wed Jul 19 02:34:59 2000
3193 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3194 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
3195 Load Address: 0x00000000
3196 Entry Point: 0x00000000
3197
3198NOTE: for embedded systems where boot time is critical you can trade
3199speed for memory and install an UNCOMPRESSED image instead: this
3200needs more space in Flash, but boots much faster since it does not
3201need to be uncompressed:
3202
a47a12be 3203 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
3204 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
3205 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 3206 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
2729af9d
WD
3207 > examples/uImage.TQM850L-uncompressed
3208 Image Name: 2.4.4 kernel for TQM850L
3209 Created: Wed Jul 19 02:34:59 2000
3210 Image Type: PowerPC Linux Kernel Image (uncompressed)
3211 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
3212 Load Address: 0x00000000
3213 Entry Point: 0x00000000
3214
3215
3216Similar you can build U-Boot images from a 'ramdisk.image.gz' file
3217when your kernel is intended to use an initial ramdisk:
3218
3219 -> tools/mkimage -n 'Simple Ramdisk Image' \
3220 > -A ppc -O linux -T ramdisk -C gzip \
3221 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
3222 Image Name: Simple Ramdisk Image
3223 Created: Wed Jan 12 14:01:50 2000
3224 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3225 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
3226 Load Address: 0x00000000
3227 Entry Point: 0x00000000
3228
e157a111
TH
3229The "dumpimage" tool can be used to disassemble or list the contents of images
3230built by mkimage. See dumpimage's help output (-h) for details.
2729af9d
WD
3231
3232Installing a Linux Image:
3233-------------------------
3234
3235To downloading a U-Boot image over the serial (console) interface,
3236you must convert the image to S-Record format:
3237
3238 objcopy -I binary -O srec examples/image examples/image.srec
3239
3240The 'objcopy' does not understand the information in the U-Boot
3241image header, so the resulting S-Record file will be relative to
3242address 0x00000000. To load it to a given address, you need to
3243specify the target address as 'offset' parameter with the 'loads'
3244command.
3245
3246Example: install the image to address 0x40100000 (which on the
3247TQM8xxL is in the first Flash bank):
3248
3249 => erase 40100000 401FFFFF
3250
3251 .......... done
3252 Erased 8 sectors
3253
3254 => loads 40100000
3255 ## Ready for S-Record download ...
3256 ~>examples/image.srec
3257 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
3258 ...
3259 15989 15990 15991 15992
3260 [file transfer complete]
3261 [connected]
3262 ## Start Addr = 0x00000000
3263
3264
3265You can check the success of the download using the 'iminfo' command;
218ca724 3266this includes a checksum verification so you can be sure no data
2729af9d
WD
3267corruption happened:
3268
3269 => imi 40100000
3270
3271 ## Checking Image at 40100000 ...
3272 Image Name: 2.2.13 for initrd on TQM850L
3273 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3274 Data Size: 335725 Bytes = 327 kB = 0 MB
3275 Load Address: 00000000
3276 Entry Point: 0000000c
3277 Verifying Checksum ... OK
3278
3279
3280Boot Linux:
3281-----------
3282
3283The "bootm" command is used to boot an application that is stored in
3284memory (RAM or Flash). In case of a Linux kernel image, the contents
3285of the "bootargs" environment variable is passed to the kernel as
3286parameters. You can check and modify this variable using the
3287"printenv" and "setenv" commands:
3288
3289
3290 => printenv bootargs
3291 bootargs=root=/dev/ram
3292
3293 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3294
3295 => printenv bootargs
3296 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3297
3298 => bootm 40020000
3299 ## Booting Linux kernel at 40020000 ...
3300 Image Name: 2.2.13 for NFS on TQM850L
3301 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3302 Data Size: 381681 Bytes = 372 kB = 0 MB
3303 Load Address: 00000000
3304 Entry Point: 0000000c
3305 Verifying Checksum ... OK
3306 Uncompressing Kernel Image ... OK
3307 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
3308 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3309 time_init: decrementer frequency = 187500000/60
3310 Calibrating delay loop... 49.77 BogoMIPS
3311 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
3312 ...
3313
11ccc33f 3314If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
3315the memory addresses of both the kernel and the initrd image (PPBCOOT
3316format!) to the "bootm" command:
3317
3318 => imi 40100000 40200000
3319
3320 ## Checking Image at 40100000 ...
3321 Image Name: 2.2.13 for initrd on TQM850L
3322 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3323 Data Size: 335725 Bytes = 327 kB = 0 MB
3324 Load Address: 00000000
3325 Entry Point: 0000000c
3326 Verifying Checksum ... OK
3327
3328 ## Checking Image at 40200000 ...
3329 Image Name: Simple Ramdisk Image
3330 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3331 Data Size: 566530 Bytes = 553 kB = 0 MB
3332 Load Address: 00000000
3333 Entry Point: 00000000
3334 Verifying Checksum ... OK
3335
3336 => bootm 40100000 40200000
3337 ## Booting Linux kernel at 40100000 ...
3338 Image Name: 2.2.13 for initrd on TQM850L
3339 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3340 Data Size: 335725 Bytes = 327 kB = 0 MB
3341 Load Address: 00000000
3342 Entry Point: 0000000c
3343 Verifying Checksum ... OK
3344 Uncompressing Kernel Image ... OK
3345 ## Loading RAMDisk Image at 40200000 ...
3346 Image Name: Simple Ramdisk Image
3347 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3348 Data Size: 566530 Bytes = 553 kB = 0 MB
3349 Load Address: 00000000
3350 Entry Point: 00000000
3351 Verifying Checksum ... OK
3352 Loading Ramdisk ... OK
3353 Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
3354 Boot arguments: root=/dev/ram
3355 time_init: decrementer frequency = 187500000/60
3356 Calibrating delay loop... 49.77 BogoMIPS
3357 ...
3358 RAMDISK: Compressed image found at block 0
3359 VFS: Mounted root (ext2 filesystem).
3360
3361 bash#
3362
0267768e
MM
3363Boot Linux and pass a flat device tree:
3364-----------
3365
3366First, U-Boot must be compiled with the appropriate defines. See the section
3367titled "Linux Kernel Interface" above for a more in depth explanation. The
3368following is an example of how to start a kernel and pass an updated
3369flat device tree:
3370
3371=> print oftaddr
3372oftaddr=0x300000
3373=> print oft
3374oft=oftrees/mpc8540ads.dtb
3375=> tftp $oftaddr $oft
3376Speed: 1000, full duplex
3377Using TSEC0 device
3378TFTP from server 192.168.1.1; our IP address is 192.168.1.101
3379Filename 'oftrees/mpc8540ads.dtb'.
3380Load address: 0x300000
3381Loading: #
3382done
3383Bytes transferred = 4106 (100a hex)
3384=> tftp $loadaddr $bootfile
3385Speed: 1000, full duplex
3386Using TSEC0 device
3387TFTP from server 192.168.1.1; our IP address is 192.168.1.2
3388Filename 'uImage'.
3389Load address: 0x200000
3390Loading:############
3391done
3392Bytes transferred = 1029407 (fb51f hex)
3393=> print loadaddr
3394loadaddr=200000
3395=> print oftaddr
3396oftaddr=0x300000
3397=> bootm $loadaddr - $oftaddr
3398## Booting image at 00200000 ...
a9398e01
WD
3399 Image Name: Linux-2.6.17-dirty
3400 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3401 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 3402 Load Address: 00000000
a9398e01 3403 Entry Point: 00000000
0267768e
MM
3404 Verifying Checksum ... OK
3405 Uncompressing Kernel Image ... OK
3406Booting using flat device tree at 0x300000
3407Using MPC85xx ADS machine description
3408Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
3409[snip]
3410
3411
2729af9d
WD
3412More About U-Boot Image Types:
3413------------------------------
3414
3415U-Boot supports the following image types:
3416
3417 "Standalone Programs" are directly runnable in the environment
3418 provided by U-Boot; it is expected that (if they behave
3419 well) you can continue to work in U-Boot after return from
3420 the Standalone Program.
3421 "OS Kernel Images" are usually images of some Embedded OS which
3422 will take over control completely. Usually these programs
3423 will install their own set of exception handlers, device
3424 drivers, set up the MMU, etc. - this means, that you cannot
3425 expect to re-enter U-Boot except by resetting the CPU.
3426 "RAMDisk Images" are more or less just data blocks, and their
3427 parameters (address, size) are passed to an OS kernel that is
3428 being started.
3429 "Multi-File Images" contain several images, typically an OS
3430 (Linux) kernel image and one or more data images like
3431 RAMDisks. This construct is useful for instance when you want
3432 to boot over the network using BOOTP etc., where the boot
3433 server provides just a single image file, but you want to get
3434 for instance an OS kernel and a RAMDisk image.
3435
3436 "Multi-File Images" start with a list of image sizes, each
3437 image size (in bytes) specified by an "uint32_t" in network
3438 byte order. This list is terminated by an "(uint32_t)0".
3439 Immediately after the terminating 0 follow the images, one by
3440 one, all aligned on "uint32_t" boundaries (size rounded up to
3441 a multiple of 4 bytes).
3442
3443 "Firmware Images" are binary images containing firmware (like
3444 U-Boot or FPGA images) which usually will be programmed to
3445 flash memory.
3446
3447 "Script files" are command sequences that will be executed by
3448 U-Boot's command interpreter; this feature is especially
3449 useful when you configure U-Boot to use a real shell (hush)
3450 as command interpreter.
3451
44f074c7
MV
3452Booting the Linux zImage:
3453-------------------------
3454
3455On some platforms, it's possible to boot Linux zImage. This is done
3456using the "bootz" command. The syntax of "bootz" command is the same
3457as the syntax of "bootm" command.
3458
8ac28563 3459Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
3460kernel with raw initrd images. The syntax is slightly different, the
3461address of the initrd must be augmented by it's size, in the following
3462format: "<initrd addres>:<initrd size>".
3463
2729af9d
WD
3464
3465Standalone HOWTO:
3466=================
3467
3468One of the features of U-Boot is that you can dynamically load and
3469run "standalone" applications, which can use some resources of
3470U-Boot like console I/O functions or interrupt services.
3471
3472Two simple examples are included with the sources:
3473
3474"Hello World" Demo:
3475-------------------
3476
3477'examples/hello_world.c' contains a small "Hello World" Demo
3478application; it is automatically compiled when you build U-Boot.
3479It's configured to run at address 0x00040004, so you can play with it
3480like that:
3481
3482 => loads
3483 ## Ready for S-Record download ...
3484 ~>examples/hello_world.srec
3485 1 2 3 4 5 6 7 8 9 10 11 ...
3486 [file transfer complete]
3487 [connected]
3488 ## Start Addr = 0x00040004
3489
3490 => go 40004 Hello World! This is a test.
3491 ## Starting application at 0x00040004 ...
3492 Hello World
3493 argc = 7
3494 argv[0] = "40004"
3495 argv[1] = "Hello"
3496 argv[2] = "World!"
3497 argv[3] = "This"
3498 argv[4] = "is"
3499 argv[5] = "a"
3500 argv[6] = "test."
3501 argv[7] = "<NULL>"
3502 Hit any key to exit ...
3503
3504 ## Application terminated, rc = 0x0
3505
3506Another example, which demonstrates how to register a CPM interrupt
3507handler with the U-Boot code, can be found in 'examples/timer.c'.
3508Here, a CPM timer is set up to generate an interrupt every second.
3509The interrupt service routine is trivial, just printing a '.'
3510character, but this is just a demo program. The application can be
3511controlled by the following keys:
3512
3513 ? - print current values og the CPM Timer registers
3514 b - enable interrupts and start timer
3515 e - stop timer and disable interrupts
3516 q - quit application
3517
3518 => loads
3519 ## Ready for S-Record download ...
3520 ~>examples/timer.srec
3521 1 2 3 4 5 6 7 8 9 10 11 ...
3522 [file transfer complete]
3523 [connected]
3524 ## Start Addr = 0x00040004
3525
3526 => go 40004
3527 ## Starting application at 0x00040004 ...
3528 TIMERS=0xfff00980
3529 Using timer 1
3530 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
3531
3532Hit 'b':
3533 [q, b, e, ?] Set interval 1000000 us
3534 Enabling timer
3535Hit '?':
3536 [q, b, e, ?] ........
3537 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
3538Hit '?':
3539 [q, b, e, ?] .
3540 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
3541Hit '?':
3542 [q, b, e, ?] .
3543 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
3544Hit '?':
3545 [q, b, e, ?] .
3546 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
3547Hit 'e':
3548 [q, b, e, ?] ...Stopping timer
3549Hit 'q':
3550 [q, b, e, ?] ## Application terminated, rc = 0x0
3551
3552
3553Minicom warning:
3554================
3555
3556Over time, many people have reported problems when trying to use the
3557"minicom" terminal emulation program for serial download. I (wd)
3558consider minicom to be broken, and recommend not to use it. Under
3559Unix, I recommend to use C-Kermit for general purpose use (and
3560especially for kermit binary protocol download ("loadb" command), and
e53515a2 3561use "cu" for S-Record download ("loads" command). See
047f6ec0 3562https://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
e53515a2
KP
3563for help with kermit.
3564
2729af9d
WD
3565
3566Nevertheless, if you absolutely want to use it try adding this
3567configuration to your "File transfer protocols" section:
3568
3569 Name Program Name U/D FullScr IO-Red. Multi
3570 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
3571 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
3572
3573
3574NetBSD Notes:
3575=============
3576
3577Starting at version 0.9.2, U-Boot supports NetBSD both as host
3578(build U-Boot) and target system (boots NetBSD/mpc8xx).
3579
3580Building requires a cross environment; it is known to work on
3581NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
3582need gmake since the Makefiles are not compatible with BSD make).
3583Note that the cross-powerpc package does not install include files;
3584attempting to build U-Boot will fail because <machine/ansi.h> is
3585missing. This file has to be installed and patched manually:
3586
3587 # cd /usr/pkg/cross/powerpc-netbsd/include
3588 # mkdir powerpc
3589 # ln -s powerpc machine
3590 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
3591 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
3592
3593Native builds *don't* work due to incompatibilities between native
3594and U-Boot include files.
3595
3596Booting assumes that (the first part of) the image booted is a
3597stage-2 loader which in turn loads and then invokes the kernel
3598proper. Loader sources will eventually appear in the NetBSD source
3599tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
2a8af187 3600meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
2729af9d
WD
3601
3602
3603Implementation Internals:
3604=========================
3605
3606The following is not intended to be a complete description of every
3607implementation detail. However, it should help to understand the
3608inner workings of U-Boot and make it easier to port it to custom
3609hardware.
3610
3611
3612Initial Stack, Global Data:
3613---------------------------
3614
3615The implementation of U-Boot is complicated by the fact that U-Boot
3616starts running out of ROM (flash memory), usually without access to
3617system RAM (because the memory controller is not initialized yet).
3618This means that we don't have writable Data or BSS segments, and BSS
3619is not initialized as zero. To be able to get a C environment working
3620at all, we have to allocate at least a minimal stack. Implementation
3621options for this are defined and restricted by the CPU used: Some CPU
3622models provide on-chip memory (like the IMMR area on MPC8xx and
3623MPC826x processors), on others (parts of) the data cache can be
3624locked as (mis-) used as memory, etc.
3625
218ca724 3626 Chris Hallinan posted a good summary of these issues to the
0668236b 3627 U-Boot mailing list:
2729af9d
WD
3628
3629 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
3630 From: "Chris Hallinan" <[email protected]>
3631 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
3632 ...
3633
3634 Correct me if I'm wrong, folks, but the way I understand it
3635 is this: Using DCACHE as initial RAM for Stack, etc, does not
3636 require any physical RAM backing up the cache. The cleverness
3637 is that the cache is being used as a temporary supply of
3638 necessary storage before the SDRAM controller is setup. It's
11ccc33f 3639 beyond the scope of this list to explain the details, but you
2729af9d
WD
3640 can see how this works by studying the cache architecture and
3641 operation in the architecture and processor-specific manuals.
3642
3643 OCM is On Chip Memory, which I believe the 405GP has 4K. It
3644 is another option for the system designer to use as an
11ccc33f 3645 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
3646 option should work for you. Using CS 4 should be fine if your
3647 board designers haven't used it for something that would
3648 cause you grief during the initial boot! It is frequently not
3649 used.
3650
6d0f6bcf 3651 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
3652 with your processor/board/system design. The default value
3653 you will find in any recent u-boot distribution in
8a316c9b 3654 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
3655 than your SDRAM module. If you have a 64MB SDRAM module, set
3656 it above 400_0000. Just make sure your board has no resources
3657 that are supposed to respond to that address! That code in
3658 start.S has been around a while and should work as is when
3659 you get the config right.
3660
3661 -Chris Hallinan
3662 DS4.COM, Inc.
3663
3664It is essential to remember this, since it has some impact on the C
3665code for the initialization procedures:
3666
3667* Initialized global data (data segment) is read-only. Do not attempt
3668 to write it.
3669
b445bbb4 3670* Do not use any uninitialized global data (or implicitly initialized
2729af9d
WD
3671 as zero data - BSS segment) at all - this is undefined, initiali-
3672 zation is performed later (when relocating to RAM).
3673
3674* Stack space is very limited. Avoid big data buffers or things like
3675 that.
3676
3677Having only the stack as writable memory limits means we cannot use
b445bbb4 3678normal global data to share information between the code. But it
2729af9d
WD
3679turned out that the implementation of U-Boot can be greatly
3680simplified by making a global data structure (gd_t) available to all
3681functions. We could pass a pointer to this data as argument to _all_
3682functions, but this would bloat the code. Instead we use a feature of
3683the GCC compiler (Global Register Variables) to share the data: we
3684place a pointer (gd) to the global data into a register which we
3685reserve for this purpose.
3686
3687When choosing a register for such a purpose we are restricted by the
3688relevant (E)ABI specifications for the current architecture, and by
3689GCC's implementation.
3690
3691For PowerPC, the following registers have specific use:
3692 R1: stack pointer
e7670f6c 3693 R2: reserved for system use
2729af9d
WD
3694 R3-R4: parameter passing and return values
3695 R5-R10: parameter passing
3696 R13: small data area pointer
3697 R30: GOT pointer
3698 R31: frame pointer
3699
e6bee808
JT
3700 (U-Boot also uses R12 as internal GOT pointer. r12
3701 is a volatile register so r12 needs to be reset when
3702 going back and forth between asm and C)
2729af9d 3703
e7670f6c 3704 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
3705
3706 Note: on PPC, we could use a static initializer (since the
3707 address of the global data structure is known at compile time),
3708 but it turned out that reserving a register results in somewhat
3709 smaller code - although the code savings are not that big (on
3710 average for all boards 752 bytes for the whole U-Boot image,
3711 624 text + 127 data).
3712
3713On ARM, the following registers are used:
3714
3715 R0: function argument word/integer result
3716 R1-R3: function argument word
12eba1b4
JH
3717 R9: platform specific
3718 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
3719 R11: argument (frame) pointer
3720 R12: temporary workspace
3721 R13: stack pointer
3722 R14: link register
3723 R15: program counter
3724
12eba1b4
JH
3725 ==> U-Boot will use R9 to hold a pointer to the global data
3726
3727 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 3728
0df01fd3 3729On Nios II, the ABI is documented here:
047f6ec0 3730 https://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
0df01fd3
TC
3731
3732 ==> U-Boot will use gp to hold a pointer to the global data
3733
3734 Note: on Nios II, we give "-G0" option to gcc and don't use gp
3735 to access small data sections, so gp is free.
3736
afc1ce82
ML
3737On NDS32, the following registers are used:
3738
3739 R0-R1: argument/return
3740 R2-R5: argument
3741 R15: temporary register for assembler
3742 R16: trampoline register
3743 R28: frame pointer (FP)
3744 R29: global pointer (GP)
3745 R30: link register (LP)
3746 R31: stack pointer (SP)
3747 PC: program counter (PC)
3748
3749 ==> U-Boot will use R10 to hold a pointer to the global data
3750
d87080b7
WD
3751NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
3752or current versions of GCC may "optimize" the code too much.
2729af9d 3753
3fafced7
RC
3754On RISC-V, the following registers are used:
3755
3756 x0: hard-wired zero (zero)
3757 x1: return address (ra)
3758 x2: stack pointer (sp)
3759 x3: global pointer (gp)
3760 x4: thread pointer (tp)
3761 x5: link register (t0)
3762 x8: frame pointer (fp)
3763 x10-x11: arguments/return values (a0-1)
3764 x12-x17: arguments (a2-7)
3765 x28-31: temporaries (t3-6)
3766 pc: program counter (pc)
3767
3768 ==> U-Boot will use gp to hold a pointer to the global data
3769
2729af9d
WD
3770Memory Management:
3771------------------
3772
3773U-Boot runs in system state and uses physical addresses, i.e. the
3774MMU is not used either for address mapping nor for memory protection.
3775
3776The available memory is mapped to fixed addresses using the memory
3777controller. In this process, a contiguous block is formed for each
3778memory type (Flash, SDRAM, SRAM), even when it consists of several
3779physical memory banks.
3780
3781U-Boot is installed in the first 128 kB of the first Flash bank (on
3782TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
3783booting and sizing and initializing DRAM, the code relocates itself
3784to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 3785memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
3786configuration setting]. Below that, a structure with global Board
3787Info data is placed, followed by the stack (growing downward).
3788
3789Additionally, some exception handler code is copied to the low 8 kB
3790of DRAM (0x00000000 ... 0x00001FFF).
3791
3792So a typical memory configuration with 16 MB of DRAM could look like
3793this:
3794
3795 0x0000 0000 Exception Vector code
3796 :
3797 0x0000 1FFF
3798 0x0000 2000 Free for Application Use
3799 :
3800 :
3801
3802 :
3803 :
3804 0x00FB FF20 Monitor Stack (Growing downward)
3805 0x00FB FFAC Board Info Data and permanent copy of global data
3806 0x00FC 0000 Malloc Arena
3807 :
3808 0x00FD FFFF
3809 0x00FE 0000 RAM Copy of Monitor Code
3810 ... eventually: LCD or video framebuffer
3811 ... eventually: pRAM (Protected RAM - unchanged by reset)
3812 0x00FF FFFF [End of RAM]
3813
3814
3815System Initialization:
3816----------------------
c609719b 3817
2729af9d 3818In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 3819(on most PowerPC systems at address 0x00000100). Because of the reset
b445bbb4 3820configuration for CS0# this is a mirror of the on board Flash memory.
2729af9d
WD
3821To be able to re-map memory U-Boot then jumps to its link address.
3822To be able to implement the initialization code in C, a (small!)
3823initial stack is set up in the internal Dual Ported RAM (in case CPUs
2eb48ff7
HS
3824which provide such a feature like), or in a locked part of the data
3825cache. After that, U-Boot initializes the CPU core, the caches and
3826the SIU.
2729af9d
WD
3827
3828Next, all (potentially) available memory banks are mapped using a
3829preliminary mapping. For example, we put them on 512 MB boundaries
3830(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
3831on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
3832programmed for SDRAM access. Using the temporary configuration, a
3833simple memory test is run that determines the size of the SDRAM
3834banks.
3835
3836When there is more than one SDRAM bank, and the banks are of
3837different size, the largest is mapped first. For equal size, the first
3838bank (CS2#) is mapped first. The first mapping is always for address
38390x00000000, with any additional banks following immediately to create
3840contiguous memory starting from 0.
3841
3842Then, the monitor installs itself at the upper end of the SDRAM area
3843and allocates memory for use by malloc() and for the global Board
3844Info data; also, the exception vector code is copied to the low RAM
3845pages, and the final stack is set up.
3846
3847Only after this relocation will you have a "normal" C environment;
3848until that you are restricted in several ways, mostly because you are
3849running from ROM, and because the code will have to be relocated to a
3850new address in RAM.
3851
3852
3853U-Boot Porting Guide:
3854----------------------
c609719b 3855
2729af9d
WD
3856[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
3857list, October 2002]
c609719b
WD
3858
3859
6c3fef28 3860int main(int argc, char *argv[])
2729af9d
WD
3861{
3862 sighandler_t no_more_time;
c609719b 3863
6c3fef28
JVB
3864 signal(SIGALRM, no_more_time);
3865 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
c609719b 3866
2729af9d 3867 if (available_money > available_manpower) {
6c3fef28 3868 Pay consultant to port U-Boot;
c609719b
WD
3869 return 0;
3870 }
3871
2729af9d
WD
3872 Download latest U-Boot source;
3873
0668236b 3874 Subscribe to u-boot mailing list;
2729af9d 3875
6c3fef28
JVB
3876 if (clueless)
3877 email("Hi, I am new to U-Boot, how do I get started?");
2729af9d
WD
3878
3879 while (learning) {
3880 Read the README file in the top level directory;
047f6ec0 3881 Read https://www.denx.de/wiki/bin/view/DULG/Manual;
24bcaec7 3882 Read applicable doc/README.*;
2729af9d 3883 Read the source, Luke;
6c3fef28 3884 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
2729af9d
WD
3885 }
3886
6c3fef28
JVB
3887 if (available_money > toLocalCurrency ($2500))
3888 Buy a BDI3000;
3889 else
2729af9d 3890 Add a lot of aggravation and time;
2729af9d 3891
6c3fef28
JVB
3892 if (a similar board exists) { /* hopefully... */
3893 cp -a board/<similar> board/<myboard>
3894 cp include/configs/<similar>.h include/configs/<myboard>.h
3895 } else {
3896 Create your own board support subdirectory;
3897 Create your own board include/configs/<myboard>.h file;
3898 }
3899 Edit new board/<myboard> files
3900 Edit new include/configs/<myboard>.h
3901
3902 while (!accepted) {
3903 while (!running) {
3904 do {
3905 Add / modify source code;
3906 } until (compiles);
3907 Debug;
3908 if (clueless)
3909 email("Hi, I am having problems...");
3910 }
3911 Send patch file to the U-Boot email list;
3912 if (reasonable critiques)
3913 Incorporate improvements from email list code review;
3914 else
3915 Defend code as written;
2729af9d 3916 }
2729af9d
WD
3917
3918 return 0;
3919}
3920
3921void no_more_time (int sig)
3922{
3923 hire_a_guru();
3924}
3925
c609719b 3926
2729af9d
WD
3927Coding Standards:
3928-----------------
c609719b 3929
2729af9d 3930All contributions to U-Boot should conform to the Linux kernel
659208da
BS
3931coding style; see the kernel coding style guide at
3932https://www.kernel.org/doc/html/latest/process/coding-style.html, and the
3933script "scripts/Lindent" in your Linux kernel source directory.
2c051651
DZ
3934
3935Source files originating from a different project (for example the
3936MTD subsystem) are generally exempt from these guidelines and are not
b445bbb4 3937reformatted to ease subsequent migration to newer versions of those
2c051651
DZ
3938sources.
3939
3940Please note that U-Boot is implemented in C (and to some small parts in
3941Assembler); no C++ is used, so please do not use C++ style comments (//)
3942in your code.
c609719b 3943
2729af9d
WD
3944Please also stick to the following formatting rules:
3945- remove any trailing white space
7ca9296e 3946- use TAB characters for indentation and vertical alignment, not spaces
2729af9d 3947- make sure NOT to use DOS '\r\n' line feeds
7ca9296e 3948- do not add more than 2 consecutive empty lines to source files
2729af9d 3949- do not add trailing empty lines to source files
180d3f74 3950
2729af9d
WD
3951Submissions which do not conform to the standards may be returned
3952with a request to reformat the changes.
c609719b
WD
3953
3954
2729af9d
WD
3955Submitting Patches:
3956-------------------
c609719b 3957
2729af9d
WD
3958Since the number of patches for U-Boot is growing, we need to
3959establish some rules. Submissions which do not conform to these rules
3960may be rejected, even when they contain important and valuable stuff.
c609719b 3961
047f6ec0 3962Please see https://www.denx.de/wiki/U-Boot/Patches for details.
218ca724 3963
0668236b 3964Patches shall be sent to the u-boot mailing list <[email protected]>;
1dade18e 3965see https://lists.denx.de/listinfo/u-boot
0668236b 3966
2729af9d
WD
3967When you send a patch, please include the following information with
3968it:
c609719b 3969
2729af9d
WD
3970* For bug fixes: a description of the bug and how your patch fixes
3971 this bug. Please try to include a way of demonstrating that the
3972 patch actually fixes something.
c609719b 3973
2729af9d
WD
3974* For new features: a description of the feature and your
3975 implementation.
c609719b 3976
7207b366
RD
3977* For major contributions, add a MAINTAINERS file with your
3978 information and associated file and directory references.
c609719b 3979
27af930e
AA
3980* When you add support for a new board, don't forget to add a
3981 maintainer e-mail address to the boards.cfg file, too.
c609719b 3982
2729af9d
WD
3983* If your patch adds new configuration options, don't forget to
3984 document these in the README file.
c609719b 3985
218ca724
WD
3986* The patch itself. If you are using git (which is *strongly*
3987 recommended) you can easily generate the patch using the
7ca9296e 3988 "git format-patch". If you then use "git send-email" to send it to
218ca724
WD
3989 the U-Boot mailing list, you will avoid most of the common problems
3990 with some other mail clients.
3991
3992 If you cannot use git, use "diff -purN OLD NEW". If your version of
3993 diff does not support these options, then get the latest version of
3994 GNU diff.
c609719b 3995
218ca724
WD
3996 The current directory when running this command shall be the parent
3997 directory of the U-Boot source tree (i. e. please make sure that
3998 your patch includes sufficient directory information for the
3999 affected files).
6dff5529 4000
218ca724
WD
4001 We prefer patches as plain text. MIME attachments are discouraged,
4002 and compressed attachments must not be used.
c609719b 4003
2729af9d
WD
4004* If one logical set of modifications affects or creates several
4005 files, all these changes shall be submitted in a SINGLE patch file.
52f52c14 4006
2729af9d
WD
4007* Changesets that contain different, unrelated modifications shall be
4008 submitted as SEPARATE patches, one patch per changeset.
8bde7f77 4009
52f52c14 4010
2729af9d 4011Notes:
c609719b 4012
6de80f21 4013* Before sending the patch, run the buildman script on your patched
2729af9d
WD
4014 source tree and make sure that no errors or warnings are reported
4015 for any of the boards.
c609719b 4016
2729af9d
WD
4017* Keep your modifications to the necessary minimum: A patch
4018 containing several unrelated changes or arbitrary reformats will be
4019 returned with a request to re-formatting / split it.
c609719b 4020
2729af9d
WD
4021* If you modify existing code, make sure that your new code does not
4022 add to the memory footprint of the code ;-) Small is beautiful!
4023 When adding new features, these should compile conditionally only
4024 (using #ifdef), and the resulting code with the new feature
4025 disabled must not need more memory than the old code without your
4026 modification.
90dc6704 4027
0668236b
WD
4028* Remember that there is a size limit of 100 kB per message on the
4029 u-boot mailing list. Bigger patches will be moderated. If they are
4030 reasonable and not too big, they will be acknowledged. But patches
4031 bigger than the size limit should be avoided.
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